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1. 发明申请

WO2004072806A3 QUANTUM INFORMATION PROCESSING USING ELECTROMAGNETICALLY INDUCED TRANSPARENCY 审中-公开
标题翻译：使用电磁感应透明度的量子信息处理
公开(公告)号：WO2004072806A3
公开(公告)日：2006-04-20
申请号：PCT/US2004003788
申请日：2004-02-11
申请人： HEWLETT PACKARD DEVELOPMENT CO , BEAUSOLEIL RAYMOND G , KENT ADRIAN P , KUEKES PHILIP J , MUNRO WILLIAM J , SPILLER TIMOTHY P , WILLIAMS R STANLEY
发明人： BEAUSOLEIL RAYMOND G , KENT ADRIAN P , KUEKES PHILIP J , MUNRO WILLIAM J , SPILLER TIMOTHY P , WILLIAMS R STANLEY
IPC分类号： G06N99/00 , G06N1/00
CPC分类号： B82Y10/00 , G06N99/002
摘要： Quantum information processing structures and methods use photons and four-level matter systems in electromagnetically induced transparency (EIT) arrangements for one and two-qubit quantum gates , two-photon phase shifters , and Bell state measurement devices . For efficient coupling of the matter systems to the photons while decoupling the matter systems from the phonon bath, molecular cages or molecular tethers keep atoms/molecules within the electromagnetic field of the photon, e.g., in the evanescent field surrounding the core of an optical fiber carrying the photons. To reduce decoherence caused by spontaneous emissions, the matter systems can be embedded in photonic bandgap crystals or the matter systems can be selected to include matastable energy levels.
摘要翻译：量子信息处理结构和方法使用光子和四级物质系统在一个和两个量子位量子门，双光子移相器和贝尔状态测量装置的电磁感应透明度（EIT）布置中。为了将物质系统与光子有效耦合，同时将物质系统与声子浴解耦，分子笼或分子系链将原子/分子保持在光子的电磁场内，例如在光纤的核心周围的消逝场中携带光子。为了减少由自发辐射引起的去相干，物质系统可以嵌入光子带隙晶体中，或者可以选择物质系统以包括可侵占的能级。

2. 发明申请

WO2005038514A3 PHOTONIC INTERCONNECT SYSTEM 审中-公开
标题翻译：光子互连系统
公开(公告)号：WO2005038514A3
公开(公告)日：2005-08-04
申请号：PCT/US2004033117
申请日：2004-10-06
申请人： HEWLETT PACKARD DEVELOPMENT CO , BEAUSOLEIL RAYMOND G , KUEKES PHILIP J , MUNRO WILLIAM J , SPILLER TIMOTHY P , WILLIAMS RICHARD S , BARRETT SEAN
发明人： BEAUSOLEIL RAYMOND G , KUEKES PHILIP J , MUNRO WILLIAM J , SPILLER TIMOTHY P , WILLIAMS RICHARD S , BARRETT SEAN
IPC分类号： G02B6/12 , G02B6/122 , G02B6/34 , G02B6/43 , G02F1/01 , G11C13/04 , H04B10/00
CPC分类号： G02F1/01 , B82Y20/00 , G02B6/12007 , G02B6/1225 , G02B6/43 , G02F2202/32 , G02F2203/585 , H04B10/801
摘要： A photonic interconnect system (300) avoids high capacitance electric interconnects by using optical signals to communicate data between devices. the system can provide massively parallel information output by mapping logical addresses to frequency bands, so that modulation of a selected frequency band can encode information for a specific location corresponding to the logical address. Wavelength-specific directional couplers (600), modulators (660), and detectors (650) for the photonic interconnect system can be efficiently fabricated at defects in a photonic bandgap crystal.
摘要翻译：光子互连系统（300）通过使用光信号在设备之间传送数据来避免高电容电互连。该系统可以通过将逻辑地址映射到频带来提供大规模并行信息输出，使得对选定频带的调制可以对与逻辑地址对应的特定位置的信息进行编码。用于光子互连系统的波长专用定向耦合器（600），调制器（660）和检测器（650）可以在光子带隙晶体中的缺陷处被有效地制造。

3. 发明申请

WO2007078317A3 AUTONOMOUS EVANESCENT OPTICAL NANOSENSOR 审中-公开
标题翻译：自主发光的光学纳米传感器
公开(公告)号：WO2007078317A3
公开(公告)日：2007-09-27
申请号：PCT/US2006018158
申请日：2006-05-10
申请人： HEWLETT PACKARD DEVELOPMEMT CO , BEAUSOLEIL RAYMOND G , KUEKES PHILIP J , WILLIAMS R STANLEY
发明人： BEAUSOLEIL RAYMOND G , KUEKES PHILIP J , WILLIAMS R STANLEY
IPC分类号： G01N21/64
CPC分类号： G01N21/7703 , G01N21/648 , G01N21/65 , G01N21/94 , G01N33/569 , G01N35/00871 , G01N2021/7786 , G01N2035/00881
摘要： A sensor (100) includes traps (130) that are adjacent to a waveguide (120) and capable of holding a contaminant for an interaction with an evanescent field surrounding the waveguide (120). When held in a trap (130), a particle of the contaminant, which may be an atom, a molecule, a virus, or a microbe, scatters light from the waveguide (120), and the scattered light can be measured to detect the presence or concentration of the contaminant. Holding of the particles permits sensing of the contaminant in a gas where movement of the particles might otherwise be too fast to permit measurement of the interaction with the evanescent field. The waveguide (120), a lighting system (140), a photosensor (150), and a communications interface (160) can all be fabricated on a semiconductor die (110) to permit fabrication of an autonomous nanosensor capable of suspension in the air or a gas being sensed.
摘要翻译：传感器（100）包括邻近波导（120）并且能够保持污染物用于与波导（120）周围的渐消场相互作用的陷阱（130）。当保持在诱捕器（130）中时，污染物（其可以是原子，分子，病毒或微生物）的粒子散射来自波导（120）的光，并且可以测量散射光以检测污染物的存在或浓度。颗粒的保持允许感测气体中的污染物，否则颗粒的运动可能太快而不能测量与消逝场的相互作用。可以在半导体管芯（110）上制造波导（120），照明系统（140），光电传感器（150）和通信接口（160），以允许制造能够悬浮在空气中的自主纳米传感器或感测到的气体。

4. 发明申请

WO2007056603A3 MULTI-TIERED NETWORK FOR GATHERING DETECTED CONDITION INFORMATION 审中-公开
标题翻译：用于收集检测到的条件信息的多层网络
公开(公告)号：WO2007056603A3
公开(公告)日：2007-07-05
申请号：PCT/US2006044021
申请日：2006-11-08
申请人： HEWLETT PACKARD DEVELOPMENT CO , BRATKOVSKI ALEXANDRE M , LI ZHIYONG , LYON GEOFF , KUEKES PHILIP J , WANG SHIH-YUAN , WILLIAMS R STANLEY
发明人： BRATKOVSKI ALEXANDRE M , LI ZHIYONG , LYON GEOFF , KUEKES PHILIP J , WANG SHIH-YUAN , WILLIAMS R STANLEY
IPC分类号： H04L29/08
CPC分类号： G06K7/0008 , H04L67/12
摘要： A multi-tiered network (100, 100') for gathering detected condition information includes a first tier (102) having first tier nodes (104) and a second tier (106) having a second tier node (108). The second tier node (108) is operable to receive detected condition information from at least one of the first tier nodes (104) in a substantially autonomous manner. In addition, the second tier node (108) is operable to at least one of store, process, and transmit the detected condition information. The network (100, 100') also includes a third tier (110) having a third tier node (112) configured to receive the detected condition information and to at least one of store and process the detected condition information.
摘要翻译：用于收集检测到的状况信息的多层网络（100,100'）包括具有第一层节点（104）的第一层（102）和具有第二层节点（108）的第二层（106）。第二层节点（108）可操作来以基本上自主的方式从第一层节点（104）中的至少一个接收检测到的状况信息。另外，第二层节点（108）可操作用于存储，处理和传输检测到的状况信息中的至少一个。网络（100,100'）还包括具有第三层节点（112）的第三层（110），第三层节点（112）被配置为接收检测到的状况信息并存储和处理检测到的状况信息中的至少一个。

5. 发明申请

WO2005026957A3 DEFECT-TOLERANT AND FAULT-TOLERANT CIRCUIT INTERCONNECTIONS 审中-公开
标题翻译：容错和容错电路互连
公开(公告)号：WO2005026957A3
公开(公告)日：2005-06-23
申请号：PCT/US2004029333
申请日：2004-09-08
申请人： HEWLETT PACKARD DEVELOPMENT CO , KUEKES PHILIP J , WILLIAMS R STANLEY , SEROUSSI GADIEL
发明人： KUEKES PHILIP J , WILLIAMS R STANLEY , SEROUSSI GADIEL
IPC分类号： G06F11/10 , G11C8/10 , G11C8/20 , G11C13/00
CPC分类号： G06F11/1016 , B82Y10/00 , G11C8/10 , G11C13/0014 , G11C2213/77 , G11C2213/81
摘要： Methods for increasing defect tolerance and fault tolerance in systems containing interconnected components, in which a signal level is classified as belonging to one of a plurality of different, distinguishable classes based on one or more thresholds separating the signal-level classes, and defect-and-fault tolerant systems embodying the methods. An electronic-device embodiment including an array of nanowire crossbars, the nanoscale memory elements within the nanowire crossbars addressed through conventional microelectronic address lines, and a method embodiment for providing fault-tolerant interconnection interfaces with electrically distinguishable signal levels are described. In the described embodiment, in order to interconnect microelectronic address lines with the nanowire crossbars within the electronic memory, an address encoding technique is employed to generate a number of redundant, parity-check address lines to supplement a minimally required set of address signal lines needed to access the nanoscale memory elements.
摘要翻译：用于增加包含互连组件的系统中的缺陷容限和容错的方法，其中信号电平基于分离信号电平类别的一个或多个阈值被分类为属于多个不同的可区分类别中的一个，以及缺陷体现这些方法的容错系统。包括纳米线交叉杆阵列的电子设备实施例中，纳米线交叉杆内的纳米级的存储元件通过传统的微电子地址线寻址，以及用于提供容错互连接口与电可区别的信号电平的方法实施例进行说明。在所述实施例中，为了在电子存储器内的互连与所述纳米线交叉杆微电子地址线，一个地址编码技术被利用来产生若干多余的，奇偶校验地址线来补充最低限度所需的一组的地址信号线需要访问纳米级存储元件。

6. 发明申请

WO2007053764A2 CROSSBAR-ARRAY DESIGNS AND WIRE ADDRESSING METHODS THAT TOLERATE MISALIGNMENT OF ELECTRICAL COMPONENTS AT WIRE OVERLAP POINTS 审中-公开
标题翻译：跨导线阵列设计和导线寻址方法，可以阻止电线重叠处电气元件的错位
公开(公告)号：WO2007053764A2
公开(公告)日：2007-05-10
申请号：PCT/US2006042923
申请日：2006-11-01
申请人： HEWLETT PACKARD DEVELOPMENT CO , WU WEI , KUEKES PHILIP J , WILLIAMS R STANLEY
发明人： WU WEI , KUEKES PHILIP J , WILLIAMS R STANLEY
IPC分类号： G11C8/10
CPC分类号： G11C13/02 , B82Y10/00 , G11C8/10 , G11C11/54 , G11C13/0023 , G11C2213/77 , G11C2213/81 , H01L27/10 , H01L27/285 , Y10S977/762 , Y10S977/932
摘要： Various embodiments of the present invention are directed to crossbar array designs that interfaces wires to address wires, despite misalignments between electrical components and wires. In one embodiment, a nanoscale device may be composed of a first layer of two or more wires (1501-1511) and a second layer of two or more address wires (1512-1523) that overlays the first layer. The nanoscale device may also include an intermediate layer (704-804) positioned between the first layer and the second layer. Two or more redundant electrical component patterns (1400) may be fabricated within the intermediate layer so that one or more of the electrical component patterns is aligned with the first and second layers.
摘要翻译：尽管电气部件和电线之间未对准，本发明的各种实施例针对交叉开关阵列设计，其将导线连接到地址导线。在一个实施例中，纳米级器件可以由覆盖第一层的两个或更多个导线（1501-1511）的第一层和两个或更多个地址导线（1512-1523）的第二层组成。纳米级装置还可以包括位于第一层和第二层之间的中间层（704-804）。可以在中间层内制造两个或更多冗余电部件图案（1400），使得一个或多个电部件图案与第一和第二层对齐。

7. 发明申请

WO2006026629A2 COMPOSITE MATERIAL WITH POWERED RESONANT CELLS 审中-公开
标题翻译：具有动力谐振电池的复合材料
公开(公告)号：WO2006026629A2
公开(公告)日：2006-03-09
申请号：PCT/US2005030879
申请日：2005-08-30
申请人： HEWLETT PACKARD DEVELOPMENT CO , WANG SHIH-YUAN , KUEKES PHILIP J , WU WEI , STRAZINCKY JOSEPH , ISLAM M SAIFUL
发明人： WANG SHIH-YUAN , KUEKES PHILIP J , WU WEI , STRAZINCKY JOSEPH , ISLAM M SAIFUL
IPC分类号： H01Q15/00 , H01Q3/44
CPC分类号： H01Q3/44 , H01Q15/0086
摘要： A composite material (100) and related methods are described, the composite material (100) being configured to exhibit a negative effective permittivity and/or negative effective permeability for incident radiation (101) at an operating wavelength, the composite material comprising an arrangment of electromagnetically reactive cells (106) of small dimension relative to the operating wavelength. Each cell (106) includes an externally powered gain element (110) for enhancing a resonant response of that cell to the incident radiation (101) at the operating wavelength.
摘要翻译：描述了复合材料（100）和相关方法，所述复合材料（100）被配置为在工作波长处对入射辐射（101）呈现负的有效介电常数和/或负的有效磁导率，所述复合材料包括相对于工作波长小的电磁反应池（106）。每个单元（106）包括外部供电的增益元件（110），用于在工作波长处增强该单元对入射辐射（101）的谐振响应。

8. 发明申请

WO2008008419A3 DEFECT-AND-FAILURE-TOLERANT DEMULTIPLEXER USING SERIES REPLICATION AND ERROR-CONTROL ENCODING 审中-公开
标题翻译：使用系列复制和错误控制编码的缺陷和失败的解复用器
公开(公告)号：WO2008008419A3
公开(公告)日：2008-09-25
申请号：PCT/US2007015861
申请日：2007-07-11
申请人： HEWLETT PACKARD DEVELOPMENT CO , ROBINETT WARREN , KUEKES PHILIP J , WILLIAMS STANLEY R
发明人： ROBINETT WARREN , KUEKES PHILIP J , WILLIAMS STANLEY R
IPC分类号： G06F11/10 , H03K19/177
CPC分类号： H03K19/007 , G06F11/1076 , H03K19/00315
摘要： One embodiment of the present invention is a method for constructing defect-and-failure-tolerant demultiplexers (figures 14 an 16). This method is applicable to nanoscale, microscal, or larger-scale demultiplexer circuits,. Demultiplexer circuits can be viewed as a set of AND gates (figures 9A-B), each including a reversibly switchable interconnection between a number of address lines (910-912 and 920-922), or address-line-derived signal lines, and an output signal line (914 and 924). Each reversibly switchable interconnection includes one ot more reversibly switchable elements (906-908 and 916-918). In certain demultiplexer embodiments, NMOS (102) and/or PMOS transistors (206) are employed as reversibly switchable elements. In the method that representd one embodiment of the present invention, two or more serially connected transistors (410, 412, and 411, 413; 1502) are employed in each reversibly switchable interconnection, so that short defects in up to one less then the number of serially interconnected transistors does not lead to failure of the reversibly switchable interconnection. In addition, error-control-encoding techniques are used to introduce additional address-line-derived signal lines (1602, 1604) and additional switchable interconnections (1610) so that the demultiplexer may function even when a number of individual, switchable interconnections are open-defective.
摘要翻译：本发明的一个实施例是用于构造缺陷和容错解复用器的方法（图14和16）。该方法适用于纳米级，微型或大规模解复用器电路。解复用器电路可以被看作是一组与门（图9A-B），每一个包括多个地址线（910-912和920-922）之间的可逆切换互连或地址线导出的信号线，以及输出信号线（914和924）。每个可逆切换互连包括一个或多个可逆切换元件（906-908和916-918）。在某些解复用器实施例中，NMOS（102）和/或PMOS晶体管（206）被用作可逆切换元件。在代表本发明的一个实施例的方法中，在每个可逆切换的互连中使用两个或更多个串联的晶体管（410,412和411,413; 1502），使得短到少于1个串联互连的晶体管不会导致可逆切换互连的故障。另外，误差控制编码技术被用于引入额外的地址线导出的信号线（1602,1604）和附加的可切换互连（1610），使得即使当多个单独的可切换互连打开时，解复用器也可以起作用缺陷型。

9. 发明申请

WO2005006342A3 CONTROLLED INPUT MOLECULAR CROSSBAR LATCH 审中-公开
标题翻译：控制输入分子横杆锁
公开(公告)号：WO2005006342A3
公开(公告)日：2005-05-06
申请号：PCT/US2004002644
申请日：2004-01-27
申请人： HEWLETT PACKARD DEVELOPMENT CO , KUEKES PHILIP J
发明人： KUEKES PHILIP J
IPC分类号： G11C13/02 , H01L51/20
CPC分类号： G11C13/0014 , B82Y10/00 , G11C13/02 , G11C2213/77 , G11C2213/81 , Y10S977/94
摘要： A molecular crossbar latch is provided, comprising two control wires and a signal wire that crosses the two control wires to form a junction with each control wire. The latch further includes a control mechanism for controllably electrically connecting and disconnecting signal input to the latch, thus allowing the input to change its logic value after the signal is latched while the signal wire retains its latched value. Each junction forms a switch, the junction having a functional dimension in nanometers. The crossbar latch permits latching a logic value on the signal wire. Further, methods are provided for latching logic values in a logic array, for inventing a logic value , and for restoring a voltage value of a signal in a nano-scale wire.
摘要翻译：提供了一种分子横杆闩锁，其包括两根控制线和一根信号线，信号线穿过两根控制线以形成与每根控制线的连接点。锁存器还包括控制机构，用于可控地电连接和断开输入到锁存器的信号，从而允许输入端在信号被锁存之后改变其逻辑值，同时信号线保持其锁存值。每个结形成一个开关，该结具有纳米功能尺寸。交叉开关锁存器允许锁定信号线上的逻辑值。此外，提供了用于将逻辑值锁存在逻辑阵列中，用于发明逻辑值以及用于恢复纳米级导线中的信号的电压值的方法。

10. 发明申请

WO2007089914A2 FPGA ARCHITECTURE AT CONVENTIONAL AND SUBMICRON SCALES 审中-公开
标题翻译：常规和亚微米尺寸的FPGA架构
公开(公告)号：WO2007089914A2
公开(公告)日：2007-08-09
申请号：PCT/US2007002805
申请日：2007-01-30
申请人： HEWLETT PACKARD DEVELOPMENT CO , SNIDER GREGORY S , KUEKES PHILIP J
发明人： SNIDER GREGORY S , KUEKES PHILIP J
IPC分类号： H03K19/177 , G11C13/02
CPC分类号： H03K19/17748 , B82Y10/00 , B82Y30/00 , G11C8/10 , G11C13/0007 , G11C13/0014 , G11C2213/15 , G11C2213/34 , G11C2213/51 , G11C2213/77 , G11C2213/81 , H03K19/17728 , H03K19/1778
摘要： Reconfigurable logic devices (500) and methods of programming the devices are disclosed. The logic device includes a look-up table (600, 600') (LUT) and at least one storage element (570) configured for sampling LUT output signals (520). The LUT (600, 600') comprises a plurality of input signals (510), an array of programmable impedance devices (110) operably coupled to the input signals (510), and the LUT output signals (520). Each programmable impedance devices (110) in the array includes a first electrode (120) operably coupled to one of the input signals (520), a second electrode (130) disposed to form a junction (150) wherein the second electrode (130) at least partially overlaps the first electrode (120), and a programmable material (140) disposed between the first electrode (120) and the second electrode (130). The programmable material (140) operably couples the first electrode (120) and second electrode (130) such that each programmable impedance device (110) exhibits a non-volatile programmable impedance. The array may be configured as a one-dimensional array (700, 700') or two-dimensional array (610, 610').
摘要翻译：公开了可重新配置的逻辑设备（500）和对设备进行编程的方法。逻辑器件包括被配置为对LUT输出信号（520）进行采样的查找表（600,600'）（LUT）和至少一个存储元件（570）。 LUT（600,600'）包括多个输入信号（510），可操作地耦合到输入信号（510）的可编程阻抗设备（110）阵列以及LUT输出信号（520）。阵列中的每个可编程阻抗器件（110）包括可操作地耦合到输入信号（520）中的一个的第一电极（120），布置为形成结（150）的第二电极（130），其中第二电极至少部分地与第一电极（120）重叠，以及设置在第一电极（120）和第二电极（130）之间的可编程材料（140）。可编程材料（140）可操作地耦合第一电极（120）和第二电极（130），使得每个可编程阻抗设备（110）呈现非易失性可编程阻抗。该阵列可以被配置为一维阵列（700,700'）或二维阵列（610,610'）。

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