专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

WO2008147756A4 IN-SITU PHOTORESIST STRIP DURING PLASMA ETCHING OF ACTIVE HARD MASK 审中-公开
标题翻译：活性硬掩模等离子刻蚀中的原位光刻条
公开(公告)号：WO2008147756A4
公开(公告)日：2009-07-09
申请号：PCT/US2008064159
申请日：2008-05-19
申请人： LAM RES CORP , CHO SANGJUN , CHOI TOM , HAN TAEJOON , KANG SEAN , GOPALADASU PRABHAKARA , YEN BI-MING
发明人： CHO SANGJUN , CHOI TOM , HAN TAEJOON , KANG SEAN , GOPALADASU PRABHAKARA , YEN BI-MING
IPC分类号： H01L21/3065 , H01L21/027
CPC分类号： H01L21/3081 , G03F7/427 , H01L21/31138 , H01L21/32139
摘要： A method for etching features in a silicon layer is provided. A hard mask layer is formed over the silicon layer. A photoresist layer is formed over the hard mask layer. The hard mask layer is opened. The photoresist layer is stripped by providing a stripping gas; forming a plasma with the stripping gas by providing a high frequency RF power and a low frequency RF power, wherein the low frequency RF power has a power less than 50 watts; and stopping the stripping gas when the photoresist layer is stripped. The opening the hard mask layer and the stripping the photoresist layer are performed in a same chamber.
摘要翻译：提供了一种用于蚀刻硅层中的特征的方法。在硅层上形成硬掩模层。在硬掩模层上形成光致抗蚀剂层。硬掩模层被打开。通过提供汽提气体来剥离光致抗蚀剂层; 通过提供高频RF功率和低频RF功率形成具有剥离气体的等离子体，其中低频RF功率具有小于50瓦的功率; 并且当光致抗蚀剂层被剥离时停止剥离气体。在同一腔室中进行硬掩模层的开口和光刻胶层的剥离。

2. 发明申请

WO2008147756A2 IN-SITU PHOTORESIST STRIP DURING PLASMA ETCHING OF ACTIVE HARD MASK 审中-公开
标题翻译：活动硬掩模等离子体蚀刻中的现场光电子条纹
公开(公告)号：WO2008147756A2
公开(公告)日：2008-12-04
申请号：PCT/US2008/064159
申请日：2008-05-19
申请人： LAM RESEARCH CORPORATION , CHO, Sangjun , CHOI, Tom , HAN, Taejoon , KANG, Sean , GOPALADASU, Prabhakara , YEN, Bi-ming
发明人： CHO, Sangjun , CHOI, Tom , HAN, Taejoon , KANG, Sean , GOPALADASU, Prabhakara , YEN, Bi-ming
IPC分类号： H01L21/3065 , H01L21/02
CPC分类号： H01L21/3081 , G03F7/427 , H01L21/31138 , H01L21/32139
摘要： A method for etching features in a silicon layer is provided. A hard mask layer is formed over the silicon layer. A photoresist layer is formed over the hard mask layer. The hard mask layer is opened. The photoresist layer is stripped by providing a stripping gas; forming a plasma with the stripping gas by providing a high frequency RF power and a low frequency RF power, wherein the low frequency RF power has a power less than 50 watts; and stopping the stripping gas when the photoresist layer is stripped. The opening the hard mask layer and the stripping the photoresist layer are performed in a same chamber.
摘要翻译：提供了一种用于蚀刻硅层中的特征的方法。在硅层上形成硬掩模层。在硬掩模层上形成光致抗蚀剂层。打开硬掩模层。通过提供剥离气体来剥离光致抗蚀剂层; 通过提供高频RF功率和低频RF功率与剥离气体形成等离子体，其中低频RF功率具有小于50瓦的功率; 并且当剥离光致抗蚀剂层时停止剥离气体。打开硬掩模层和剥离光致抗蚀剂层在相同的室中进行。

3. 发明申请

WO2005024904A3 REDUCTION OF FEATURE CRITICAL DIMENSIONS 审中-公开
标题翻译：减少特征关键尺寸
公开(公告)号：WO2005024904A3
公开(公告)日：2006-06-15
申请号：PCT/US2004024853
申请日：2004-07-29
申请人： LAM RES CORP , KANG SEAN S , LEE SANGHEON , CHEN WAN-LIN , HUDSON ERIC A , SADJADI S M REZA , ZHAO GAN MING
发明人： KANG SEAN S , LEE SANGHEON , CHEN WAN-LIN , HUDSON ERIC A , SADJADI S M REZA , ZHAO GAN MING
IPC分类号： H01L21/44 , H01L21/033 , H01L21/311 , H01L21/768
CPC分类号： H01L21/76802 , H01L21/0337 , H01L21/31116 , H01L21/31144 , H01L21/76816
摘要： A feature in a layer (308) is provided. A photoresist layer is formed over the layer (308). The photoresist layer is patterned to form photoresist features (312) with photoresist sidewalls, where the photoresist features (312) have a first critical dimension (316). A conformal layer (320) is deposited over the sidewalls of the photoresist features (312) to reduce the critical dimensions of the photoresist features (312). Features are etched into the layer (308), wherein the layer (308) features have a second critical dimension (324), which is less than the first critical dimension (316).
摘要翻译：提供层（308）中的特征。在层（308）之上形成光致抗蚀剂层。光致抗蚀剂层被图案化以形成具有光致抗蚀剂侧壁的光致抗蚀剂特征（312），其中光致抗蚀剂特征（312）具有第一临界尺寸（316）。在光致抗蚀剂特征（312）的侧壁上沉积保形层（320），以减少光致抗蚀剂特征（312）的临界尺寸。特征被蚀刻到层（308）中，其中层（308）特征具有小于第一临界尺寸（316）的第二临界尺寸（324）。

4. 发明申请

WO2006019849A1 LOW-K DIELECTRIC ETCH 审中-公开
标题翻译：低K电介质
公开(公告)号：WO2006019849A1
公开(公告)日：2006-02-23
申请号：PCT/US2005/024905
申请日：2005-07-12
申请人： LAM RESEARCH CORPORATION , KANG, Sean, S. , HUANG, Zhisong , SADJADI, Reza, S., M.
发明人： KANG, Sean, S. , HUANG, Zhisong , SADJADI, Reza, S., M.
IPC分类号： H01L21/311
CPC分类号： H01L21/31144 , H01L21/31116
摘要： A method for etching a dielectric layer below a photoresist mask is provided. A wafer with the dielectric layer disposed below a photoresist mask is provided in an etch chamber. An etch gas comprising CF 4 and H 2 is provided into the etch chamber wherein the CF 4 has a flow rate and the H 2 has a flow rate, wherein the flow rate of H 2 is greater than the flow rate of CF 4 . A plasma is formed from the etch gas. Features are etched into the dielectric layer through the etch mask using the plasma formed from the etch gas.
摘要翻译：提供了一种用于蚀刻光致抗蚀剂掩模下面的介电层的方法。在蚀刻室中提供具有设置在光致抗蚀剂掩模下方的介电层的晶片。一种包含CF <

5. 发明申请

WO2005088693A1 LINE EDGE ROUGHNESS CONTROL 审中-公开
标题翻译：线边缘粗糙度控制
公开(公告)号：WO2005088693A1
公开(公告)日：2005-09-22
申请号：PCT/US2005/007386
申请日：2005-03-02
申请人： LAM RESEARCH CORPORATION , CHOI, Youngjin , ZHU, Helen, H. , LEE, Sangheon , KANG, Sean, S.
发明人： CHOI, Youngjin , ZHU, Helen, H. , LEE, Sangheon , KANG, Sean, S.
IPC分类号： H01L21/311
CPC分类号： H01L21/31144 , H01L21/0276 , H01L21/31116 , H01L21/31138 , H01L21/32136 , H01L21/32139
摘要： A method for etching a layer through a photoresist mask with an ARC layer between the layer to be etched and the photoresist mask over a substrate is provided. The substrate is placed into a processing chamber. An ARC open gas mixture is provided into the processing chamber. The ARC open gas mixture comprises an etchant gas and a polymerization gas comprising CO and CH3F. An ARC open plasma is formed from the ARC open gas mixture. The ARC layer is etched with the ARC open plasma until the ARC layer is opened. The ARC open gas mixture stopped before the layer to be etched is completely etched.
摘要翻译：提供了一种通过具有ARC层之间的光致抗蚀剂掩模蚀刻层的方法，该蚀刻掩模在被蚀刻层与衬底上的光致抗蚀剂掩模之间。将基板放置在处理室中。将ARC开放气体混合物提供到处理室中。 ARC敞开气体混合物包括蚀刻剂气体和包含CO和CH 3 F的聚合气体。 ARC开放式气体混合物形成ARC开放式等离子体。用ARC打开的等离子体蚀刻ARC层，直到ARC层打开。 ARC打开的气体混合物在被蚀刻层被完全蚀刻之前停止。

6. 发明申请

WO2013162838A1 METHODS AND APPARATUS FOR CONTROLLING SUBSTRATE UNIFORMITY 审中-公开
标题翻译：用于控制基板均匀性的方法和装置
公开(公告)号：WO2013162838A1
公开(公告)日：2013-10-31
申请号：PCT/US2013/035006
申请日：2013-04-02
申请人： APPLIED MATERIALS, INC. , SADJADI, S.M. Reza , LUBOMIRSKY, Dmitry , NOORBAKHSH, Hamid , YE, Zheng John , QUACH, David H. , KANG, Sean S.
发明人： SADJADI, S.M. Reza , LUBOMIRSKY, Dmitry , NOORBAKHSH, Hamid , YE, Zheng John , QUACH, David H. , KANG, Sean S.
IPC分类号： H01L21/205
CPC分类号： H01L22/20 , C23C14/22 , C23C16/44 , H01J37/32082 , H01J37/32467 , H01J37/32522 , H01J37/32541 , H01J37/32605 , H01J37/32642 , H01J37/32697 , H01J2237/334 , H01L21/02104 , H01L21/02274 , H01L21/3065 , H01L21/67069 , H01L21/67109 , H01L21/67248 , H01L21/6833 , H01L21/68735
摘要： A dynamically tunable process kit, a processing chamber having a dynamically tunable process kit, and a method for processing a substrate using a dynamically tunable process kit are provided. The dynamically tunable process kit allows one or both of the electrical and thermal state of the process kit to be changed without changing the phyisical construction of the process kit, thereby allowing plasma properties, and hence processing results, to be easily changed without replacing the process kit. The processing chamber having a dynamically tunable process kit includes a chamber body that includes a portion of a conductive side wall configured to be electrically controlled, and a process kit. The processing chamber includes a first control system operable to control one or both of an electrical and thermal state of the process kit and a second control system operable to control an electrical state of the portion of the side wall.
摘要翻译：提供了一种动态可调工艺套件，具有动态可调工艺套件的处理室以及使用动态可调工艺套件处理衬底的方法。动态可调工艺套件允许改变工艺套件的电气和热状态，而不改变工艺套件的植物结构，从而允许容易地改变等离子体性能，因此处理结果而不需要更换过程套件。具有可动态调节的处理套件的处理室包括腔室主体，其包括被配置为电控制的导电侧壁的一部分，以及处理套件。处理室包括可操作以控制处理套件的电气和热状态中的一个或两个的第一控制系统和可操作以控制侧壁部分的电气状态的第二控制系统。

7. 发明申请

WO2009099812A2 REDUCING DAMAGE TO LOW-K MATERIALS DURING PHOTORESIST STRIPPING 审中-公开
标题翻译：减少光刻胶剥离过程中对低K材料的损害
公开(公告)号：WO2009099812A2
公开(公告)日：2009-08-13
申请号：PCT/US2009/032162
申请日：2009-01-27
申请人： LAM RESEARCH CORPORATION , KANG, Sean S. , CHO, Sang Jun , CHOI, Thomas S.
发明人： KANG, Sean S. , CHO, Sang Jun , CHOI, Thomas S.
IPC分类号： H01L21/3065 , H01L21/02
CPC分类号： G03F7/427 , H01L21/31138 , H01L21/31144 , H01L21/76808
摘要： A method of forming features in a porous low-k dielectric layer disposed below a patterned organic mask is provided. Features are etched into the porous low-k dielectric layer through the patterned organic mask, and then the patterned organic mask is stripped. The stripping of the patterned organic mask includes providing a stripping gas comprising COS, forming a plasma from the stripping gas, and stopping the stripping gas. A cap layer may be provided between the porous low-k dielectric layer and the patterned organic mask. The stripping of the patterned organic mask leaves the cap layer on the porous low-k dielectric layer.
摘要翻译：提供了一种在布置在图案化有机掩模下方的多孔低k电介质层中形成特征的方法。通过图案化有机掩模将特征蚀刻到多孔低k电介质层中，然后剥离图案化有机掩模。图案化有机掩模的剥离包括提供包含COS的剥离气体，由剥离气体形成等离子体并停止剥离气体。可以在多孔低k电介质层和图案化有机掩模之间提供盖层。图案化有机掩模的剥离使得多孔低k介电层上的覆盖层成为可能。

8. 发明申请

WO2005024904A2 REDUCTION OF FEATURE CRITICAL DIMENSIONS 审中-公开
标题翻译：减少特征关键尺寸
公开(公告)号：WO2005024904A2
公开(公告)日：2005-03-17
申请号：PCT/US2004/024853
申请日：2004-07-29
申请人： LAM RESEARCH CORPORATION , KANG, Sean, S. , LEE, Sangheon , CHEN, Wan-Lin , HUDSON, Eric, A. , SADJADI, S., M., Reza , ZHAO, Gan, Ming
发明人： KANG, Sean, S. , LEE, Sangheon , CHEN, Wan-Lin , HUDSON, Eric, A. , SADJADI, S., M., Reza , ZHAO, Gan, Ming
IPC分类号： H01L
CPC分类号： H01L21/76802 , H01L21/0337 , H01L21/31116 , H01L21/31144 , H01L21/76816
摘要： A feature in a layer is provided. A photoresist layer is formed over the layer. The photoresist layer is patterned to form photoresist features with photoresist sidewalls, where the photoresist features have a first critical dimension. A conformal layer is deposited over the sidewalls of the photoresist features to reduce the critical dimensions of the photoresist features. Features are etched into the layer, wherein the layer features have a second critical dimension, which is less than the first critical dimension.
摘要翻译：提供了一个图层中的一个特征。在该层上形成光致抗蚀剂层。图案化光致抗蚀剂层以形成具有光致抗蚀剂侧壁的光致抗蚀剂特征，其中光致抗蚀剂特征具有第一临界尺寸。在光致抗蚀剂特征的侧壁上沉积保形层以减少光致抗蚀剂特征的临界尺寸。将特征蚀刻到层中，其中层特征具有小于第一临界尺寸的第二临界尺寸。

9. 发明申请

WO2009099812A3 REDUCING DAMAGE TO LOW-K MATERIALS DURING PHOTORESIST STRIPPING 审中-公开
标题翻译：在光电子剥离期间减少对低K材料的损害
公开(公告)号：WO2009099812A3
公开(公告)日：2009-10-01
申请号：PCT/US2009032162
申请日：2009-01-27
申请人： LAM RES CORP , KANG SEAN S , CHO SANG JUN , CHOI THOMAS S
发明人： KANG SEAN S , CHO SANG JUN , CHOI THOMAS S
IPC分类号： H01L21/3065 , H01L21/02
CPC分类号： G03F7/427 , H01L21/31138 , H01L21/31144 , H01L21/76808
摘要： A method of forming features in a porous low-k dielectric layer disposed below a patterned organic mask is provided. Features are etched into the porous low-k dielectric layer through the patterned organic mask, and then the patterned organic mask is stripped. The stripping of the patterned organic mask includes providing a stripping gas comprising COS, forming a plasma from the stripping gas, and stopping the stripping gas. A cap layer may be provided between the porous low-k dielectric layer and the patterned organic mask. The stripping of the patterned organic mask leaves the cap layer on the porous low-k dielectric layer.
摘要翻译：提供了一种在图案化有机掩模下方形成多孔低k电介质层中的特征的方法。通过图案化的有机掩模将特征蚀刻到多孔低k电介质层中，然后剥去图案化的有机掩模。图案化有机掩模的剥离包括提供包含COS的汽提气体，从汽提气体形成等离子体，并停止汽提气体。可以在多孔低k电介质层和图案化有机掩模之间设置覆盖层。图案化有机掩模的剥离在多孔低k电介质层上留下盖层。

10. 发明申请

WO2009002415A1 METHODS OF AND APPARATUS FOR REDUCING AMOUNTS OF PARTICLES ON A WAFER DURING WAFER DE-CHUCKING 审中-公开
标题翻译：用于减少切割过程中波形颗粒数量和装置的方法和装置
公开(公告)号：WO2009002415A1
公开(公告)日：2008-12-31
申请号：PCT/US2008/007507
申请日：2008-06-12
申请人： LAM RESEARCH CORPORATION , CHO, Sangjun , KANG, Sean , CHOI, Tom , HAN, Taejoon
发明人： CHO, Sangjun , KANG, Sean , CHOI, Tom , HAN, Taejoon
IPC分类号： H01L21/3065 , H01L21/304
CPC分类号： H01L21/6833
摘要： Particles are trapped away from a wafer transport zone in a chamber. A first electrode is on one side of the zone. A second electrode is on an opposite side of the zone. A power supply connected across the electrodes establishes an electrostatic field between the electrodes. The field traps particles at the electrodes, away from the zone. For transporting the wafer from the chamber, the second electrode mounts the wafer for processing, and the first electrode is opposite to the second electrode defining a process space. The zone is in the space with a separate part of the space separating the zone from each electrode. Particles are urged away from the wafer by simultaneously terminating plasma processing of the wafer, connecting the second electrode to ground, applying a positive DC potential to the first electrode, and de- chucking the wafer from the second electrode into the zone.
摘要翻译：颗粒被捕获在室中的晶片输送区域。第一电极位于该区域的一侧。第二电极位于该区域的相对侧。跨电极连接的电源在电极之间建立静电场。该场捕获电极处的颗粒，远离该区域。为了从腔室输送晶片，第二电极安装用于处理的晶片，并且第一电极与限定工艺空间的第二电极相对。该区域在空间中，具有将区域与每个电极分离的空间的单独部分。通过同时终止晶片的等离子体处理，将第二电极连接到地，将正的DC电位施加到第一电极，以及将晶片从第二电极去夹紧到区域中，从而将颗粒推离离开晶片。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式