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1. 发明申请

WO2010019119A1 DYNAMIC UTILIZATION OF POWER-DOWN MODES IN MULTI-CORE MEMORY MODULES 审中-公开
标题翻译：多核存储器模块中掉电模式的动态利用
公开(公告)号：WO2010019119A1
公开(公告)日：2010-02-18
申请号：PCT/US2008/009735
申请日：2008-08-13
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. , AHN, Jung Ho , JOUPPI, Norman P. , LEVERICH, Jacob B. , SCHREIBER, Robert S.
发明人： AHN, Jung Ho , JOUPPI, Norman P. , LEVERICH, Jacob B. , SCHREIBER, Robert S.
IPC分类号： G06F12/08 , G06F12/00
CPC分类号： G06F12/0215 , G06F1/3203 , G06F13/1694 , G06F2212/1028 , G11C5/04 , G11C7/20 , Y02D10/13 , Y02D10/152
摘要： Various embodiments of the present invention are directed to methods that enable a memory controller to choose a particular operation mode for virtual memory devices of a memory module based on dynamic program behavior. In one embodiment, a method for determining an operation mode for each virtual memory device of a memory module includes selecting a metric (1001) that provides a standard by which performance and/or energy efficiency of the memory module is optimized. For each virtual memory device (1005), the method also includes collecting usage information (1006) associated with the virtual memory device over a period of time, determining an operation mode (1007) for the virtual memory device based on the metric and usage information, and entering the virtual memory device into the operation mode.
摘要翻译：本发明的各种实施例涉及使存储器控制器能够基于动态程序行为为存储器模块的虚拟存储器件选择特定操作模式的方法。在一个实施例中，一种用于确定存储器模块的每个虚拟存储器设备的操作模式的方法包括选择度量（1001），其提供优化存储器模块的性能和/或能量效率的标准。对于每个虚拟存储设备（1005），该方法还包括在一段时间内收集与虚拟存储设备相关联的使用信息（1006），基于度量和使用信息确定虚拟存储设备的操作模式（1007），并进入虚拟存储设备进入操作模式。

2. 发明申请

WO2010016817A1 INDEPENDENTLY CONTROLLABLE AND RECONFIGURABLE VIRTUAL MEMORY DEVICES IN MEMORY MODULES THAT ARE PIN-COMPATIBLE WITH STANDARD MEMORY MODULES 审中-公开
标题翻译：与标准内存模块相容的内存模块中的独立可控和可重新配置的虚拟内存设备
公开(公告)号：WO2010016817A1
公开(公告)日：2010-02-11
申请号：PCT/US2008/009522
申请日：2008-08-08
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. , AHN, Jung, Ho , JOUPPI, Norman, P. , SCHREIBER, Robert, S.
发明人： AHN, Jung, Ho , JOUPPI, Norman, P. , SCHREIBER, Robert, S.
IPC分类号： G11C8/00 , G06F12/08
CPC分类号： G11C5/04 , G06F12/06 , G06F12/0646 , G06F13/1684 , G06F2212/1028 , G11C8/12 , Y02D10/13 , Y02D10/14
摘要： Various embodiments of the present invention are directed multi-core memory modules. In one embodiment, a memory module (500) includes memory chips, and a demultiplexer register (502) electronically connected to each of the memory chips and a memory controller. The memory controller groups one or more of the memory chips into at least one virtual memory device in accordance with changing performance and/or energy efficiency needs. The demultiplexer register (502) is configured to receive a command indentifying one of the virtual memory devices and send the command to the memory chips of the identified virtual memory device. In certain embodiments, the memory chips can be dynamic random access memory chips.
摘要翻译：本发明的各种实施例是多核存储器模块。在一个实施例中，存储器模块（500）包括存储器芯片和电连接到每个存储器芯片的解复用器寄存器（502）和存储器控制器。存储器控制器根据改变的性能和/或能量效率需要将一个或多个存储器芯片组合成至少一个虚拟存储器设备。解复用器寄存器（502）被配置为接收识别虚拟存储器设备中的一个并且将命令发送到所识别的虚拟存储器设备的存储器芯片的命令。在某些实施例中，存储器芯片可以是动态随机存取存储器芯片。

3. 发明申请

WO2009055031A1 THREE-DIMENSIONAL MEMORY MODULE ARCHITECTURES 审中-公开
标题翻译：三维存储器模块架构
公开(公告)号：WO2009055031A1
公开(公告)日：2009-04-30
申请号：PCT/US2008/012118
申请日：2008-10-23
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. , MCLAREN, Moray , AHN, Jung Ho, , DAVIS, Alan Lynn, , BINKERT, Nathan Lorenzo, , JOUPPI, Norman Paul,
发明人： MCLAREN, Moray , AHN, Jung Ho, , DAVIS, Alan Lynn, , BINKERT, Nathan Lorenzo, , JOUPPI, Norman Paul,
IPC分类号： G11C5/02
CPC分类号： G11C5/04 , G11C5/02 , G11C5/025 , G11C13/04 , G11C2211/4016 , G11C2213/71 , H01L25/0657 , H01L25/18 , H01L2225/06534 , H01L2225/06541 , H01L2225/06565 , H01L2924/0002 , H01L2924/15311 , H01L2924/00
摘要： Various embodiments of the present invention are directed to stacked memory modules. In one embodiment of the present invention, a memory module (100,600,1200,1400) comprises at least one memory-controller layer (102,602,1204,1402) stacked with at least one memory layer. Fine pitched through vias (e.g., through silicon vias) (114,116) extend approximately perpendicular to a surface of the at least one memory controller through the stack providing electronic communication between the at least one memory controller (401-404) and the at least one memory layers. Additionally, the memory-controller layer includes at least one external interface configured to transmit data to and from the memory module. Furthermore, the memory module can include an optical layer (602,1202). The optical layer can be included in the stack and has a bus waveguide to transmit data to and from the at least one memory controller. The external interface can be an optical external interface which interfaces with the optical layer.
摘要翻译：本发明的各种实施例涉及堆叠的存储器模块。在本发明的一个实施例中，存储器模块（100,600,1200,1400）包括与至少一个存储器层堆叠的至少一个存储器控制器层（102,602,1204,1402）。通过通孔（例如，通过硅通孔）（114,116）精细地延伸通过堆叠大致垂直于至少一个存储器控制器的表面延伸，从而提供至少一个存储器控制器（401-404）与至少一个存储器控制器内存层。此外，存储器控制器层包括被配置为向存储器模块传送数据和从存储器模块传送数据的至少一个外部接口。此外，存储器模块可以包括光学层（602,1202）。光学层可以被包括在堆叠中并且具有总线波导以将数据传送到至少一个存储器控制器和从至少一个存储器控制器传送数据。外部接口可以是与光学层接口的光学外部接口。

4. 发明申请

WO2012008671A1 SYSTEM FOR SELECTING MATTRESS MODEL 审中-公开
标题翻译：选择MATTRESS模型的系统
公开(公告)号：WO2012008671A1
公开(公告)日：2012-01-19
申请号：PCT/KR2011/000674
申请日：2011-01-31
申请人： SIMMONS-K.CO.,LTD , KIM, Jung Yong , AHN, Jung Ho , SHIN, Young Sung , MIN, Seung Nam , LEE, Min Ho
发明人： KIM, Jung Yong , AHN, Jung Ho , SHIN, Young Sung , MIN, Seung Nam , LEE, Min Ho
IPC分类号： G06F17/00 , G06F17/40 , G06F17/30
CPC分类号： G06Q30/02 , A47C31/123
摘要： The present invention relates to a system for selecting a mattress model for selecting and recommending an optimum mattress according to body characteristics. The system for selecting a mattress model includes at least one measuring unit for measuring a body characteristic data of a user, a control terminal for substituting the body characteristic data received from the measuring unit for a variable in a preset linear recursion relation as a user characteristic data, and selecting at least one mattress model based on a result of regression analysis of the linear recursion relation, and a display unit for displaying information on the result of the regression analysis and the mattress model selected thus which are produced from the control terminal.
摘要翻译：本发明涉及一种用于根据身体特征选择和推荐最佳床垫的床垫模型的系统。用于选择床垫模型的系统包括用于测量用户的身体特征数据的至少一个测量单元，用于将以预设的线性递归关系变量的从测量单元接收的身体特征数据替换为用户特征的控制终端数据，以及基于线性递归关系的回归分析的结果来选择至少一个床垫模型;以及显示单元，用于显示从控制终端产生的回归分析和由此选择的床垫模型的结果的信息。

5. 发明申请

WO2011078844A1 CIRCUIT SWITCHED OPTICAL INTERCONNECTION FABRIC 审中-公开
标题翻译：电路切换光纤互连面板
公开(公告)号：WO2011078844A1
公开(公告)日：2011-06-30
申请号：PCT/US2009/069038
申请日：2009-12-21
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. , TAN, Michael Renne Ty , BINKERT, Nathan Lorenzo , JOUPPI, Norman Paul , MCLAREN, Moray , AHN, Jung Ho
发明人： TAN, Michael Renne Ty , BINKERT, Nathan Lorenzo , JOUPPI, Norman Paul , MCLAREN, Moray , AHN, Jung Ho
IPC分类号： G02B6/35 , H04B10/12
CPC分类号： G02B6/43 , G02B6/351 , G02B6/3556 , G02B6/3596 , G02B6/3598
摘要： A circuit switched optical interconnection fabric (100) includes a first hollow metal waveguide (115) and a second hollow metal waveguide (120) which intersects the first hollow metal waveguide (115) to form an intersection (122). An optical element (125) within the intersection (122) is configured to selectively direct an optical signal between the first hollow metal waveguide (115) and a second hollow metal waveguide (120).
摘要翻译：电路交换光互连布线（100）包括与第一中空金属波导（115）相交以形成交点（122）的第一中空金属波导（115）和第二中空金属波导（120）。交叉点（122）内的光学元件（125）被配置为选择性地引导第一中空金属波导（115）和第二中空金属波导（120）之间的光信号。

6. 发明申请

WO2009134223A1 INTENTIONALLY SKEWED OPTICAL CLOCK SIGNAL DISTRIBUTION 审中-公开
标题翻译：有意思的光时钟信号分配
公开(公告)号：WO2009134223A1
公开(公告)日：2009-11-05
申请号：PCT/US2008/005575
申请日：2008-04-30
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. , JOUPPI, Norman P. , SCHREIBER, Robert S. , AHN, Jung Ho , BINKERT, Nathan, L.
发明人： JOUPPI, Norman P. , SCHREIBER, Robert S. , AHN, Jung Ho , BINKERT, Nathan, L.
IPC分类号： H04B10/02 , G02B6/10
CPC分类号： H04B10/1121 , G06F1/105
摘要： Embodiments of the present invention relate to systems and methods for distributing an intentionally skewed optical-clock signal to nodes of a source synchronous computer system. In one system embodiment, a source synchronous system comprises a waveguide, an optical-system clock optically coupled to the waveguide, and a number of nodes optically coupled to the waveguide. The optical-system clock generates and injects a master optical-clock signal into the waveguide. The master optical-clock signal acquiring a skew as it passes between nodes. Each node extracts a portion of the master optical-clock signal and processes optical signals using the portion of the master optical-clock signal having a different skew for the respective extracting node.
摘要翻译：本发明的实施例涉及将故意偏斜的光时钟信号分配给源同步计算机系统的节点的系统和方法。在一个系统实施例中，源同步系统包括波导，光学耦合到波导的光学系统时钟以及光耦合到波导的多个节点。光学系统时钟产生并将主光时钟信号注入到波导中。主光时钟信号在节点之间通过时获取偏斜。每个节点提取主光时钟信号的一部分，并使用对于相应提取节点具有不同偏斜的主光学时钟信号的部分来处理光信号。

7. 发明申请

WO2012008670A1 METHOD FOR SELECTING MATTRESS MODEL USING REGRESSION ANALYSIS 审中-公开
标题翻译：使用回归分析选择矩阵模型的方法
公开(公告)号：WO2012008670A1
公开(公告)日：2012-01-19
申请号：PCT/KR2011/000671
申请日：2011-01-31
申请人： SIMMONS-K.CO.,LTD , KIM, Jung Yong , AHN, Jung Ho , SHIN, Young Sung , MIN, Seung Nam , JEONG, Joo Hyun
发明人： KIM, Jung Yong , AHN, Jung Ho , SHIN, Young Sung , MIN, Seung Nam , JEONG, Joo Hyun
IPC分类号： G06F17/00 , G06F17/40 , G06F17/30
CPC分类号： G06Q30/06 , A47C31/123
摘要： The present invention relates to a method for selecting a mattress model to select and recommend an optimum mattress model according to body characteristics by using regression analysis. The method for selecting a mattress model by using regression analysis includes the steps of determining independent variables and dependent variable for making regression analysis from characteristic data of a plurality of users who belong to an experimental group, defining linear recursion relation for making correlation analysis between the independent variables and the dependent variable, producing coefficient values of the independent variables which are regression coefficient values of the linear recursion relation by using the user characteristic data of the plurality of users who belong to the experimental group, and substituting the user characteristic data of the plurality of users who belong to a control group for the independent variables in the linear recursion relation having the regression coefficient values applied thereto for producing a result of regression analysis for selecting the mattress model.
摘要翻译：本发明涉及一种选择床垫模型的方法，通过使用回归分析，根据身体特征选择和推荐最佳床垫模型。通过使用回归分析来选择床垫模型的方法包括以下步骤：确定独立变量和从属变量，用于从属于实验组的多个用户的特征数据进行回归分析，定义线性递归关系，以便在独立变量和因变量，通过使用属于实验组的多个用户的用户特征数据产生作为线性递归关系的回归系数值的独立变量的系数值，并且将用户特征数据替换为属于具有回归系数值的线性递归关系中的独立变量的对照组的多个用户，用于生成用于选择床垫模型的回归分析结果。

8. 发明申请

WO2011043774A1 TUNABLE RESONATORS 审中-公开
标题翻译：可调共振器
公开(公告)号：WO2011043774A1
公开(公告)日：2011-04-14
申请号：PCT/US2009/059964
申请日：2009-10-08
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. , BINKERT, Nathan Lorenzo , AHN, Jung Ho , FIORENTINO, Marco
发明人： BINKERT, Nathan Lorenzo , AHN, Jung Ho , FIORENTINO, Marco
IPC分类号： G02B6/12 , H01S3/083
CPC分类号： G02B6/29341 , G02F1/2257 , G02F2203/15
摘要： Various embodiments of the present invention relate to electronically tunable ring resonators. In one embodiment of the present invention, a resonator structure (300,1200) includes an inner resonator disposed on a surface of a substrate, and a phase-change layer (304,1204) covering the resonator. The resonance wavelength of the resonator structure can be selected by applying of a first voltage that changes the effective refractive index of the inner resonator and by applying of a second voltage that changes the effective refractive index of the phase-change layer.
摘要翻译：本发明的各种实施例涉及电子可调环形谐振器。在本发明的一个实施例中，谐振器结构（300,1200）包括设置在衬底的表面上的内谐振器和覆盖谐振器的相变层（304,1204）。可以通过施加改变内谐振器的有效折射率的第一电压和施加改变相变层的有效折射率的第二电压来选择谐振器结构的共振波长。

9. 发明申请

WO2009113977A1 OPTOELECTRONIC SWITCHES USING ON-CHIP OPTICAL WAVEGUIDES 审中-公开
标题翻译：使用片上光波导的光电开关
公开(公告)号：WO2009113977A1
公开(公告)日：2009-09-17
申请号：PCT/US2008/003244
申请日：2008-03-11
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. , MCLAREN, Moray , AHN, Jung Ho , BINKERT, Nathan L. , DAVIS, Alan L. , JOUPPI, Norman P.
发明人： MCLAREN, Moray , AHN, Jung Ho , BINKERT, Nathan L. , DAVIS, Alan L. , JOUPPI, Norman P.
IPC分类号： G02B6/12 , G02F1/313
CPC分类号： G02B6/12007 , G02B6/29338 , G02B6/35 , G02B6/3546 , G02B6/356 , G02F1/3137 , G02F1/3138 , G02F2201/17 , G02F2202/32 , G02F2203/15 , H04Q11/0005 , H04Q11/0066 , H04Q2011/0016 , H04Q2011/0035 , H04Q2011/0058
摘要： Embodiments of the present invention are directed to optoelectronic network switches. In one embodiment, an optoelectronic switch includes a set of roughly parallel input waveguides and a set of roughly parallel output waveguides positioned roughly perpendicular to the input waveguides. Each of the output waveguides crosses the set of input waveguides. The optoelectronic switch includes at least one switch element configured to switch one or more optical signals transmitted on one or more input waveguides onto one or more crossing output waveguides.
摘要翻译：本发明的实施例涉及光电网络交换机。在一个实施例中，光电开关包括一组大致平行的输入波导和大致垂直于输入波导定位的大致平行的输出波导组。每个输出波导穿过该组输入波导。光电开关包括至少一个开关元件，其被配置为将在一个或多个输入波导上传输的一个或多个光信号切换到一个或多个交叉输出波导上。

10. 发明申请

WO2010016818A1 INDEPENDENTLY CONTROLLED VIRTUAL MEMORY DEVICES IN MEMORY MODULES 审中-公开
标题翻译：内存模块中独立控制的虚拟内存设备
公开(公告)号：WO2010016818A1
公开(公告)日：2010-02-11
申请号：PCT/US2008/009523
申请日：2008-08-08
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. , AHN, Jung Ho , JOUPPI, Norman P. , LEVERICH, Jacob B.
发明人： AHN, Jung Ho , JOUPPI, Norman P. , LEVERICH, Jacob B.
IPC分类号： G11C8/00 , G06F12/08
CPC分类号： G06F12/06 , G06F13/1668 , G11C5/04 , G11C8/12 , Y02D10/13 , Y02D10/14
摘要： Various embodiments of the present invention are directed a multi-core memory modules. In one embodiment, a memory module (500) includes at least one virtual memory device and a demultiplexer register (502) disposed between the at least one virtual memory device and a memory controller. The demultiplexer register receives a command identifying one of the at least one virtual memory devices from the memory controller and sends the command to the identified virtual memory device. In addition, the at least one virtual memory devices include at least one memory chip.
摘要翻译：本发明的各种实施例涉及多核存储器模块。在一个实施例中，存储器模块（500）包括设置在至少一个虚拟存储器设备和存储器控制器之间的至少一个虚拟存储器设备和解复用器寄存器（502）。解复用器寄存器从存储器控制器接收识别至少一个虚拟存储器设备中的一个的命令，并将该命令发送到所识别的虚拟存储设备。另外，至少一个虚拟存储器设备包括至少一个存储器芯片。

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