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1. 发明申请

WO2015102899A1 TERNARY METAL NITRIDE FORMATION BY ANNEALING CONSTITUENT LAYERS 审中-公开
标题翻译：通过退火构成层形成第三金属氮化物
公开(公告)号：WO2015102899A1
公开(公告)日：2015-07-09
申请号：PCT/US2014/070781
申请日：2014-12-17
申请人： INTERMOLECULAR, INC.
发明人： TENDULKAR, Mihir
IPC分类号： H01L21/22
CPC分类号： C23C14/5806 , C23C14/0641 , C23C14/351 , C23C14/352 , H01L21/32051 , H01L21/76858 , H01L27/2409 , H01L45/08 , H01L45/085 , H01L45/12 , H01L45/1233 , H01L45/146 , H01L45/16 , H01L2924/1435
摘要： Ternary metal nitride layers suitable for thin-film resistors are fabricated by forming constituent layers of complementary components (e.g., binary nitrides of the different metals, or a binary nitride of one metal and a metallic form of the other metal), then annealing the constituent layers to interdiffuse the materials, thus forming the ternary metal nitride. The constituent layers (e.g., 2-5nm thick) may be sputtered from binary metal nitride targets, from metal targets in a nitrogen-containing ambient, or from metal targets in an inert ambient. Optionally, a nitrogen-containing ambient may also be used for the annealing. The annealing may be 10 seconds to 10 minutes at 500-1000°C and may also process another component on the same substrate (e.g., activate a diode).
摘要翻译：适用于薄膜电阻器的三元金属氮化物层通过形成互补部件的构成层（例如，不同金属的二元氮化物或一种金属的二元氮化物和另一种金属的金属形式）来制造，然后退火成分层以相互扩散材料，从而形成三元金属氮化物。可以从二元金属氮化物靶，来自含氮环境中的金属靶或者在惰性环境中的金属靶溅射构成层（例如2-5nm厚）。任选地，含氮环境也可用于退火。退火在500-1000℃可以为10秒至10分钟，并且还可以在同一基板上处理另一组分（例如，激活二极管）。

2. 发明申请

WO2014160439A1 ANISOTROPIC DIELECTRIC LAYERS WITH ORIENTATIONALLY MATCHED SUBSTRATE 审中-公开
标题翻译：具有定向匹配衬底的各向异性电介质层
公开(公告)号：WO2014160439A1
公开(公告)日：2014-10-02
申请号：PCT/US2014/026621
申请日：2014-03-13
申请人： INTERMOLECULAR, INC.
发明人： BARABASH, Sergey , PRAMANIK, Dipankar
IPC分类号： H01L29/92 , H01L21/00 , H01L21/20 , H01L21/8242
CPC分类号： H01L28/60 , H01L21/02156 , H01L21/02186 , H01L21/02356 , H01L21/28088 , H01L21/28229 , H01L27/1085 , H01L2924/0134 , H01L2924/0533 , H01L2924/05341 , H01L2924/10671
摘要： A dielectric layer can achieve a crystallography orientation similar to a base dielectric layer with a conductive layer disposed between the two dielectric layers. By providing a conductive layer having similar crystal structure and lattice parameters with the base dielectric layer, the crystallography orientation can be carried from the base dielectric layer, across the conductive layer to affect the dielectric layer. The process can be used to form capacitor structure for anisotropic dielectric materials, along the direction of high dielectric constant.
摘要翻译：电介质层可以实现类似于具有设置在两个电介质层之间的导电层的基极电介质层的结晶取向。通过提供具有与基底电介质层相似的晶体结构和晶格参数的导电层，晶体取向可以从基底电介质层穿过导电层承载，以影响电介质层。该方法可以用于形成各向异性介电材料的电容器结构，沿着高介电常数的方向。

3. 发明申请

WO2014150985A1 METAL ALUMINUM NITRIDE EMBEDDED RESISTORS FOR RESISTIVE RANDOM MEMORY ACCESS CELLS 审中-公开
标题翻译：用于电阻随机存储器访问电池的金属氮化物嵌入式电阻器
公开(公告)号：WO2014150985A1
公开(公告)日：2014-09-25
申请号：PCT/US2014/024707
申请日：2014-03-12
申请人： KABUSHIKI KAISHA TOSHIBA , SANDISK 3D LLC , INTERMOLECULAR, INC.
发明人： TENDULKAR, Mihir , HIGUCHI, Randall , HSUEH, Chien-Lan
IPC分类号： H01L45/00 , H01L27/24
CPC分类号： H01L45/165 , H01L27/2409 , H01L45/08 , H01L45/1233 , H01L45/1266 , H01L45/146 , H01L45/147 , H01L45/1616 , H01L45/1625
摘要： Provided are resistive random access memory (ReRAM) cells and methods of fabricating thereof. A ReRAM cell includes an embedded resistor and resistive switching layer connected in series. The embedded resistor prevents excessive electrical currents through the resistive switching layer, especially when the resistive switching layer is switched into its low resistive state, thereby preventing over-programming. The embedded resistor includes aluminum, nitrogen, and one or more additional metals (other than aluminum). The concentration of each component is controlled to achieve desired resistivity and stability of the embedded resistor. In some embodiments, the resistivity ranges from 0.1 Ohm-centimeter to 40 Ohm- centimeter and remains substantially constant while applying an electrical field of up 8 mega-Volts /centimeter to the embedded resistor. The embedded resistor may be made from an amorphous material, and the material is operable to remain amorphous even when subjected to typical annealing conditions.
摘要翻译：提供了电阻随机存取存储器（ReRAM）单元及其制造方法。 ReRAM单元包括串联连接的嵌入式电阻和电阻开关层。嵌入式电阻器阻止通过电阻开关层的过多电流，特别是当电阻式开关层切换到其低电阻状态时，从而防止过度编程。嵌入式电阻器包括铝，氮和一种或多种另外的金属（除铝以外）。控制每个组分的浓度以实现嵌入式电阻器的期望的电阻率和稳定性。在一些实施例中，电阻率范围为0.1欧姆至40欧姆厘米，并且在施加高达8兆伏特/厘米的电场到嵌入式电阻器时保持基本恒定。嵌入式电阻器可以由非晶材料制成，并且即使经受典型的退火条件，该材料也可操作以保持非晶态。

4. 发明申请

WO2013177557A3 METHODS OF ATOMIC LAYER DEPOSITION OF HAFNIUM OXIDE AS GATE DIELECTRICS 审中-公开
公开(公告)号：WO2013177557A3
公开(公告)日：2013-11-28
申请号：PCT/US2013/042728
申请日：2013-05-24
申请人： INTERMOLECULAR, INC
发明人： TONG, Jinhong
IPC分类号： H01L21/31
摘要： In some embodiments, the present invention discloses a two-step deposition process for forming hafnium oxide gate dielectric, comprising an interface layer deposition followed by a bulk layer deposition. In the interface layer deposition process, water is used as an oxidizer precursor together with a hafnium-containing precursor. In the bulk layer deposition process, oxygen or ozone is used as an oxidizer precursor together with a hafnium-containing precursor.

5. 发明申请

WO2013089940A1 NONVOLATILE RESISTIVE MEMORY ELEMENT WITH A METAL NITRIDE CONTAINING SWITCHING LAYER 审中-公开
标题翻译：带有金属氮化物的非易失性电阻记忆元件包含切换层
公开(公告)号：WO2013089940A1
公开(公告)日：2013-06-20
申请号：PCT/US2012/063513
申请日：2012-11-05
申请人： INTERMOLECULAR, INC. , KABUSHIKI KAISHA TOSHIBA , SANDISK 3D LLC
发明人： WANG, Yun , CHIANG, Tony P. , HASHIM, Imran , MINVIELLE, Tim , YAMAGUCHI, Takeshi
IPC分类号： H01L47/02 , H01L49/02 , H01L29/94
CPC分类号： H01L45/145 , B82Y10/00 , H01L27/2409 , H01L27/2463 , H01L45/10 , H01L45/1233 , H01L45/147 , H01L45/1608
摘要： A nonvolatile resistive memory element has a novel variable resistance layer that includes a metal nitride, a metal oxide-nitride, a two-metal oxide-nitride, or a multilayer stack thereof. One method of forming the novel variable resistance layer comprises an interlayer deposition procedure, in which metal oxide layers are interspersed with metal nitride layers and then converted into a substantially homogeneous layer by an anneal process. Another method of forming the novel variable resistance layer comprises an intralayer deposition procedure, in which various ALD processes are sequentially interleaved to form a metal oxide-nitride layer. Alternatively, a metal oxide is deposited, nitridized, and annealed to form the variable resistance layer or a metal nitride is deposited, oxidized, and annealed to form the variable resistance layer.
摘要翻译：非易失性电阻存储元件具有新颖的可变电阻层，其包括金属氮化物，金属氧化物氮化物，二金属氧化物氮化物或其多层叠层。形成新颖的可变电阻层的一种方法包括层间沉积程序，其中金属氧化物层散布有金属氮化物层，然后通过退火工艺转变成基本均匀的层。形成新型可变电阻层的另一种方法包括层间沉积程序，其中各种ALD工艺顺序交错以形成金属氧化物 - 氮化物层。或者，金属氧化物被沉积，氮化和退火以形成可变电阻层，或者金属氮化物被沉积，氧化和退火以形成可变电阻层。

6. 发明申请

WO2013070437A1 ADSORPTION SITE BLOCKING METHOD FOR CO-DOPING ALD FILMS 审中-公开
标题翻译：用于混合ALD膜的吸附位点阻断方法
公开(公告)号：WO2013070437A1
公开(公告)日：2013-05-16
申请号：PCT/US2012/061731
申请日：2012-10-24
申请人： INTERMOLECULAR, INC. , ELPIDA MEMORY, INC.
发明人： MALHOTRA, Sandra , CHEN, Hanhong , DEWEERD, Wim , HIROTA, Toshiyuki , ODE, Hiroyuki
IPC分类号： H01L21/31
CPC分类号： H01L28/60 , C23C16/45534 , H01L21/02175 , H01L21/02178 , H01L21/02186 , H01L21/02189 , H01L21/02194 , H01L21/0228 , H01L27/10852 , H01L28/40 , H01L28/56 , H01L29/4234
摘要： A method for doping a dielectric material by pulsing a first dopant precursor, purging the non-adsorbed precursor, pulsing a second precursor, purging the non-adsorbed precursor, and pulsing a oxidant to form an intermixed layer of two (or more) metal oxide dielectric dopant materials. The method may also be used to form a blocking layer between a bulk dielectric layer and a second electrode layer. The method improves the control of the composition and the control of the uniformity of the dopants throughout the thickness of the doped dielectric material.
摘要翻译：一种用于通过脉冲第一掺杂剂前体掺杂电介质材料的方法，清洗未吸附的前体，脉冲第二前体，净化未吸附的前体，以及脉冲氧化剂以形成两个（或多个）金属氧化物的混合层电介质掺杂剂材料。该方法还可用于在体电介质层和第二电极层之间形成阻挡层。该方法改善了组合物的控制和掺杂介质材料整个厚度均匀性的控制。

7. 发明申请

WO2014159653A1 IMPROVED HIGH SOLAR GAIN LOW-E PANEL AND METHOD FOR FORMING THE SAME 审中-公开
标题翻译：改进的高太阳能增益面板及其形成方法
公开(公告)号：WO2014159653A1
公开(公告)日：2014-10-02
申请号：PCT/US2014/024590
申请日：2014-03-12
申请人： INTERMOLECULAR, INC
发明人： DING, Guowen , CHENG, Jeremy , LE, Minh Huu , SCHWEIGERT, Daniel , SUN, Zhi-Wen , ZHANG, Guizhen
IPC分类号： B32B17/06
CPC分类号： G02B5/208 , C03C17/36 , C03C17/3644 , C03C17/366 , G02B5/281
摘要： Embodiments provided herein describe low-e panels and methods for forming low-e panels. A transparent substrate is provided. A reflective layer is formed above the transparent substrate. An over-coating layer is formed above the reflective layer. The over-coating layer includes first, second, and third sub-layers. The second sub-layer is between the first and third sub-layers, and the first and third sub-layers include the same material
摘要翻译：本文提供的实施例描述了用于形成低e板的低e板和方法。提供透明基板。在透明基板的上方形成反射层。在反射层上方形成覆盖层。覆盖层包括第一，第二和第三子层。第二子层位于第一和第三子层之间，第一和第三子层包括相同的材料

8. 发明申请

WO2014143618A1 ANTI-GLARE COATINGS WITH AQUEOUS PARTICLE DISPERSIONS 审中-公开
标题翻译：具有水性颗粒分散剂的防水涂层
公开(公告)号：WO2014143618A1
公开(公告)日：2014-09-18
申请号：PCT/US2014/023707
申请日：2014-03-11
申请人： INTERMOLECULAR, INC
发明人： JEWHURST, Scott , KALYANKAR, Nikhil
IPC分类号： B05D5/06 , B32B5/16 , B32B17/06
CPC分类号： G02B1/113 , C09D5/006 , C09D7/63 , G02B1/12 , G02B5/0294 , G02B2207/107 , G02B2207/109 , Y10T428/25 , Y10T428/259
摘要： Embodiments provided herein describe optical coatings, panels having optical coatings thereon, and methods for forming optical coatings and panels. A substrate is provided. A coating formulation is applied to the substrate. The coating formulation includes an aqueous-based suspension of particles. The particles have a sheet-like morphology and a thickness of less than about 100 nanometers (nm). The coating formulation is cured to form an anti-glare coating above the substrate. The anti-glare coating has a thickness of between 1 micrometer (μm) and 100 μm.
摘要翻译：本文提供的实施方案描述了光学涂层，其上具有光学涂层的面板，以及用于形成光学涂层和面板的方法。提供基板。将涂料制剂施用于基材。涂层制剂包括颗粒的水性悬浮液。颗粒具有片状形态和小于约100纳米（nm）的厚度。固化涂料配方以在基材上形成防眩涂层。抗眩光涂层的厚度为1微米（μm）至100μm。

9. 发明申请

WO2014110341A1 RESISTIVE RANDOM ACCESS MEMORY CELLS HAVING VARIABLE SWITCHING CHARACTERISTICS 审中-公开
标题翻译：具有可变开关特性的电阻随机存取存储器
公开(公告)号：WO2014110341A1
公开(公告)日：2014-07-17
申请号：PCT/US2014/010999
申请日：2014-01-10
申请人： INTERMOLECULAR, INC. , KABUSHIKI KAISHA TOSHIBA , SANDISK 3D LLC
发明人： NARDI, Federico , WANG, Yun
IPC分类号： G11C11/00
CPC分类号： G11C13/0007 , G11C13/0069 , G11C2013/0083 , G11C2213/12 , G11C2213/15 , G11C2213/52 , G11C2213/71 , H01L27/2463 , H01L27/2481 , H01L45/06 , H01L45/08 , H01L45/085 , H01L45/1233 , H01L45/145 , H01L45/146 , H01L45/147 , H01L45/149
摘要： Provided are resistive random access memory (ReRAM) cells forming arrays and methods of operating such cells and arrays. The ReRAM cells of the same array may have the same structure, such as have the same bottom electrodes, top electrodes, and resistive switching layers. Yet, these cells may be operated in a different manner. For example, some ReRAM cells may be restively switched using lower switching voltages than other cells. The cells may also have different data retention characteristics. These differences may be achieved by using different forming operations for different cells or, more specifically, flowing forming currents in different directions for different cells. The resulting conductive paths formed within the resistive switching layers are believed to switch at or near different electrode interfaces, i.e., within a so called switching zone. In some embodiments, a switching zone of a ReRAM cell may be changed even after the initial formation.
摘要翻译：提供形成阵列的电阻随机存取存储器（ReRAM）单元和操作这样的单元和阵列的方法。相同阵列的ReRAM单元可以具有相同的结构，例如具有相同的底部电极，顶部电极和电阻式开关层。然而，这些电池可以以不同的方式操作。例如，可以使用比其他单元更低的开关电压来重新切换一些ReRAM单元。细胞也可能具有不同的数据保留特征。这些差异可以通过对于不同的单元使用不同的成形操作来实现，或者更具体地，针对不同的单元流动形成不同方向的电流。形成在电阻开关层内的所得导电路径被认为在不同的电极接口处，即在所谓的开关区域内或附近切换。在一些实施例中，即使在初始形成之后，ReRAM单元的切换区也可能改变。

10. 发明申请

WO2014093766A1 IMPROVED SILVER BASED CONDUCTIVE LAYER FOR FLEXIBLE ELECTRONICS 审中-公开
标题翻译：用于柔性电子的改进的基于银的导电层
公开(公告)号：WO2014093766A1
公开(公告)日：2014-06-19
申请号：PCT/US2013/074910
申请日：2013-12-13
申请人： INTERMOLECULAR, INC
发明人： HASSAN, Mohd , DING, Guowen , LE, Minh Huu , NGUYEN, Minh Anh , SUN, Zhi-Wen , ZHANG, Guizhen
IPC分类号： B05D5/12
CPC分类号： H05K1/092 , C23C28/42 , C23C30/00 , H01L51/0097 , H01L51/5234 , H05K1/0274 , Y10T428/265
摘要： Methods for making conducting stacks includes forming a doped or alloyed silver layer sandwiched between two layers of transparent conductive oxide such as indium tin oxide (ITO). The doped silver or silver alloy layer can be thin, such as between 1. 5 to 20 nm and thus can be transparent. The doped silver or silver alloy can provide improved ductility property, allowing the conductive stack to be bendable. The transparent conductive oxide layers can also be thin, allowing the conductive stack can have improved ductility property.
摘要翻译：制造导电叠层的方法包括形成夹在两层透明导电氧化物（例如氧化铟锡（ITO））之间的掺杂或合金化的银层。掺杂的银或银合金层可以是薄的，例如在1.5至20nm之间，因此可以是透明的。掺杂的银或银合金可以提供改善的延展性，允许导电叠层可弯曲。透明导电氧化物层也可以是薄的，使得导电叠层可以具有改善的延展性。

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