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1. 发明申请

US20150318369A1 CONDUCTIVE NANOPARTICLES 有权
公开(公告)号：US20150318369A1
公开(公告)日：2015-11-05
申请号：US14754211
申请日：2015-06-29
申请人： Micron Technology, Inc.
发明人： Brenda D. Kraus , Eugene P. Marsh
IPC分类号： H01L29/423 , H01L21/285 , H01L21/28
CPC分类号： H01L29/42332 , B82Y10/00 , B82Y30/00 , H01L21/28273 , H01L21/28556 , H01L29/7881 , Y10S438/964 , Y10S977/943
摘要： Isolated conductive nanoparticles on a dielectric layer and methods of fabricating such isolated conductive nanoparticles provide charge storage units in electronic structures for use in a wide range of electronic devices and systems. The isolated conductive nanoparticles may be used as a floating gate in a flash memory. In an embodiment, conductive nanoparticles are deposited on a dielectric layer by a plasma-assisted deposition process such that each conductive nanoparticle is isolated from the other conductive nanoparticles to configure the conductive nanoparticles as charge storage elements.

2. 发明申请

US20100047945A1 Methods Of Forming Particle-Containing Materials 有权
标题翻译：形成含粒子材料的方法
公开(公告)号：US20100047945A1
公开(公告)日：2010-02-25
申请号：US12608596
申请日：2009-10-29
申请人： Garo J. Derderian , Gurtej S. Sandhu
发明人： Garo J. Derderian , Gurtej S. Sandhu
IPC分类号： H01L21/30 , H01L21/3205 , H01L21/31
CPC分类号： H01L21/76838 , C23C16/45525 , C23C16/45555 , H01L21/02126 , H01L21/02164 , H01L21/0226 , H01L21/0228 , H01L21/288 , H01L21/3141 , H01L21/3146 , H01L21/31608 , H01L21/31633 , H01L21/76829 , H01L21/76837 , Y10S438/962 , Y10S438/964 , Y10T428/12493 , Y10T428/12528 , Y10T428/12576 , Y10T428/12806 , Y10T428/1284
摘要： The invention includes methods of forming particle-containing materials, and also includes semiconductor constructions comprising particle-containing materials. One aspect of the invention includes a method in which a first monolayer is formed across at least a portion of a semiconductor substrate, particles are adhered to the first monolayer, and a second monolayer is formed over the particles. Another aspect of the invention includes a construction containing a semiconductor substrate and a particle-impregnated conductive material over at least a portion of the semiconductor substrate. The particle-impregnated conductive material can include tungsten-containing particles within a layer which includes tantalum or tungsten.
摘要翻译：本发明包括形成含颗粒材料的方法，还包括包含含颗粒的材料的半导体结构。本发明的一个方面包括一种方法，其中在半导体衬底的至少一部分上形成第一单层，颗粒粘附到第一单层，并且在颗粒上方形成第二单层。本发明的另一方面包括在半导体衬底的至少一部分上包含半导体衬底和含有颗粒的导电材料的结构。颗粒浸渍的导电材料可以包括在包括钽或钨的层内的含钨颗粒。

3. 发明申请

US20100025715A1 Ultra Dark Polymer 有权
标题翻译：超黑胶
公开(公告)号：US20100025715A1
公开(公告)日：2010-02-04
申请号：US12575670
申请日：2009-10-08
申请人： Jason Michael Neidrich
发明人： Jason Michael Neidrich
IPC分类号： H01L33/00 , C08L79/08
CPC分类号： G02B1/111 , G02B26/0833 , Y10S430/151 , Y10S430/162 , Y10S438/952 , Y10S438/964
摘要： A method and a material for creating an antireflective coating on an integrated circuit. A preferred embodiment comprises applying a dark polymer material on a reflective surface, curing the dark polymer material, and roughening a top surface of the dark polymer material. The roughening can be achieved by ashing the dark polymer material in an ash chamber. The dark polymer material, preferably a black matrix resin or a polyimide black matrix resin, when ashed in an oxygen rich atmosphere for a short period of time, forms a surface that is capable of absorbing light as well as randomly refracting light it does not absorb. A protective cap layer may be formed on top of the ashed dark polymer material to provide protection for the dark polymer material.
摘要翻译：一种用于在集成电路上产生抗反射涂层的方法和材料。优选的实施方案包括在反射表面上施加深色聚合物材料，固化黑色聚合物材料，以及粗糙化深色聚合物材料的顶表面。粗化可以通过在灰室中灰化黑色聚合物材料来实现。黑色聚合物材料，优选黑色矩阵树脂或聚酰亚胺黑色矩阵树脂，当在富氧气氛中短时间灰化时，形成能够吸收光的表面以及不吸收光的随机折射光。可以在灰色深色聚合物材料的顶部上形成保护盖层，以保护黑色聚合物材料。

4. 发明申请

US20090311874A1 METHOD OF TREATING SURFACE OF SEMICONDUCTOR SUBSTRATE 有权
标题翻译：处理半导体衬底表面的方法
公开(公告)号：US20090311874A1
公开(公告)日：2009-12-17
申请号：US12257493
申请日：2008-10-24
申请人： Hiroshi Tomita , Hiroyasu Iimori , Hisashi Okuchi , Tatsuhiko Koide , Linan Ji
发明人： Hiroshi Tomita , Hiroyasu Iimori , Hisashi Okuchi , Tatsuhiko Koide , Linan Ji
IPC分类号： H01L21/31
CPC分类号： H01L21/02057 , H01L21/0206 , H01L21/02071 , H01L21/02101 , H01L21/3086 , H01L21/31133 , H01L21/32139 , Y10S134/902 , Y10S438/906 , Y10S438/964
摘要： A method of treating the surface of a semiconductor substrate has cleaning the semiconductor substrate having a pattern formed thereon by using a chemical solution, removing the chemical solution by using pure water, forming a water repellent protective film on the surface of the semiconductor substrate, rinsing the semiconductor substrate by using pure water, and drying the semiconductor substrate.
摘要翻译：处理半导体基板的表面的方法通过使用化学溶液清洗具有形成在其上的图案的半导体基板，通过使用纯水去除化学溶液，在半导体基板的表面上形成防水保护膜，冲洗通过使用纯水对半导体衬底进行干燥，并干燥半导体衬底。

5. 发明申请

US20090302371A1 CONDUCTIVE NANOPARTICLES 审中-公开
标题翻译：导电纳米粒子
公开(公告)号：US20090302371A1
公开(公告)日：2009-12-10
申请号：US12542423
申请日：2009-08-17
申请人： Brenda D. Kraus , Eugene P. Marsh
发明人： Brenda D. Kraus , Eugene P. Marsh
IPC分类号： H01L29/792 , H01L21/336
CPC分类号： H01L29/42332 , B82Y10/00 , B82Y30/00 , H01L21/28556 , H01L29/40114 , H01L29/7881 , Y10S438/964 , Y10S977/943
摘要： Isolated conductive nanoparticles on a dielectric layer and methods of fabricating such isolated conductive nanoparticles provide charge storage units in electronic structures for use in a wide range of electronic devices and systems. The isolated conductive nanoparticles may be used as a floating gate in a flash memory. In an embodiment, conductive nanoparticles are deposited on a dielectric layer by a plasma-assisted deposition process such that each conductive nanoparticle is isolated from the other conductive nanoparticles to configure the conductive nanoparticles as charge storage elements.
摘要翻译：电介质层上的隔离导电纳米颗粒和制造这种隔离导电纳米颗粒的方法提供电子结构中的电荷存储单元，用于广泛的电子设备和系统。隔离的导电纳米颗粒可以用作闪存中的浮动栅极。在一个实施例中，通过等离子体辅助沉积工艺将导电纳米颗粒沉积在电介质层上，使得每个导电纳米颗粒与其它导电纳米颗粒分离，以将导电纳米颗粒配置为电荷存储元件。

6. 发明申请

US20090233399A1 METHOD OF MANUFACTURING PHOTOELECTRIC DEVICE 失效
标题翻译：制造光电器件的方法
公开(公告)号：US20090233399A1
公开(公告)日：2009-09-17
申请号：US12400674
申请日：2009-03-09
申请人： Seung-Jae Jung , Byoung-June Kim , Jin-Seock Kim , Czang-Ho Lee , Myung-Hun Shin , Joon-Young Seo , Dong-Uk Choi , Byoung-Kyu Lee
发明人： Seung-Jae Jung , Byoung-June Kim , Jin-Seock Kim , Czang-Ho Lee , Myung-Hun Shin , Joon-Young Seo , Dong-Uk Choi , Byoung-Kyu Lee
IPC分类号： H01L31/18
CPC分类号： H01L31/02366 , H01L31/022483 , H01L31/046 , H01L31/1888 , Y02E10/50 , Y10S438/964
摘要： In a method of manufacturing a photoelectric device, a transparent conductive layer is formed on a substrate, and the transparent conductive layer is partially etched using an etching solution including hydrofluoric acid. Thus, a transparent electrode having a concavo-convex pattern on its surface is formed. When the transparent conductive layer is partially etched, a haze of the transparent electrode may be controlled by adjusting an etching time of the transparent conductive layer. Also, since the etching solution is sprayed to the transparent conductive layer to etch the transparent conductive layer, the concavo-convex pattern on the surface of the transparent electrode may be easily formed even though the size of the substrate increases.
摘要翻译：在制造光电器件的方法中，在衬底上形成透明导电层，并且使用包括氢氟酸的蚀刻溶液部分蚀刻透明导电层。因此，形成在其表面具有凹凸图案的透明电极。当透明导电层被部分蚀刻时，可以通过调节透明导电层的蚀刻时间来控制透明电极的雾度。此外，由于将蚀刻溶液喷射到透明导电层以蚀刻透明导电层，所以即使基板的尺寸增加，也可以容易地形成透明电极表面上的凹凸图案。

7. 发明授权

US07501332B2 Doping method and manufacturing method for a semiconductor device 有权
标题翻译：掺杂方法和半导体器件的制造方法
公开(公告)号：US07501332B2
公开(公告)日：2009-03-10
申请号：US11097259
申请日：2005-04-04
申请人： Takayuki Ito , Kyoichi Suguro
发明人： Takayuki Ito , Kyoichi Suguro
IPC分类号： H01L21/425
CPC分类号： H01L21/2236 , H01L21/823814 , Y10S438/918 , Y10S438/964
摘要： A doping method includes implanting first impurity ions into a semiconductor substrate, so as to form a damaged region in the vicinity of a surface of the semiconductor substrate, the first impurity ions not contributing to electric conductivity; implanting second impurity ions into the semiconductor substrate through the damaged region, the second impurity ions having an atomic weight larger than the first impurity ions and contributing to the electric conductivity; and heating the surface of the semiconductor substrate with a light having a pulse width of about 0.1 ms to about 100 ms, so as to activate the second impurity ions.
摘要翻译：掺杂方法包括将第一杂质离子注入到半导体衬底中，以在半导体衬底的表面附近形成损伤区域，不对导电性有贡献的第一杂质离子; 通过损伤区域将第二杂质离子注入到半导体衬底中，第二杂质离子的原子量大于第一杂质离子并有助于导电性; 并用脉冲宽度为约0.1ms至约100ms的光来加热半导体衬底的表面，以激活第二杂质离子。

8. 发明申请

US20080284034A1 Method of reducing the surface roughness of spin coated polymer films 有权
标题翻译：降低旋涂聚合物膜表面粗糙度的方法
公开(公告)号：US20080284034A1
公开(公告)日：2008-11-20
申请号：US12215622
申请日：2008-06-27
申请人： Michael J. Leeson , Ebrahim Andideh
发明人： Michael J. Leeson , Ebrahim Andideh
IPC分类号： H01L23/48
CPC分类号： H01L21/0212 , H01L21/02282 , H01L21/31053 , H01L21/31058 , H01L21/3127 , H01L21/76801 , Y10S438/964
摘要： According to one aspect of the invention, a method of constructing a memory array is provided. An insulating layer is formed on a semiconductor wafer. A first metal stack is then formed on the insulating layer and etched to form first metal lines. A polymeric layer is formed over the first metal lines and the insulating layer. A puddle of smoothing solvent is then allowed to stand on the wafer. The smoothing solvent is then removed. After the smoothing solvent is removed, the polymeric layer has a reduced surface roughness. A second metal stack is then formed on the polymeric layer and etched to form second metal lines.
摘要翻译：根据本发明的一个方面，提供了一种构造存储器阵列的方法。在半导体晶片上形成绝缘层。然后在绝缘层上形成第一金属叠层并蚀刻以形成第一金属线。在第一金属线和绝缘层之上形成聚合物层。然后将平滑溶剂的水坑放置在晶片上。然后除去平滑溶剂。在除去平滑溶剂后，聚合物层的表面粗糙度降低。然后在聚合物层上形成第二金属叠层并蚀刻以形成第二金属线。

9. 发明申请

US20070034965A1 CMOS Image Sensor Having Drive Transistor with Increased Gate Surface Area and Method of Manufacturing the Same 有权
标题翻译：具有驱动晶体管的CMOS图像传感器具有增加的栅极表面积及其制造方法
公开(公告)号：US20070034965A1
公开(公告)日：2007-02-15
申请号：US11463317
申请日：2006-08-09
申请人： Jong-wan Jung , Duck-hyung Lee
发明人： Jong-wan Jung , Duck-hyung Lee
IPC分类号： H01L29/94 , H01L29/76 , H01L31/00
CPC分类号： H01L27/14689 , H01L27/14603 , H01L27/14609 , H01L27/14643 , Y10S438/964
摘要： A CMOS image sensor cell includes a semiconductor active region of first conductivity type having a surface thereon and a P-N junction photodiode in the active region. A drive transistor is also provided in the semiconductor active region. The drive transistor has a gate electrode that is configured to receive charge generated in the P-N junction photodiode during an image capture operation (i.e., during capture of photons received from an image). This drive transistor has a gate electrode and a contoured channel region extending underneath the gate electrode. The contoured channel region has an effective channel length greater than a length of the gate electrode.
摘要翻译： CMOS图像传感器单元包括在其上具有表面的第一导电类型的半导体有源区和有源区中的P-N结型光电二极管。驱动晶体管也设置在半导体有源区中。驱动晶体管具有被配置为在图像捕获操作期间（即在从图像接收的光子捕获期间）接收在P-N结光电二极管中产生的电荷的栅电极。该驱动晶体管具有栅电极和延伸在栅电极下方的波导沟道区。轮廓通道区域具有大于栅电极的长度的有效通道长度。

10. 发明申请

US20060252201A1 Capacitor constructions 失效
标题翻译：电容器结构
公开(公告)号：US20060252201A1
公开(公告)日：2006-11-09
申请号：US11485926
申请日：2006-07-12
申请人： Marsela Pontoh , Cem Basceri , Thomas Graettinger
发明人： Marsela Pontoh , Cem Basceri , Thomas Graettinger
IPC分类号： H01L21/8242
CPC分类号： H01L28/84 , H01L27/10817 , H01L27/10852 , H01L27/10855 , H01L28/82 , H01L28/91 , Y10S438/964
摘要： The invention includes methods of forming rugged electrically conductive surfaces. In one method, a layer is formed across a substrate and subsequently at least partially dissociated to form gaps extending to the substrate. An electrically conductive surface is formed to extend across the at least partially dissociated layer and within the gaps. The electrically conductive surface has a rugged topography imparted by the at least partially dissociated layer and the gaps. The topographically rugged surface can be incorporated into capacitor constructions. The capacitor constructions can be incorporated into DRAM cells, and such DRAM cells can be incorporated into electrical systems.
摘要翻译：本发明包括形成坚固的导电表面的方法。在一种方法中，跨越衬底形成层，并且随后至少部分地解离以形成延伸到衬底的间隙。形成导电表面以跨越至少部分解离的层并且在间隙内延伸。导电表面具有由至少部分解离的层和间隙赋予的粗糙的形貌。地形坚固的表面可以结合到电容器结构中。电容器结构可以并入DRAM单元中，并且这样的DRAM单元可以被并入到电气系统中。

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