专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08213792B2 Automatic ONT self disabling system, method, and computer readable medium 有权
标题翻译：自动ONT自动禁用系统，方法和计算机可读介质
公开(公告)号：US08213792B2
公开(公告)日：2012-07-03
申请号：US11940377
申请日：2007-11-15
申请人： Raymond E. Tyrrell , Collins Williams , John P. Mathew , David Hansen
发明人： Raymond E. Tyrrell , Collins Williams , John P. Mathew , David Hansen
IPC分类号： H04B10/08 , H04J14/00
CPC分类号： H04J3/14 , H04J3/0682 , H04J2203/006 , H04J2203/0062
摘要： A system, method and computer readable medium comprising instructions for sending a message from an Optical Network Terminal (ONT) to an Optical Line Terminal (OLT), if the ONT does not receive an expected OLT action or an expected OLT response to the message within a period, considering the non-receipt of the expected OLT action or the expected OLT response a failure, and if a certain number of consecutive failures have occurred, considering by the ONT that it has entered an uncontrolled state.
摘要翻译：一种系统，方法和计算机可读介质，包括如果ONT没有接收到期望的OLT动作或对该消息的期望的OLT响应，则将指示从光网络终端（ONT）发送到光线路终端（OLT）考虑未预期的OLT动作或预期的OLT响应失败，并且如果发生了一定数量的连续故障，则由ONT考虑已经进入不受控状态。

2. 发明授权

US5014268A Parallel time slot interchanger matrix and switch block module for use therewith 失效
标题翻译：并行时隙交换矩阵和切换块模块
公开(公告)号：US5014268A
公开(公告)日：1991-05-07
申请号：US295887
申请日：1989-01-11
申请人： Raymond E. Tyrrell , Milton R. Briscoe , Joseph E. Sutherland , Raymond E. Tyrrell
发明人： Raymond E. Tyrrell , Milton R. Briscoe , Joseph E. Sutherland , Raymond E. Tyrrell
IPC分类号： H04Q3/52 , H04Q11/04 , H04Q11/08
CPC分类号： H04Q11/08
摘要： A parallel time slot interchanger, particularly for use in telecommunication switching, comprises a plurality of switch groups, with each switch group containing a second plurality of channels. The parallel time slot interchanger incroporated a matrix-type architecture, with each module of the matrix comprising a switch block which in turn incorporates a switch memory, connect memory and associated control circuitry. The connect memory of each switch block is controlled by the control circuitry of that block. The data stored in the connect memory contains switch memory address information for reading channel data stored within the switch memory of the same switch block so as to be able to perform a time slot switching function during any given time slot of the parallel time slot interchanger. Each switch block is uniquely identified within its corresponding switch group so that only one switch memory address location is read and output during any time slot for each switch group.

3. 发明授权

US5060229A Serial transport frame format method 失效
标题翻译：串行传输帧格式方法
公开(公告)号：US5060229A
公开(公告)日：1991-10-22
申请号：US351458
申请日：1989-05-12
申请人： Raymond E. Tyrrell , Stephen C. Dunning , Richard J. Sanders, Jr. , Claude M. Hurlocker , Michael J. Gingell , Jeffrey P. Jones
发明人： Raymond E. Tyrrell , Stephen C. Dunning , Richard J. Sanders, Jr. , Claude M. Hurlocker , Michael J. Gingell , Jeffrey P. Jones
IPC分类号： H04J3/12 , H04J3/16
CPC分类号： H04J3/1611 , H04J3/12
摘要： A serial transport frame format is described which transfers data between two locations. The serial transport frame format comprises a fixed number of channels per frame, each channel having a predetermined size. One channel per frame contains frame synchronization information and each channel which conveys data, contains a first portion for the transfer of data and a second portion which contains associated control information.
摘要翻译：描述了在两个位置之间传送数据的串行传输帧格式。串行传输帧格式包括每帧固定数量的信道，每个信道具有预定的大小。每帧一个通道包含帧同步信息，并且传送数据的每个通道包含用于传送数据的第一部分和包含关联控制信息的第二部分。

4. 发明授权

US4586189A Asynchronous to synchronous data interface 失效
标题翻译：异步到同步数据接口
公开(公告)号：US4586189A
公开(公告)日：1986-04-29
申请号：US580905
申请日：1984-02-16
申请人： Raymond E. Tyrrell
发明人： Raymond E. Tyrrell
IPC分类号： H04L5/24 , H04L25/05 , H04L25/38
CPC分类号： H04L5/24 , H04L25/05
摘要： A generalized data interface for transmission of asynchronous data from a transmitting terminal to a receiving terminal at a different transmission rate is described. In accordance with the present invention, the high data transmission rates normally associated with synchronous transmission are achievable between asynchronous data terminals using novel asynchronous to synchronous and synchronous to asynchronous converters.
摘要翻译：描述用于以不同传输速率从异步数据传输到接收终端的通用数据接口。根据本发明，通过与异步转换器异步同步和异步同步的异步数据终端之间可实现通常与同步传输相关的高数据传输速率。

5. 发明授权

US5185736A Synchronous optical transmission system 失效
标题翻译：同步光传输系统
公开(公告)号：US5185736A
公开(公告)日：1993-02-09
申请号：US351861
申请日：1989-05-12
申请人： Raymond E. Tyrrell , O. Lamar Bishop , William E. Powell , Dale L. Krisher , William H. Stephenson , M. Rodney Briscoe , Hal A. Thorne , Claude M. Hurlocker , V. Paul Runyon , Timothy J. Williams , Joseph E. Sutherland , William B. Weeber , Michael J. Gingell , Kenneth J. Stoia , William J. Fox , Jeffrey P. Jones , Richard M. Czerwiec , Ertugrul Baydar , Heinrich T. Sonnenberg , Richard Peters , Gus C. Sanders , Richard J. Sanders, Jr. , Francis G. Noser , Joseph L. Smith , Jak Yaemsiri , Camille A. Abu-Saba , Patrick M. Farrell , Wenkwei Rou , Victor W. Wilkerson , Mohammad S. Arani , Stephen C. Dunning , Keith Bernhardt , Dana Merrill , Michael Sutton
发明人： Raymond E. Tyrrell , O. Lamar Bishop , William E. Powell , Dale L. Krisher , William H. Stephenson , M. Rodney Briscoe , Hal A. Thorne , Claude M. Hurlocker , V. Paul Runyon , Timothy J. Williams , Joseph E. Sutherland , William B. Weeber , Michael J. Gingell , Kenneth J. Stoia , William J. Fox , Jeffrey P. Jones , Richard M. Czerwiec , Ertugrul Baydar , Heinrich T. Sonnenberg , Richard Peters , Gus C. Sanders , Richard J. Sanders, Jr. , Francis G. Noser , Joseph L. Smith , Jak Yaemsiri , Camille A. Abu-Saba , Patrick M. Farrell , Wenkwei Rou , Victor W. Wilkerson , Mohammad S. Arani , Stephen C. Dunning , Keith Bernhardt , Dana Merrill , Michael Sutton
IPC分类号： H04J3/08 , H04J3/16 , H04Q11/04
CPC分类号： H04J3/1611 , H04J3/08 , H04J2203/0048 , H04J2203/006
摘要： A synchronous optical transmission system for interfacing SONET formatted channels to lower speed channels in either a SONET format or otherwise. The transmission system incorporates a fiber transmission system, terminal multiplexers and add/drop multiplexers that in turn incorporate a plurality of features, such as parallel scrambling circuitry, frame synchronization circuitry and the like.

6. 发明授权

US5161152A High-speed synchronous transmission line access terminal 失效
标题翻译：高速同步传输线接入终端
公开(公告)号：US5161152A
公开(公告)日：1992-11-03
申请号：US452291
申请日：1989-12-15
申请人： Richard M. Czerwiec , Raymond E. Tyrrell , Gus C. Sanders , Joseph E. Sutherland , Richard J. Sanders, Jr. , Claude M. Hurlocker , Hal A. Thorne , V. Paul Runyon , Enn Aro
发明人： Richard M. Czerwiec , Raymond E. Tyrrell , Gus C. Sanders , Joseph E. Sutherland , Richard J. Sanders, Jr. , Claude M. Hurlocker , Hal A. Thorne , V. Paul Runyon , Enn Aro
IPC分类号： H04J3/16 , H04L12/52 , H04Q11/04
CPC分类号： H04Q11/04 , H04J3/1611 , H04L12/52
摘要： A terminal for a telecommunications system provides access to one or two high-speed synchronous transmission lines by both low-speed transmission lines and subscriber lines. A core module includes interfaces to the high-speed lines, a time slot interchanger, an interface to the low-speed transmission lines, processors and overhead circuitry for supporting the terminal. An access module includes a plurality of line shelves connected to subscriber lines, each line shelf includes a pair of processors and for time slot assignors. A multi-link serial bus connects the time slot interchanger to the access module and to the low-speed interface and provides close coupling between the processors in the core module and the line shelves. The processors cooperate to groom subscriber information from said subscriber lines to and from time slots in said high-speed feeder line and said low-speed transmission line. Subscriber information may also be groomed between time slots of the high-speed feeder line and the low-speed transmission lines and between time slots within each subscriber line.

7. 发明授权

US5740157A Distributed control methodology and mechanism for implementing automatic protection switching 失效
标题翻译：实现自动保护切换的分布式控制方法和机制
公开(公告)号：US5740157A
公开(公告)日：1998-04-14
申请号：US887156
申请日：1992-05-21
申请人： Sahabettin C. Demiray , Dale L. Krisher , Raymond E. Tyrrell
发明人： Sahabettin C. Demiray , Dale L. Krisher , Raymond E. Tyrrell
IPC分类号： H04L29/14 , H04J3/14 , H04J3/16 , H04L12/24 , H04Q11/04 , H04L1/22
CPC分类号： H04J3/1611 , H04J3/14 , H04Q11/0407
摘要： Redundant facility payload signals (12, 14) received by redundant interface modules (16, 18) are redundantly provided (28, 30; 32, 34) to redundant downstream modules (24, 26) in an equipment (10). A non-symmetrical facility protection algorithm is resident in the B interface module (18). Symmetrical equipment protection algorithms are independently resident and operative in each module of pairs of identical A and B modules at each stage of the data stream. Module or data failures result in switchover only of the disabled data path or module so that the ability to transport payload is maintained and other modules or data paths are unaffected. Facility switchover is effected by detecting a working line failure and transmitting commands to switch the protection line to the A path modules. Equipment switchover is effected by checking for a working or protection module failure independently in each path and independently communicating independent switchover decisions to the other side and downstream. The methodology and mechanism are disclosed in a SONET element embodiment, although the invention is applicable in other contexts.
摘要翻译：冗余接口模块（16,18）接收的冗余设施有效载荷信号（12,14）被冗余地提供给设备（10）中的冗余下游模块（24,26）（28,30; 32,34）。非对称设备保护算法驻留在B接口模块（18）中。在数据流的每个阶段，对称设备保护算法独立地驻留在每个相同A和B模块对中的模块中。模块或数据故障导致只切换禁用的数据路径或模块，以便维护传输有效负载的能力，并且其他模块或数据路径不受影响。通过检测工作线路故障并发送命令将保护线路切换到A路径模块来实现设备切换。通过在每个路径中独立检查工作或保护模块故障并独立地将独立切换决策传递到另一侧和下游来实现设备切换。在SONET元件实施例中公开了方法和机制，尽管本发明可应用于其它上下文。

8. 发明授权

US5060239A Transfer strobe time delay selector and method for performing same 失效
标题翻译：转移时间延迟选择器及其执行方法
公开(公告)号：US5060239A
公开(公告)日：1991-10-22
申请号：US351016
申请日：1989-05-12
申请人： Milton R. Briscoe , Raymond E. Tyrrell
发明人： Milton R. Briscoe , Raymond E. Tyrrell
IPC分类号： H03K5/13 , H04J3/06 , H04L7/00 , H04L7/033 , H04L7/04 , H04L12/20
CPC分类号： H04L7/0337 , H03K5/131 , H04J3/0608 , H04L7/0008 , H04L7/042
摘要： A transfer strobe delay stage selector insures accurate transfer of data from high speed circuitry to low speed circuitry through use of a delay stage module comprising a plurality of delay stages, and an associated multiplexor for selecting one of the delay stages so as to provide accurate reception of parallel data by the low speed circuitry from the high speed circuitry. The transfer strobe delay stage selector incorporates a synchronization channel identification module for detecting synchronization channel information in the frames of data transferred from the high speed circuitry to the low speed circuitry and also includes control circuitry for adjusting the selected delay stage until synchronization channel identification is detected. A second embodiment of the invention provides an auxiliary synchronization channel identification module and associated control circuitry to dynamically adjust the selected delay stage when variation in the propagation delay between the high speed and low speed circuitry occurs.

9. 发明授权

US4964095A Data communication bypass apparatus and method 失效
标题翻译：数据通信旁路设备及方法
公开(公告)号：US4964095A
公开(公告)日：1990-10-16
申请号：US351389
申请日：1989-05-12
申请人： Raymond E. Tyrrell , Manal E. Afify
发明人： Raymond E. Tyrrell , Manal E. Afify
IPC分类号： H04J3/08 , H04J3/14 , H04Q11/04
CPC分类号： H04J3/08 , H04J3/14 , H04J2203/006
摘要： A low speed channel bypass apparatus is described for reprovisioning the time slot multiplexer associated with an add/drop multiplexer so as to insure that particular low speed channel(s) within a high speed channel are passed through the add/drop multiplexer via the time slot multiplexer when the operation of an associated network controller is determined to be faulty. The low speed channel bypass apparatus is particularly directed for use with a high speed channel conforming to the synchronous optical network communication standard (SONET). A watchdog timer is used to monitor the performance of the network controller. The watchdog timer when timed out not only prevents further operation of the network controller, but instructs an associated reprovisioning apparatus to instruct the time slot multiplexer to connect through selected channel(s) from the east high speed interface to the west high speed interface.
摘要翻译：描述了一种低速通道旁路装置，用于重新配置与分插复用器相关联的时隙多路复用器，以便确保高速信道内的特定低速信道经由时隙通过加/减多路复用器当相关网络控制器的操作被确定为故障时，多路复用器。低速通道旁路装置特别针对与符合同步光网络通信标准（SONET）的高速通道一起使用。看门狗定时器用于监控网络控制器的性能。看门狗定时器超时不仅防止网络控制器的进一步操作，而且指示相关联的重新配置设备指示时隙多路复用器通过从东高速接口到西高速接口的选定通道进行连接。

10. 发明授权

US4852157A Multi-task state machine signalling translator 失效
标题翻译：多任务状态机信令转换器
公开(公告)号：US4852157A
公开(公告)日：1989-07-25
申请号：US163765
申请日：1988-03-03
申请人： Raymond E. Tyrrell
发明人： Raymond E. Tyrrell
IPC分类号： H04J3/12 , H04M7/12 , H04Q1/50
CPC分类号： H04J3/12 , H04Q1/50
摘要： Real-time conversion between two different A/B signal coding schemes based on the DS1 time division multiplex format is achieved by time sharing a programmable state machine. The time sharing is accomplished synchronously with the DS1 superframe such that each of the 24 DS1 channels have signalling translated once every superframe. Programmability of the state machine is facilitated by the use of an EPROM. A RAM is used for real-time storage of signal states, machine states and processor provisioning for each channel, thereby facilitating time sharing of the state machines. Flexibility is provided through the unique use of an EPROM, which can be modified to directly change the signalling translation response depending on the type of telephony service being provided and the coding scheme used for the signalling. Processor provisioning of the RAM selects a service type translation for each of the 24 DS1 channels.
摘要翻译：基于DS1时分复用格式的两种不同A / B信号编码方案之间的实时转换是通过对可编程状态机进行时间共享来实现的。时间共享与DS1超帧同步完成，使得24个DS1信道中的每一个具有每超帧一次信令翻译。通过使用EPROM可以促进状态机的可编程性。 RAM用于实时存储每个通道的信号状态，机器状态和处理器配置，从而便于状态机的时间共享。通过EPROM的独特使用来提供灵活性，EPROM可以根据所提供的电话服务的类型和用于信令的编码方案进行修改以直接改变信令转换响应。 RAM的处理器配置为24个DS1通道中的每一个选择服务类型转换。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式