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    • 1. 发明授权
    • ISDN signal transmission performance monitoring
    • ISDN信号传输性能监控
    • US5477529A
    • 1995-12-19
    • US314897
    • 1994-09-29
    • Michael J. Gingell
    • Michael J. Gingell
    • G06F11/34H04J3/14H04L1/00H04Q11/04G06F11/00
    • H04L43/0847H04J3/14H04L1/0083H04Q11/045
    • During ISDN signal transmission from a network trunk line (21) to an access line (18), a word (202) provided from the network trunk line is broken into two bytes including a data byte (205) and a performance monitoring byte (206). After signal transmission through common equipment (14) and an access line shelf (10), a line card (12) verifies the composite parity of the data byte and the performance monitoring byte to determine if an ISDN signal transmission error has occurred. During ISDN signal transmission from an access line (18) to a network trunk line (21), the line card (12) forms a data byte (305) by combining pairs of data bits from the access line, and simultaneously forms a performance monitoring byte (306) by combining pairs of performance monitoring bits corresponding to the pairs of data bits. After signal transmission of the data byte and performance monitoring byte through the access line shelf and common equipment, logic (65) is provided to determine if an ISDN signal transmission error has occurred. Thereafter, a word (302) is formed on the network trunk line, the word being made up of two bytes including the data byte and a second byte having a parity bit. The parity bit is set equal to the parity of the word if it is determined that a signal transmission error has not occurred and the parity bit is set opposite of the parity of the word if it is determined that a signal transmission error has occurred.
    • 在从网络中继线(21)到接入线路(18)的ISDN信号传输期间,从网络中继线提供的字(202)被分成包括数据字节(205)和性能监视字节(206)的两个字节 )。 在通过通用设备(14)和接入线架(10)进行信号传输之后,线卡(12)验证数据字节和性能监视字节的复合奇偶校验,以确定是否发生了ISDN信号传输错误。 在从接入线路(18)到网络中继线(21)的ISDN信号传输期间,线路卡(12)通过组合来自接入线路的数据比特组合形成数据字节(305),同时形成性能监视 通过组合对对应于数据位对的性能监视位来执行字节(306)。 在数据字节和性能监控字节通过接入线架和通用设备进行信号传输之后,提供逻辑(65)以确定是否发生了ISDN信号传输错误。 此后,在网络中继线上形成字(302),该字由包括数据字节的两个字节和具有奇偶校验位的第二字节组成。 如果确定没有发生信号传输错误,并且如果确定发生信号传输错误,则奇偶校验位被设置为等于字的奇偶校验位,并且奇偶校验位被设置为与字的奇偶校验相反。
    • 3. 发明授权
    • System for controlling multiple line cards on a TDM bus
    • 用于控制TDM总线上多个线路卡的系统
    • US5105421A
    • 1992-04-14
    • US451431
    • 1989-12-15
    • Michael J. Gingell
    • Michael J. Gingell
    • H04J3/06H04Q11/04
    • H04Q11/04H04J3/0685
    • In a TDM telecommunications terminal, wherein multiple line cards are connected to a TDM bus, each line card location is provided with an identification code. A processor controlled circuit generates a programmable sequence of identification codes which are transmitted on a configuration bus in time slots synchronized with the time slots of the TDM bus. The configuration bus is connected to each of the line cards, which include a comparator logic circuit for comparing the identification of the line card location to the identification codes provided on the configuration bus. When a match is detected, the line card is enabled and is given access to the TDM bus. Through the programmable reassignment of time slots to line cards, concentration may be provided by the system, and a plurality of time slots may be assigned to a single line card to provide broad band service.
    • 在TDM电信终端中,其中多个线路卡连接到TDM总线,每个线路卡位置都具有识别码。 处理器控制电路产生可编程序列的识别码,这些编码序列在与TDM总线的时隙同步的时隙中的配置总线上传输。 配置总线连接到每个线路卡,其中包括用于将线路卡位置的识别与配置总线上提供的识别码进行比较的比较器逻辑电路。 当检测到匹配时,线卡被启用,并被允许访问TDM总线。 通过对线卡的时隙的可编程重新分配,可以由系统提供浓度,并且可以将多个时隙分配给单个线卡以提供宽带服务。
    • 6. 发明授权
    • Expansion shelf for access system and switch block therefor
    • 用于接入系统的扩展机架及其开关块
    • US5497363A
    • 1996-03-05
    • US310934
    • 1994-09-29
    • Michael J. Gingell
    • Michael J. Gingell
    • H04J3/08H04Q11/04
    • H04J3/08H04J2203/0041H04J2203/0089
    • A cross-connect for interfacing high-speed ports and having add/drop multiplexing capabilities for permitting simultaneous access to all individual subscribers may be improved by utilizing a switch block arrangement for allowing downstream subscribers to be switched among each other without the need to be switched upstream through the cross-connect or may alternatively be improved by substituting an expansion shelf in place of a line shelf so as to permit the addition of additional line shelves and hence, additional subscribers. This latter improvement is made possible by assuming that not all subscribers will need access to the cross-connect at the same time. A switch block for such arrangements can output either an input data signal previously stored in a switch memory or a daisy-chain input that is output from another switch block in the arrangement.
    • 用于接口高速端口的交叉连接和具有用于允许同时访问所有个体用户的分插复用功能的交叉连接可以通过利用交换机组装置来改进,以允许下游用户彼此之间切换而不需要被切换 也可以通过用扩展架替代线路架来改进上游,以允许添加额外的线路架,并因此添加额外的用户。 通过假设不是所有的订户都需要同时访问交叉连接才能实现后一种改进。 用于这种布置的开关块可以输出先前存储在开关存储器中的输入数据信号或在该布置中从另一开关块输出的菊花链输入。
    • 8. 发明授权
    • Line unit interface circuit
    • 线路单元接口电路
    • US4993019A
    • 1991-02-12
    • US451436
    • 1989-12-15
    • Gary B. ColeMichael J. GingellJoseph E. SutherlandPaul M. Matsumura
    • Gary B. ColeMichael J. GingellJoseph E. SutherlandPaul M. Matsumura
    • H04Q11/04
    • H04Q11/04
    • A line unit interface circuit used on line units in a line shelf of a digital loop carrier provides all of the logic necessary to access two subscriber lines to a line unit interface bus connected to common equipment within the line shelf. Information received from the common equipment includes signaling data, configuration data and provisioning data, which is reconfigured and processed by the line unit interface circuit for controlling the subscriber line channels. Configuration data from the common equipment is decoded to assign time slots on the line unit interface bus to the various channels serviced by the line shelf and to further provide for a timing offset between the transmit and receive strobes provided to each subscriber line circuit. A flywheel circuit is used to prevent erroneous time slot assignment in the event of noise or interference on the line unit interface bus.
    • 在数字环路载波的线路架中的线路单元上使用的线路单元接口电路提供了将两条用户线路连接到线路架内的公共设备的线路单元接口总线所需的所有逻辑。 从公共设备接收的信息包括由线路单元接口电路重新配置和处理的用于控制用户线路信道的信令数据,配置数据和供应数据。 解码来自公共设备的配置数据,以将线路单元接口总线上的时隙分配给由线路架服务的各种通道,并进一步提供提供给每个用户线电路的发射和接收选通之间的定时偏移。 飞轮电路用于在线路单元接口总线上发生噪声或干扰的情况下防止错误的时隙分配。