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1. 发明授权

US5122439A Forming a pattern on a substrate 失效
标题翻译：在基板上形成图案
公开(公告)号：US5122439A
公开(公告)日：1992-06-16
申请号：US399058
申请日：1989-08-28
申请人： Ekkehard F. Miersch , Jae M. Park
发明人： Ekkehard F. Miersch , Jae M. Park
IPC分类号： G03C1/00 , C25F5/00 , G03F1/08 , H01L21/48 , H05K3/04 , H05K3/06 , H05K3/10 , H05K3/16 , H05K3/24
CPC分类号： H05K3/045 , H01L21/4846 , H05K2201/0317 , H05K2203/0195 , H05K2203/025 , H05K2203/0353 , H05K3/06 , H05K3/107
摘要： A pattern is formed on a substrate by providing on the substrate a dielectric composition; defining a pattern in said dielectric; depositing metal and then micromachining the metal to provide the desired pattern on the substrate.

2. 发明授权

US5173392A Forming a pattern on a substrate 失效
标题翻译：在基材上形成图案
公开(公告)号：US5173392A
公开(公告)日：1992-12-22
申请号：US863114
申请日：1992-04-03
申请人： Ekkehard F. Miersch , Jae M. Park
发明人： Ekkehard F. Miersch , Jae M. Park
IPC分类号： H01L21/48 , H05K3/04 , H05K3/06 , H05K3/10
CPC分类号： H05K3/045 , H01L21/4846 , H05K2201/0317 , H05K2203/0195 , H05K2203/025 , H05K2203/0353 , H05K3/06 , H05K3/107
摘要： A pattern is formed on a substrate by providing on the substrate a dielectric composition; defining a pattern in said dielectric; depositing metal and then micromachining the metal to provide the desired pattern on the substrate.
摘要翻译：通过在基板上设置电介质组合物，在基板上形成图案; 限定所述电介质中的图案; 沉积金属，然后微加工金属以在衬底上提供所需的图案。

3. 发明授权

US5028983A Multilevel integrated circuit packaging structures 失效
标题翻译：多层集成电路封装结构
公开(公告)号：US5028983A
公开(公告)日：1991-07-02
申请号：US263835
申请日：1988-10-27
申请人： Harry R. Bickford , Mark F. Bregman , Thomas M. Cipolla , John Gow, III , Peter G. Ledermann , Ekkehard F. Miersch , Leonard T. Olson , David P. Pagnani , Timothy C. Reiley , Uh-Po E. Tsou , Walter V. Vilkelis
发明人： Harry R. Bickford , Mark F. Bregman , Thomas M. Cipolla , John Gow, III , Peter G. Ledermann , Ekkehard F. Miersch , Leonard T. Olson , David P. Pagnani , Timothy C. Reiley , Uh-Po E. Tsou , Walter V. Vilkelis
IPC分类号： H01L21/60 , H01L23/495 , H01L23/498
CPC分类号： H01L24/50 , H01L23/49572 , H01L23/49861 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/01051 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/09701 , H01L2924/12042 , H01L2924/14 , H01L2924/15787 , H01L2924/3011
摘要： Electronic device packaging structures useful for electrically interconnecting an electronic device to a substrate. The structure contains at least two metallization layers with dielectric layers between adjacent to metallization layers. The dielectric layers can have variable thickness. Beam leads can project inwardly in cantilevered fashion over a central aperture through the dielectric layers. The inner ends of the beam leads lie substantially in one plane and can be bonded to contact pads on integrated circuit electronic devices. Beam leads can project outwardly from the metallization layers over outer edges of the dielectric layers for bonding to contact pads on a substrate. Signal leads on metallization layers can be symmetrically arranged between ground and voltage leads to provide optimal impedance properties. These structures are useful for tape automated bonding applications.

4. 发明授权

US5232548A Discrete fabrication of multi-layer thin film, wiring structures 失效
标题翻译：分层制造多层薄膜，布线结构
公开(公告)号：US5232548A
公开(公告)日：1993-08-03
申请号：US784345
申请日：1991-10-29
申请人： Scott G. Ehrenberg , L. Wynn Herron , Ekkehard F. Miersch , Jae Park , Janet L. Poetzinger
发明人： Scott G. Ehrenberg , L. Wynn Herron , Ekkehard F. Miersch , Jae Park , Janet L. Poetzinger
IPC分类号： H05K1/05 , H05K3/28 , H05K3/46
CPC分类号： H05K3/462 , H05K1/05 , H05K2201/068 , H05K2201/09509 , H05K2201/09536 , H05K2201/096 , H05K2203/0338 , H05K2203/066 , H05K2203/1572 , H05K3/281 , H05K3/4641 , Y10S428/901 , Y10T29/49165 , Y10T428/24917
摘要： A multilayer, three-dimensional wiring matrix is fabricated from a plurality of individually testable plane pair sub-units (30). Each of the plane pair sub-units (30) includes a compensator (20) with capping layers (32) laminated on either side. The compensator (20) has a dielectric (14) encapsulated foil (10) which has been patterned with holes (12). Metallization patterns on the surfaces of the compensator (20) provide orthogonal wiring (22), electrical connections (24) to the foil (10), and electrical connections (26) between the top and bottom surfaces. The capping layer (32) includes joining metallurgy (38) at selected locations within a dielectric layer (36) that is in registry with the metallization in the vias (16). The joining metallurgy (38) may be a metal loaded thermoplastic and provides a seal for the vias (16) as well as planarizes the structure. The capping layers (32) may be formed in-situ on the compensator or separately.
摘要翻译：由多个可单独测试的平面对子单元（30）制造多层三维布线矩阵。每个平面对子单元（30）包括具有层叠在任一侧的封盖层（32）的补偿器（20）。补偿器（20）具有已经用孔（12）构图的电介质（14）封装箔（10）。补偿器（20）的表面上的金属化图案提供正交布线（22），到箔片（10）的电连接（24）以及顶表面和底表面之间的电连接（26）。封盖层（32）包括在与通孔（16）中的金属化对准的电介质层（36）内的选定位置处的接合冶金（38）。接合冶金（38）可以是金属负载的热塑性材料，并为通孔（16）提供密封以及平坦化结构。封盖层（32）可以在补偿器上原位形成或分开形成。

5. 发明授权

US5185073A Method of fabricating nendritic materials 失效
标题翻译：制造树枝状材料的方法
公开(公告)号：US5185073A
公开(公告)日：1993-02-09
申请号：US692606
申请日：1991-04-29
申请人： Perminder S. Bindra , Jerome J. Cuomo , Thomas P. Gall , Anthony P. Ingraham , Sung K. Kang , Jungihl Kim , Paul Lauro , David N. Light , Voya R. Markovich , Ekkehard F. Miersch , Jaynal A. Molla , Douglas O. Powell , John J. Ritsko , George J. Saxenmeyer, Jr. , Jack A. Varcoe , George F. Walker
发明人： Perminder S. Bindra , Jerome J. Cuomo , Thomas P. Gall , Anthony P. Ingraham , Sung K. Kang , Jungihl Kim , Paul Lauro , David N. Light , Voya R. Markovich , Ekkehard F. Miersch , Jaynal A. Molla , Douglas O. Powell , John J. Ritsko , George J. Saxenmeyer, Jr. , Jack A. Varcoe , George F. Walker
IPC分类号： H01R4/26 , H01R4/58 , H01R13/22 , H05K3/32
CPC分类号： H01L24/83 , H01L24/90 , H01R13/22 , H01R4/26 , H01R4/58 , H05K3/325 , H01L2224/0401 , H01L2224/05557 , H01L2224/13111 , H01L2224/29111 , H01L2224/2919 , H01L2224/48227 , H01L2224/8319 , H01L2224/838 , H01L2224/85444 , H01L2224/85464 , H01L2924/01005 , H01L2924/01006 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01044 , H01L2924/01045 , H01L2924/01046 , H01L2924/01049 , H01L2924/0105 , H01L2924/01074 , H01L2924/01075 , H01L2924/01076 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/0665 , H01L2924/14
摘要： A separable and reconnectable connection for electrical equipment is provided that is suitable for miniaturization in which vertical interdigitating members integrally attached and protruding from a planar portion are accommodated in control of damage in lateral displacement that occurs on mating with an opposite similar contact. Displacement damage is averted through accommodating lateral stresses by providing one or more of a conformal opposing contact, by strengthening through coating and base reinforcement and a deformable coating. The contacts are fabricated by physical and chemical processes including sputtering, normal and pulse electroplating and chemical vapor deposition. Pulse electroplating of palladium provides a dendritic deposit of uniform height, uniform rounded points and less branching. The contacts on completion are provided with a surrounding immobilizing material that enhances rigidity.
摘要翻译：提供一种用于电气设备的可分离和可重新连接的连接件，其适于小型化，其中容纳从平面部分一体地附接和突出的垂直交叉构件，以控制与相对的类似接触件配合时发生的横向位移损坏。通过提供一个或多个共形相对的接触，通过加强涂层和基底加强件以及可变形的涂层来容纳横向应力来避免位移损伤。接触是通过物理和化学过程制造的，包括溅射，正常和脉冲电镀以及化学气相沉积。钯的脉冲电镀提供均匀高度，均匀圆点和较少支化的树枝状沉积物。完成的触点设置有增强刚性的周边固定材料。

6. 发明授权

US4445202A Electrically switchable permanent storage 失效
标题翻译：电可切换永久存储
公开(公告)号：US4445202A
公开(公告)日：1984-04-24
申请号：US317669
申请日：1981-11-02
申请人： Volkmar Goetze , Ekkehard F. Miersch , Guenther Potz
发明人： Volkmar Goetze , Ekkehard F. Miersch , Guenther Potz
IPC分类号： G11C17/00 , G11C17/12 , H01L21/8246 , H01L27/112 , H03K19/177 , G11C13/00
CPC分类号： G11C17/12 , H03K19/17712
摘要： For read-only storages and in particular for PLA applications, improved coupling elements together with an associated personalization scheme permit the storing of at least two memory (or logic) connection patterns selectable independently of each other. Quick electrical switching between at least two functional modes in the same storage array, is also provided. One device field effect transistor (FET) cells with specific gate configurations depending on the respective personalization state are used as coupling elements. For instance, in a two-fold personalization permanent storage, the coupling elements consist of FETs with two gate sections provided one beside the other. For a connection to be established in only one of the two possible functions at the respective crosspoint, one of the gate sections is connected to the control line provided for the functional selection. The remaining gate section is connected to the associated input line. A connection in the other functional mode is provided correspondingly with only the control lines being switched. If at the respective crosspoint a connection is to be effective in both functional modes, both gate sections are jointly connected to the respective input line. By using only one common peripheral circuit, PLAs with multiple personalization properties can be made in integrated technology, with the same semiconductor area requirement as PLAs personalizable into only one functional mode.
摘要翻译：对于只读存储器，特别是对于PLA应用，改进的耦合元件以及相关联的个性化方案允许存储彼此独立选择的至少两个存储器（或逻辑）连接模式。还提供了在同一存储阵列中的至少两个功能模式之间的快速电切换。作为耦合元件，使用具有取决于相应个性化状态的特定栅极配置的一个器件场效应晶体管（FET）单元。例如，在双重个性化永久存储器中，耦合元件由具有两个旁路提供的两个栅极部分的FET组成。对于仅在相应交叉点处仅在两个可能功能中的一个中建立的连接，其中一个栅极部分连接到为功能选择提供的控制线。剩余的栅极部分连接到相关的输入线。相应地提供另一个功能模式的连接，只有控制线被切换。如果在相应的交叉点处连接在两种功能模式下都是有效的，则两个门部分共同连接到相应的输入线。通过仅使用一个通用外围电路，可以在集成技术中制造具有多种个性化特性的PLA，其具有与仅可一个功能模式个性化的PLA相同的半导体面积要求。

7. 发明授权

US5137461A Separable electrical connection technology 失效
标题翻译：可分离的电气连接技术
公开(公告)号：US5137461A
公开(公告)日：1992-08-11
申请号：US606007
申请日：1990-10-30
申请人： Perminder S. Bindra , Jerome J. Cuomo , Thomas P. Gall , Anthony P. Ingraham , Sung K. Kang , Jungihl Kim , Paul Lauro , David N. Light , Voya R. Markovich , Ekkehard F. Miersch , Jaynal A. Molla , Douglas O. Powell , John J. Ritsko , George J. Saxenmeyer, Jr. , Jack A. Varcoe , George F. Walker
发明人： Perminder S. Bindra , Jerome J. Cuomo , Thomas P. Gall , Anthony P. Ingraham , Sung K. Kang , Jungihl Kim , Paul Lauro , David N. Light , Voya R. Markovich , Ekkehard F. Miersch , Jaynal A. Molla , Douglas O. Powell , John J. Ritsko , George J. Saxenmeyer, Jr. , Jack A. Varcoe , George F. Walker
IPC分类号： H01R4/26 , H01R4/58 , H01R13/22 , H05K3/32
CPC分类号： H01R4/26 , H01L24/83 , H01L24/90 , H01L24/98 , H01R13/22 , H01R4/58 , H05K3/325 , H01L2224/13111 , H01L2224/29111 , H01L2224/2919 , H01L2224/48227 , H01L2224/8319 , H01L2224/838 , H01L2224/85444 , H01L2924/01005 , H01L2924/01006 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01044 , H01L2924/01045 , H01L2924/01046 , H01L2924/01049 , H01L2924/0105 , H01L2924/01074 , H01L2924/01075 , H01L2924/01076 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/0665 , H01L2924/14 , Y10T29/49224
摘要： A separable and reconnectable connection for electrical equipment is provided that is suitable for miniaturization in which vertical interdigitating members integrally attached and protruding from a planar portion are accommodated in control of damage in lateral displacement that occurs on mating with an opposite similar contact. Displacement damage is averted through accommodating lateral stresses by providing one or more of a conformal opposing contact, by strengthening through coating and base reinforcement and a deformable coating. The contacts are fabricated by physical and chemical processes including sputtering, normal and pulse electroplating and chemical vapor deposition. The contacts on completion are provided with a surrounding immobilizing material that enhances rigidity.
摘要翻译：提供一种用于电气设备的可分离和可重新连接的连接件，其适于小型化，其中容纳从平面部分一体地附接和突出的垂直交叉构件，以控制与相对的类似接触件配合时发生的横向位移损坏。通过提供一个或多个共形相对的接触，通过加强涂层和基底加强件以及可变形的涂层来容纳横向应力来避免位移损伤。接触是通过物理和化学过程制造的，包括溅射，正常和脉冲电镀以及化学气相沉积。完成的触点设置有增强刚性的周边固定材料。

8. 发明授权

US4937930A Method for forming a defect-free surface on a porous ceramic substrate 失效
标题翻译：在多孔陶瓷基板上形成无缺陷表面的方法
公开(公告)号：US4937930A
公开(公告)日：1990-07-03
申请号：US417365
申请日：1989-10-05
申请人： James N. Humenik , Ekkehard F. Miersch , Charles H. Perry , Janusz S. Wilczynski
发明人： James N. Humenik , Ekkehard F. Miersch , Charles H. Perry , Janusz S. Wilczynski
IPC分类号： B32B15/04 , B23P6/00 , H05K1/03 , H05K3/00 , H05K3/22 , H05K3/38
CPC分类号： B23P6/00 , H05K3/22 , H05K3/38 , H05K1/0306 , H05K2201/0116 , H05K2201/09036 , H05K2203/1147 , Y10T29/49155 , Y10T29/49986
摘要： A process for hermetically sealing defects in a porous ceramic substrate comprising the steps of evaporating or sputtering a malleable metal layer onto the defective porous ceramic surface, swaging or smearing the malleable metal layer over the defects and depositing a second metal film over the swaged first film to provide a smooth defect free surface.
摘要翻译：一种用于气密密封多孔陶瓷基板中的缺陷的方法，包括以下步骤：在有缺陷的多孔陶瓷表面上蒸发或溅射可延展的金属层，在缺陷上模锻或涂抹可延展的金属层，并将第二金属膜沉积在模锻的第一膜上以提供光滑的无缺陷表面。

9. 发明授权

US4295183A Thin film metal package for LSI chips 失效
标题翻译：用于LSI芯片的薄膜金属封装
公开(公告)号：US4295183A
公开(公告)日：1981-10-13
申请号：US53497
申请日：1979-06-29
申请人： Ekkehard F. Miersch , Lubomyr T. Romankiw
发明人： Ekkehard F. Miersch , Lubomyr T. Romankiw
IPC分类号： H05K1/05 , H01L21/60 , H01L23/12 , H01L23/14 , H01L23/52 , H01L23/538 , H05K1/11 , H05K3/32 , H05K3/46 , H05K1/16
CPC分类号： H05K3/4641 , H01L23/142 , H01L23/5385 , H01L2224/16225 , H05K1/113 , H05K2201/09309 , H05K2201/09563 , H05K2201/09809
摘要： An integrated circuit board for mounting very high density chips of small size on its top surface including conductor planes for carrying very large values of .DELTA.I (transient current) is constructed with a plurality of essentially flat parallel power planes serving as conductive leads to the chip connectors (pins or solder balls). The land areas on the top surface of the board are connected to conductors below by integrated coaxial conductor extensions from the planes having a high degree of capacitive coupling to adjacent conductor planes.
摘要翻译：用于在其顶表面上安装小尺寸的非常高密度的芯片的集成电路板包括用于承载非常大的DELTA I（瞬态电流）值的导体平面的多个基本上平坦的平行电力平面，用作导电引线到芯片连接器（针或焊球）。板的顶表面上的焊盘区域由具有高度电容耦合到相邻导体平面的平面的集成同轴导体延伸部分连接到下面的导体。

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