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1. 发明授权

US4970579A Integrated circuit package with improved cooling means 失效
标题翻译：具有改进冷却方式的集成电路封装
公开(公告)号：US4970579A
公开(公告)日：1990-11-13
申请号：US247149
申请日：1988-09-21
申请人： Brian D. Arldt , Peter H. Bruhn , M. Lawrence Buller , Peter G. Ledermann , Stephen D. Linam , Barbara J. McNelis , Lawrence S. Mok , Paul A. Moskowitz
发明人： Brian D. Arldt , Peter H. Bruhn , M. Lawrence Buller , Peter G. Ledermann , Stephen D. Linam , Barbara J. McNelis , Lawrence S. Mok , Paul A. Moskowitz
IPC分类号： H01L23/36 , H01L23/40
CPC分类号： H01L23/4093 , H01L2924/0002
摘要： An integrated circuit chip package is described wherein the chip has an active face including a plurality of input and output pads. The chip is mounted face down on a pluralilty of flexible inner beam leads. The package's outer beam leads are bonded to pads residing on an underlying circuit board. A convective heat sink is thermally mounted to the reverse face of the chip, which heat sink is formed from folded thin metal sheet. The heat sink exhibits both minimum mass, and optimum cooling efficiency. The minimum mass reduces the cost of the heat sink through material savings and minimizes the possibility of damage to the package caused by sudden acceleration. The heat sink, in addition to itself being somewhat flexible, is provided with mounting points which are physically connected to the underlying circuit board via resilient connecting means.

2. 发明授权

US4934309A Solder deposition system 失效
标题翻译：焊接沉积系统
公开(公告)号：US4934309A
公开(公告)日：1990-06-19
申请号：US407163
申请日：1989-09-14
申请人： Peter G. Ledermann , Luu T. Nguyen
发明人： Peter G. Ledermann , Luu T. Nguyen
IPC分类号： B23K3/06 , H05K3/34
CPC分类号： B23K3/06 , H05K3/3457 , H05K2201/10151 , H05K2203/0126
摘要： A tool employing a solder foot to deposit solder on a series of conductive surfaces as the tool moves. In one embodiment, non-wettable blade attached to the tool breaks the film. A pair of sensors coupled to a control circuit monitor the position of the solder foot and the position may be changed as a function of the operation to be performed, i.e. deposit, reflow, standby while tool is moved. In a second embodiment a discrete solder mass is extruded and deposited on a preheated pad. In a third embodiment, solder wire is delivered to an ominidirectional tool for deposition.
摘要翻译：当工具移动时，使用焊脚将焊料沉积在一系列导电表面上的工具。在一个实施例中，附接到工具的不可湿润刀片破坏膜。耦合到控制电路的一对传感器监测焊脚的位置，并且该位置可以作为要执行的操作的功能而改变，即，在工具移动时的放置，回流，待机。在第二实施例中，分散的焊料块被挤出并沉积在预热垫上。在第三实施例中，焊丝被输送到用于沉积的微型工具。

3. 发明授权

US4881885A Dam for lead encapsulation 失效
标题翻译：大坝铅封装
公开(公告)号：US4881885A
公开(公告)日：1989-11-21
申请号：US181843
申请日：1988-04-15
申请人： Caroline A. Kovac , Peter G. Ledermann , Luu T. Nguyen
发明人： Caroline A. Kovac , Peter G. Ledermann , Luu T. Nguyen
IPC分类号： B29C45/14 , B29L31/34 , H01L21/56
CPC分类号： H01L21/56 , H01L2224/50
摘要： An apparatus to encapsulate a device and joints coupled to conductive leads with an encapsulating material. A fixture has a recess to hold via a vacuum the device in place. Conduits in the fixture supply air around the device to form an air dam that flows outward around the device and the leads. A nozzle supplies a metered amount of material to the surface of the device. By controlling the temperature of the fixture and/or the air forming the air dam, the flow of material can be confined to the surface of the device and the joints as it cures. The method can also provide encapsulant edge capping to reduce device stresses.

4. 发明授权

US5130781A Dam for lead encapsulation 失效
标题翻译：大坝铅封装
公开(公告)号：US5130781A
公开(公告)日：1992-07-14
申请号：US593374
申请日：1990-10-01
申请人： Caroline A. Kovac , Peter G. Ledermann , Luu T. Nguyen
发明人： Caroline A. Kovac , Peter G. Ledermann , Luu T. Nguyen
IPC分类号： H01L21/56
CPC分类号： H01L21/56 , H01L2224/50
摘要： A method and apparatus to encapsulate a device and joints coupled to conductive leads with an encapsulating material. A fixture has a recess to hold via a vacuum the device in place. Conduits in the fixture supply air around the device to form an air dam that flows outward around the device and the leads. A nozzle supplies a metered amount of material to the surface of the device. By controlling the temperature of the fixture and/or the air forming the air dam, the flow of material can be confined to the surface of the device and the joints as it cures. The method can also provide encapsulant edge capping to reduce device stresses.
摘要翻译：一种用封装材料封装耦合到导电引线的器件和接头的方法和装置。固定装置具有通过真空将装置保持在适当位置的凹部。设备中的管道供应设备周围的空气，以形成围绕设备和引线向外流动的空气坝。喷嘴向设备的表面提供计量的材料。通过控制固定装置的温度和/或形成空气坝的空气，材料的流动可以在其固化时被限制在装置和接头的表面上。该方法还可以提供封装边缘封盖以减少器件应力。

5. 发明授权

US4898117A Solder deposition system 失效
标题翻译：焊接沉积系统
公开(公告)号：US4898117A
公开(公告)日：1990-02-06
申请号：US181775
申请日：1988-04-15
申请人： Peter G. Ledermann , Luu Thanh Nguyen
发明人： Peter G. Ledermann , Luu Thanh Nguyen
IPC分类号： B23K3/06 , H05K3/34
CPC分类号： H05K3/3457 , B23K3/06 , H05K2201/10151 , H05K2203/0126
摘要： A tool employing a solder foot to deposit solder on a series of conductive surfaces as the tool moves. In one embodiment, non-wettable blade attached to the tool breaks the film. A pair of sensors coupled to a control circuit monitor the position of the solder foot and the position may be changed as a function of the operation to be performed, i.e. deposit, reflow, standby while tool is moved. In a second embodiment a discrete solder mass is extruded and deposited on a preheated pad. In a third embodiment, solder wire is delivered to an omnidirectional tool for deposition.
摘要翻译：当工具移动时，使用焊脚将焊料沉积在一系列导电表面上的工具。在一个实施例中，附接到工具的不可湿润刀片破坏膜。耦合到控制电路的一对传感器监测焊脚的位置，并且该位置可以作为要执行的操作的功能而改变，即，在工具移动时的放置，回流，待机。在第二实施例中，分散的焊料块被挤出并沉积在预热垫上。在第三实施例中，焊丝被传送到全向工具以进行沉积。

6. 发明授权

US5343366A Packages for stacked integrated circuit chip cubes 失效
标题翻译：堆叠集成电路芯片立方体的封装
公开(公告)号：US5343366A
公开(公告)日：1994-08-30
申请号：US903838
申请日：1992-06-24
申请人： Thomas M. Cipolla , Paul W. Coteus , Ioannis Damianakis , Glen W. Johnson , Peter G. Ledermann , Linda C. Matthew , Lawrence S. Mok
发明人： Thomas M. Cipolla , Paul W. Coteus , Ioannis Damianakis , Glen W. Johnson , Peter G. Ledermann , Linda C. Matthew , Lawrence S. Mok
IPC分类号： H01L25/18 , H01L25/065 , H01L25/07 , H05K1/14 , H05K1/18 , H05K3/32 , H05K3/34 , H05K3/36 , H05K3/40 , H01R23/68
CPC分类号： H05K3/363 , H01L24/01 , H01L25/0652 , H01L25/0657 , H01L2225/06551 , H01L2225/06596 , H01L2924/09701 , H01L2924/14 , H01L2924/3011 , H05K2201/0397 , H05K2201/048 , H05K2201/09172 , H05K2201/09909 , H05K2201/10484 , H05K2201/1059 , H05K2201/10681 , H05K2201/10984 , H05K3/326 , H05K3/3452 , H05K3/3457 , H05K3/366 , H05K3/4007 , H05K3/4092
摘要： This invention relates to three dimensional packaging of integrated circuit chips into stacks to form cuboid structures. Between adjacent chips in the stack, there is disposed an electrical interconnection means which is a first substrate having a plurality of conductors one end of which is electrically connected to chip contact locations and the other end of which extends to one side of the chip stack to form a plurality of pin-like electrical interconnection assemblies. The pin-like structures can be formed from projections of the first substrate having an electrical conductor on at least one side thereof extending from this side. Alternatively, the pin-like structures can be formed from conductors which cantilever from both sides of an edge of the first substrate and within which corresponding conductors from both sides are aligned and spaced apart by the first substrate thickness. The spaces contain solder and form solder loaded pin-like structures. The pin-like structures can be directly solder bonded to conductors on a second substrate surface or the pin-like structures can be adapted for insertion into apertures in a second substrate. The second substrate provides a means for electrically inter-connecting a plurality of these cuboids. Preferably, the first and second substrates are circuitized flexible polymeric films. The second substrate is disposed on a third substrate, such as a PC board, with a resilient material therebetween which permits a heat sink to be pressed into intimate contact with an opposite side of the cuboid structures.
摘要翻译：本发明涉及将集成电路芯片三维封装成堆栈以形成立方体结构。在堆叠中的相邻芯片之间，设置有电互连装置，其是具有多个导体的第一基板，其多个导体电连接到芯片接触位置，并且其另一端延伸到芯片堆叠的一侧，形成多个针状电互连组件。销状结构可以由在其至少一侧上具有电导体的第一基板的凸起从该侧延伸形成。或者，销状结构可以由从第一基板的边缘的两侧悬臂的导体形成，并且其中来自两侧的相应导体对准并且间隔开第一基板厚度。这些空间包含焊料并形成焊料加载的针状结构。销状结构可以直接焊接到第二衬底表面上的导体上，或者针状结构可以适于插入到第二衬底中的孔中。第二基板提供用于电连接多个这些长方体的装置。优选地，第一和第二基底是电路化柔性聚合物膜。第二基板设置在诸如PC板的第三基板上，其间具有弹性材料，其允许将散热器压紧成与长方体结构的相对侧紧密接触。

7. 发明授权

US5189363A Integrated circuit testing system having a cantilevered contact lead probe pattern mounted on a flexible tape for interconnecting an integrated circuit to a tester 失效
标题翻译：集成电路测试系统，具有将柔性胶带安装在用于将集成电路互连到测试仪器上的接触式接触导线探头
公开(公告)号：US5189363A
公开(公告)日：1993-02-23
申请号：US583261
申请日：1990-09-14
申请人： Mark F. Bregman , Paul R. Hoffman , Peter G. Ledermann , Paul A. Moskowitz , Roger A. Pollak , Timothy C. Reiley , Mark B. Ritter
发明人： Mark F. Bregman , Paul R. Hoffman , Peter G. Ledermann , Paul A. Moskowitz , Roger A. Pollak , Timothy C. Reiley , Mark B. Ritter
IPC分类号： G01R31/26 , G01R1/073
CPC分类号： G01R1/0735
摘要： A system for testing chips uses a patterned tape having a patterned array of cantilevered contact leads. The tape serves as an interface between the chip under test and a testing unit by providing conductive leads from the I/O terminals on the chip to an off-chip measuring system. The leads on the array may have balls, tips or other shapes on the end to provide contact with the terminals and compensate for height differences. The tape is a single frame or has a series of arrays each positioned around an opening where the chip will be located when a particular pattern is positioned over that chip for test. The pattern on the tape may be the same array or a different array. The tape is indexed to a new pattern when the old one is damaged or no longer needed. Alignment with the chip is by optical sensing and physical pin movement. The tape may have a flap protruding into an aperture and deflectable to provide for planar contact of the leads to the device under test.

8. 发明授权

US5117457A Tamper resistant packaging for information protection in electronic circuitry 失效
标题翻译：防篡改包装，用于电子电路中的信息保护
公开(公告)号：US5117457A
公开(公告)日：1992-05-26
申请号：US471003
申请日：1990-01-24
申请人： Liam D. Comerford , Peter G. Ledermann , Lawrence I. Levy , Steve R. White
发明人： Liam D. Comerford , Peter G. Ledermann , Lawrence I. Levy , Steve R. White
IPC分类号： G06F1/00 , G06F21/00 , H04L9/10
CPC分类号： G06F21/87 , H01L23/576 , H01L2924/0002
摘要： A tamper-resistant package for protecting information stored in electronic circuitry is described. An energy source provides energy (electrical current, optical energy, microwave energy or RF energy, for example) within a region occupied by the circuitry to be protected. The energy is applied to an energy distribution system comprising a path or paths for energy distribution. Sensing means are provided which respond to the distribution system for sensing an intrusion. The distribution system includes an arrangement for changing or altering the path or paths over which the energy travels or altering the topology of the path or paths. The sensing means is informed of the appearance of the distribution system and senses an intrusion by comparing the appearance of the path(s) with the predicted appearance. In one embodiment, electrical current is selectively applied to a subset of electrical conductors. The pattern of current flowing in the conductors is sensed and compared to an expected pattern which is determined by the subset of energized conductors. Intrusion is evidenced by a disparity between the pattern of energized paths sensed by the sensing means compared to the pattern predicted by the sensing means. Dynamically varying the identity of the energized paths makes it difficult for an attacker to bypass the tamper detection.
摘要翻译：描述了用于保护存储在电子电路中的信息的防篡改包装。能量源在被保护电路占据的区域内提供能量（例如，电流，光能，微波能量或RF能量）。能量被施加到包括用于能量分配的路径的能量分配系统。提供响应于用于感测入侵的分配系统的感测装置。分配系统包括用于改变或改变能量行进的路径或路径或改变路径或路径的拓扑的布置。通过将路径的外观与预测的外观进行比较，通知传感装置的外观，并感知入侵。在一个实施例中，电流被选择性地施加到电导体的子集。检测在导体中流动的电流的模式，并将其与由激励导体的子集确定的预期图案进行比较。由感测装置感测到的通电路径的图案与由感测装置预测的图案之间的差异可以证明入侵。动态改变通电路径的身份使攻击者难以绕过篡改检测。

9. 发明授权

US5065932A Solder placement nozzle with inert cover gas and inert gas bleed 失效
标题翻译：带惰性覆盖气体和惰性气体放电的焊接放置喷嘴
公开(公告)号：US5065932A
公开(公告)日：1991-11-19
申请号：US586654
申请日：1990-09-24
申请人： Terry F. Hayden , Christopher A. Hicks , Peter G. Ledermann , Alvin D. Nguyne , Stephen C. Steinbach , Stanley K. Yu
发明人： Terry F. Hayden , Christopher A. Hicks , Peter G. Ledermann , Alvin D. Nguyne , Stephen C. Steinbach , Stanley K. Yu
IPC分类号： B05B1/24 , B23K3/06 , H01L21/60 , H05K3/34
CPC分类号： B23K3/06
摘要： A nozzle assembly is shown for depositing solder onto a series of conductive surfaces such as the mounting pads of a surface mount integrated circuit board. The nozzle assembly includes a nozzle head which has an interior bore for receiving an elongate heat source. The nozzle head also includes an orifice for receiving solid solder fed within the interior bore to contact the elongate heat source. The interior bore terminates in a solder reservoir for molten solder which is fed within the inteiror bore to contact the elongate heat source. The molten solder is dispensed through a tip opening to deposit uniform amounts of solder on each pad. A source of bleed gas is supplied to the interior of the assembly to protect the component parts and excluse oxygen from the interior of the assembly. A cover gas is also supplied to the solder site to reduce oxidation of the moltent solder and reduce the amount of flux required.
摘要翻译：示出了用于将焊料沉积到诸如表面安装集成电路板的安装焊盘的一系列导电表面上的喷嘴组件。喷嘴组件包括具有用于容纳细长热源的内孔的喷嘴头。喷嘴头还包括用于接收在内孔内供给的固体焊料以接触细长热源的孔口。内部孔终止在用于熔融焊料的焊料储存器中，该焊料储存器在内部孔内进料以接触细长的热源。通过尖端开口分配熔融焊料，以在每个焊盘上沉积均匀量的焊料。排放气体源被供应到组件的内部，以保护组件并且从组件的内部释放氧气。还向焊接部位提供覆盖气体，以减少熔融焊料的氧化并减少所需的焊剂量。

10. 发明授权

US5028983A Multilevel integrated circuit packaging structures 失效
标题翻译：多层集成电路封装结构
公开(公告)号：US5028983A
公开(公告)日：1991-07-02
申请号：US263835
申请日：1988-10-27
申请人： Harry R. Bickford , Mark F. Bregman , Thomas M. Cipolla , John Gow, III , Peter G. Ledermann , Ekkehard F. Miersch , Leonard T. Olson , David P. Pagnani , Timothy C. Reiley , Uh-Po E. Tsou , Walter V. Vilkelis
发明人： Harry R. Bickford , Mark F. Bregman , Thomas M. Cipolla , John Gow, III , Peter G. Ledermann , Ekkehard F. Miersch , Leonard T. Olson , David P. Pagnani , Timothy C. Reiley , Uh-Po E. Tsou , Walter V. Vilkelis
IPC分类号： H01L21/60 , H01L23/495 , H01L23/498
CPC分类号： H01L24/50 , H01L23/49572 , H01L23/49861 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/01051 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/09701 , H01L2924/12042 , H01L2924/14 , H01L2924/15787 , H01L2924/3011
摘要： Electronic device packaging structures useful for electrically interconnecting an electronic device to a substrate. The structure contains at least two metallization layers with dielectric layers between adjacent to metallization layers. The dielectric layers can have variable thickness. Beam leads can project inwardly in cantilevered fashion over a central aperture through the dielectric layers. The inner ends of the beam leads lie substantially in one plane and can be bonded to contact pads on integrated circuit electronic devices. Beam leads can project outwardly from the metallization layers over outer edges of the dielectric layers for bonding to contact pads on a substrate. Signal leads on metallization layers can be symmetrically arranged between ground and voltage leads to provide optimal impedance properties. These structures are useful for tape automated bonding applications.

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