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1. 发明授权

US09214925B2 Clock gated circuit and digital system having the same 有权
标题翻译：时钟门控电路和数字系统具有相同的功能
公开(公告)号：US09214925B2
公开(公告)日：2015-12-15
申请号：US13440007
申请日：2012-04-05
申请人： Hoijin Lee , Bai-Sun Kong
发明人： Hoijin Lee , Bai-Sun Kong
IPC分类号： H03L5/00 , H03K3/356
CPC分类号： H03K3/356121
摘要： A clock gated circuit includes a pulse generator and a pulse level shifter. The pulse generator is driven by a first power supply voltage and is configured to receive a clock signal to generate a pulse and an inverted pulse. The pulse level shifter is driven by a second power supply voltage higher than the first power supply voltage and is configured to receive the pulse and the inverted pulse and to convert a level of the pulse in response to an enable signal.
摘要翻译：时钟选通电路包括脉冲发生器和脉冲电平移位器。脉冲发生器由第一电源电压驱动，并被配置为接收时钟信号以产生脉冲和反相脉冲。脉冲电平移位器由比第一电源电压高的第二电源电压驱动，并被配置为接收脉冲和反相脉冲，并响应于使能信号转换脉冲电平。

2. 发明申请

US20130241594A1 SCAN FLIP-FLOP CIRCUITS AND SCAN TEST CIRCUITS INCLUDING THE SAME 有权
标题翻译：扫描FLOP-FLOP电路和扫描测试电路，包括它们
公开(公告)号：US20130241594A1
公开(公告)日：2013-09-19
申请号：US13890517
申请日：2013-05-09
申请人： Hoi-Jin LEE , Bai-Sun KONG
发明人： Hoi-Jin LEE , Bai-Sun KONG
IPC分类号： H03K19/003
CPC分类号： H03K19/003 , H03K3/356182
摘要： A scan flip-flop circuit includes an input unit and an output unit. The data output unit is configured to provide a data output terminal with a data output signal in response to a data input signal and a first control signal in a first operation mode, and the data output unit is configured to prohibit the data output terminal from being provided with a power supply voltage and a ground voltage applied to the scan flip-flop circuit in response to the data input signal and the first control signal in a second operation mode. The scan output unit is configured to provide a scan output terminal with a scan output signal in response to a scan input signal and a second control signal in the second operation mode.
摘要翻译：扫描触发器电路包括输入单元和输出单元。数据输出单元被配置为在第一操作模式中响应于数据输入信号和第一控制信号向数据输出端提供数据输出信号，并且数据输出单元被配置为禁止数据输出端在第二操作模式中响应于数据输入信号和第一控制信号，提供施加到扫描触发器电路的电源电压和接地电压。扫描输出单元被配置为在第二操作模式中响应于扫描输入信号和第二控制信号向扫描输出端提供扫描输出信号。

3. 发明授权

US07928792B2 Apparatus for outputting complementary signals using bootstrapping technology 有权
标题翻译：使用自举技术输出互补信号的装置
公开(公告)号：US07928792B2
公开(公告)日：2011-04-19
申请号：US12367398
申请日：2009-02-06
申请人： Bai-Sun Kong , Byung-Hwa Jung , Sung-Chan Kang
发明人： Bai-Sun Kong , Byung-Hwa Jung , Sung-Chan Kang
IPC分类号： H03L5/00
CPC分类号： H03K19/01735
摘要： Disclosed herein is an apparatus for outputting complementary signals using bootstrapping technology. The apparatus for outputting complementary signals includes a precharaged logic block, one or more output nodes, and a bootstrapping circuit block. The precharged differential logic block generates a differential signal depending on an input signal. The one or more output nodes output the complementary signals depending on the differential signal. The bootstrapping circuit block is shared by the one or more output nodes, and amplifies the complementary signals.
摘要翻译：本文公开了一种使用自举技术输出互补信号的装置。用于输出互补信号的装置包括预先存储的逻辑块，一个或多个输出节点和自举电路块。预充电差分逻辑块根据输入信号产生差分信号。一个或多个输出节点根据差分信号输出互补信号。自举电路块由一个或多个输出节点共享，并放大互补信号。

4. 发明申请

US20100207684A1 CMOS CHARGE PUMP WITH IMPROVED LATCH-UP IMMUNITY 有权
标题翻译： CMOS充电泵具有改进的放大功能
公开(公告)号：US20100207684A1
公开(公告)日：2010-08-19
申请号：US12691937
申请日：2010-01-22
申请人： Su-Jin Park , Joung-Yeal Kim , Bai-Sun Kong , Young-Hyun Jun
发明人： Su-Jin Park , Joung-Yeal Kim , Bai-Sun Kong , Young-Hyun Jun
IPC分类号： G05F1/10
CPC分类号： H02M3/07
摘要： A CMOS charge pump with improved latch-up immunity is provided. The CMOS charge pump includes a blocking transistor that disconnects first and second boost nodes from a bulk node in response to a blocking control signal, such that a bulk voltage can be maintained at a predetermined level or higher. The CMOS charge pump in a power-up period first precharges the bulk voltage before the main pump performs a boosting operation and prevents a latch-up phenomenon.
摘要翻译：提供了具有提高的闭锁电阻的CMOS电荷泵。 CMOS电荷泵包括阻塞晶体管，其响应于阻塞控制信号将第一和第二升压节点与体节点断开，使得体电压可以保持在预定水平或更高水平。在上电期间的CMOS电荷泵首先在主泵进行升压操作之前预充电体积电压并且防止闩锁现象。

5. 发明申请

US20090134937A1 Charge pump circuit 有权
标题翻译：电荷泵电路
公开(公告)号：US20090134937A1
公开(公告)日：2009-05-28
申请号：US12287620
申请日：2008-10-10
申请人： Joung-Yeal Kim , Young-Hyun Jun , Bai-Sun Kong
发明人： Joung-Yeal Kim , Young-Hyun Jun , Bai-Sun Kong
IPC分类号： G05F1/10
CPC分类号： G11C5/145
摘要： A charge pump circuit includes initialization units, each of which initializes a boost node to an initialization voltage. Boosting units each boost the boost node to a higher voltage than the initialization voltage in response to an input voltage. First and second pump circuits each include a transfer unit for transferring a voltage of the boost node to an output node and sharing the output node. The transfer unit of the first pump circuit includes two transfer transistors that are switched in response to a voltage of a control node of the first pump circuit and the voltage of the boost node of the second pump circuit. The transfer unit of the second pump circuit includes two transfer transistors that are switched in response to a voltage of a control node of the second pump circuit and the voltage of the boost node of the first pump circuit.
摘要翻译：电荷泵电路包括初始化单元，每个初始化单元将升压节点初始化为初始化电压。升压单元各自将升压节点升压到比初始化电压高的电压以响应于输入电压。第一和第二泵电路各自包括用于将升压节点的电压传送到输出节点并共享输出节点的传送单元。第一泵电路的传送单元包括响应于第一泵电路的控制节点的电压和第二泵电路的升压节点的电压而被切换的两个传输晶体管。第二泵电路的传送单元包括响应于第二泵电路的控制节点的电压和第一泵电路的升压节点的电压而被切换的两个传输晶体管。

6. 发明申请

US20080023761A1 Semiconductor devices and methods of fabricating the same 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20080023761A1
公开(公告)日：2008-01-31
申请号：US11819606
申请日：2007-06-28
申请人： Mu-Kyeng Jung , Xiao Quan Wang , Bai-Sun Kong
发明人： Mu-Kyeng Jung , Xiao Quan Wang , Bai-Sun Kong
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/7835 , H01L21/26586 , H01L29/1045 , H01L29/66659
摘要： Semiconductor devices and methods of fabricating the same are provided. According to an example embodiment, a semiconductor device may include an active region disposed in a substrate and having first conductivity type impurity ions, a gate electrode crossing on the active region, a source region disposed within the active region at one a first side of the gate electrode, a drain region disposed within the active region at the a second side of the gate electrode, a source lightly doped drain (LDD) region disposed within the active region, extending toward the gate electrode from the source region, and having second conductivity type impurity ions, a drain LDD region disposed within the active region, extending toward the gate electrode from the drain region, and having the second conductivity type impurity ions in a concentration higher than the source LDD region, and a first halo region disposed within the active region, surrounding the source LDD region, and having the first conductivity type impurity ions.
摘要翻译：提供半导体器件及其制造方法。根据示例性实施例，半导体器件可以包括设置在衬底中并具有第一导电类型杂质离子的有源区，在有源区上交叉的栅电极，设置在有源区的第一侧的源极区栅电极，设置在所述栅电极的第二侧的有源区内的漏极区，设置在所述有源区内的源极轻掺杂漏极（LDD）区，从所述源极区朝向所述栅电极延伸，并具有第二导电性设置在有源区内的漏极LDD区域，从漏区延伸到栅电极，并且具有浓度高于源极LDD区域的第二导电型杂质离子，以及设置在该源极LDD区域内的第一晕圈区域有源区，围绕源LDD区，并具有第一导电类型的杂质离子。

7. 发明授权

US06211704B1 Asynchronous sensing differential logic (ASDL) circuit 有权
标题翻译：异步感应差分逻辑（ASDL）电路
公开(公告)号：US06211704B1
公开(公告)日：2001-04-03
申请号：US09371836
申请日：1999-08-11
申请人： Bai-Sun Kong
发明人： Bai-Sun Kong
IPC分类号： A03K19096
CPC分类号： G06F7/505 , G06F7/501 , G06F7/503 , G06F7/507 , G06F2207/3872 , G06F2207/3884 , G11C11/412 , H03K3/356147 , H03K19/0019 , H03K19/0963 , H03K19/1738 , H03K19/215
摘要： An asynchronous sensing differential logic circuit using a charge-recycling technique includes a control block carrying out a logical operation on a request signal from a preceding stage and a request signal for a succeeding stage, and outputting a first or second input enable signal and a first or second clock signal, a functional block carrying out an operation on an input data according to the first or second input enable signals and the first or second clock signals from the control block, and outputting a first or second output enable signal and an output data, and a latch block triggered by an acknowledge signal from the succeeding stage, and outputting a request signal for the succeeding stage and a final output data by carrying out an operation on the first or second output enable signals and the output data from the functional block.
摘要翻译：使用电荷再循环技术的异步感测差分逻辑电路包括对来自前级的请求信号执行逻辑运算的控制块和后级的请求信号，以及输出第一或第二输入使能信号和第一或第二时钟信号，根据第一或第二输入使能信号和来自控制块的第一或第二时钟信号对输入数据执行操作的功能块，并输出第一或第二输出使能信号和输出数据以及由来自后级的确认信号触发的锁存块，并且通过对来自功能块的第一或第二输出使能信号和输出数据执行操作来输出后级的请求信号和最终输出数据。

8. 发明申请

US20100176857A1 APPARATUS FOR OUTPUTTING COMPLEMENTARY SIGNALS USING BOOTSTRAPPING TECHNOLOGY 有权
标题翻译：用于使用引导技术输出补码信号的装置
公开(公告)号：US20100176857A1
公开(公告)日：2010-07-15
申请号：US12367398
申请日：2009-02-06
申请人： BAI-SUN KONG , BYUNG-HWA JUNG , SUNG-CHAN KANG
发明人： BAI-SUN KONG , BYUNG-HWA JUNG , SUNG-CHAN KANG
IPC分类号： H03K7/08
CPC分类号： H03K19/01735
摘要： Disclosed herein is an apparatus for outputting complementary signals using bootstrapping technology. The apparatus for outputting complementary signals includes a precharaged logic block, one or more output nodes, and a bootstrapping circuit block. The precharged differential logic block generates a differential signal depending on an input signal. The one or more output nodes output the complementary signals depending on the differential signal. The bootstrapping circuit block is shared by the one or more output nodes, and amplifies the complementary signals.
摘要翻译：本文公开了一种使用自举技术输出互补信号的装置。用于输出互补信号的装置包括预先存储的逻辑块，一个或多个输出节点和自举电路块。预充电差分逻辑块根据输入信号产生差分信号。一个或多个输出节点根据差分信号输出互补信号。自举电路块由一个或多个输出节点共享，并放大互补信号。

9. 发明申请

US20100026373A1 Semiconductor device for charge pumping 有权
标题翻译：用于电荷泵浦的半导体器件
公开(公告)号：US20100026373A1
公开(公告)日：2010-02-04
申请号：US12458533
申请日：2009-07-15
申请人： Joung-Yeal Kim , Young-hyun Jun , Bai-sun Kong
发明人： Joung-Yeal Kim , Young-hyun Jun , Bai-sun Kong
IPC分类号： G05F1/10
CPC分类号： H02M3/07
摘要： Provided is a semiconductor device for performing charge pumping. The semiconductor device may include a first pumping unit, a second pumping unit, and a controller. The first pumping unit may be configured to output a boosted voltage via an output node by using a first input signal and the initial voltage, where the boosted voltage is greater than an initial voltage. The second pumping unit may be configured to output the boosted voltage via the output node by using a second input signal and the initial voltage. The controller may be configured to control the first and second pumping units. Each of the first and second pumping units may include an initialization unit, a boosting unit, and a transmission unit. The initialization unit may be configured to control a voltage of a boosting node to be equal to the initial voltage during an initialization operation. The boosting unit may be configured to boost the voltage of the boosting node based on the first and second input signals. Also, the transmission unit may be configured to control output of the boosted voltage.
摘要翻译：提供一种用于进行电荷泵送的半导体器件。半导体器件可以包括第一泵送单元，第二泵送单元和控制器。第一泵单元可以被配置为通过使用第一输入信号和初始电压经由输出节点输出升压电压，其中升压电压大于初始电压。第二泵送单元可以被配置为通过使用第二输入信号和初始电压经由输出节点输出升压电压。控制器可以被配置为控制第一和第二泵送单元。第一和第二泵送单元中的每一个可以包括初始化单元，升压单元和传输单元。初始化单元可以被配置为在初始化操作期间将升压节点的电压控制为等于初始电压。升压单元可以被配置为基于第一和第二输入信号来升压升压节点的电压。此外，传输单元可以被配置为控制升压电压的输出。

10. 发明申请

US20080024183A1 Flip-flops and electronic digital circuits including the same 有权
标题翻译：触发器和包括其的电子数字电路
公开(公告)号：US20080024183A1
公开(公告)日：2008-01-31
申请号：US11819388
申请日：2007-06-27
申请人： Min-Su Kim , Bai-Sun Kong
发明人： Min-Su Kim , Bai-Sun Kong
IPC分类号： H03K3/0233
CPC分类号： H03K3/356121 , H03K3/356147 , H03K3/356191
摘要： A flip-flop includes a first circuit receiving a clock signal and the first signal and transitioning the first and second output signals to a first level when the clock signal goes to an active level, and a second circuit transitioning the first signal to the first level after the first and second output signals go to the first level. The first circuit transfers first and second input signals to the first and second output terminals from first and second input terminals when the clock signal is at the active level and the first signal is at the first level.
摘要翻译：触发器包括接收时钟信号和第一信号的第一电路，并且当时钟信号进入有效电平时，将第一和第二输出信号转换到第一电平，第二电路将第一信号转换到第一电平在第一和第二输出信号进入第一级之后。当时钟信号处于有效电平并且第一信号处于第一电平时，第一电路将第一和第二输入信号从第一和第二输入端传送到第一和第二输出端。

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