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    • 11. 发明授权
    • Semiconductor memory device
    • 半导体存储器件
    • US08159852B2
    • 2012-04-17
    • US12398839
    • 2009-03-05
    • Toshiyuki KouchiYutaka Tanaka
    • Toshiyuki KouchiYutaka Tanaka
    • G11C5/02
    • G11C8/16G11C11/412
    • A semiconductor memory device includes first and second driving transistors; first and second load transistors; and first and second transmission transistors. Their respective drain diffusion layers of the transistors are isolated from one another. The semiconductor memory device also includes a bit cell in which the first and second driving transistors, the first and second load transistors, and the first and second transmission transistors are arranged; a first wiring for connecting their respective drains of the first driving transistor, the first load transistor, and the first transmission transistor; and a second wiring for connecting their respective drains of the second driving transistor, the second load transistor, and the second transmission transistor.
    • 半导体存储器件包括第一和第二驱动晶体管; 第一和第二负载晶体管; 以及第一和第二传输晶体管。 它们各自的漏极扩散层彼此隔离。 半导体存储器件还包括其中布置第一和第二驱动晶体管,第一和第二负载晶体管以及第一和第二传输晶体管的位单元; 用于连接第一驱动晶体管,第一负载晶体管和第一透射晶体管的各自的漏极的第一布线; 以及用于连接其第二驱动晶体管,第二负载晶体管和第二传输晶体管的各自的漏极的第二布线。
    • 12. 发明申请
    • SEMICONDUCTOR MEMORY DEVICE
    • 半导体存储器件
    • US20090268499A1
    • 2009-10-29
    • US12398839
    • 2009-03-05
    • Toshiyuki KouchiYutaka Tanaka
    • Toshiyuki KouchiYutaka Tanaka
    • G11C5/02G11C5/06G11C8/16
    • G11C8/16G11C11/412
    • A semiconductor memory device includes first and second driving transistors; first and second load transistors; and first and second transmission transistors. Their respective drain diffusion layers of the transistors are isolated from one another. The semiconductor memory device also includes a bit cell in which the first and second driving transistors, the first and second load transistors, and the first and second transmission transistors are arranged; a first wiring for connecting their respective drains of the first driving transistor, the first load transistor, and the first transmission transistor; and a second wiring for connecting their respective drains of the second driving transistor, the second load transistor, and the second transmission transistor.
    • 半导体存储器件包括第一和第二驱动晶体管; 第一和第二负载晶体管; 以及第一和第二传输晶体管。 它们各自的漏极扩散层彼此隔离。 半导体存储器件还包括其中布置第一和第二驱动晶体管,第一和第二负载晶体管以及第一和第二传输晶体管的位单元; 用于连接第一驱动晶体管,第一负载晶体管和第一透射晶体管的各自的漏极的第一布线; 以及用于连接其第二驱动晶体管,第二负载晶体管和第二传输晶体管的各自的漏极的第二布线。
    • 16. 发明授权
    • Shield case for electronic apparatus
    • 电子设备屏蔽箱
    • US06977822B2
    • 2005-12-20
    • US10336092
    • 2003-01-03
    • Koji OtaniYutaka Tanaka
    • Koji OtaniYutaka Tanaka
    • H05K9/00H05K7/14
    • H05K9/0016H05K9/0018
    • The position of a connector 36 in the forward direction (Ya direction) is determined by having front end surfaces 36f1, 36g1 of protrusions 36f, 36g of the connector that protrude from the left side surface and the right side surface of the connector, respectively, contacting vertical wall portions 72a1, 74a1 of positioning concave portions 72a, 74a of supporting plates 72, 74 of a housing of the shield case. The position of the connector in the backward direction (Yb direction) is determined by having a back surface 36h of the connector 36 contacting a protrusion 70a of a dividing plate 70. The motion of the connector in the right-and-left directions (Xa-Xb directions) is controlled by having the left side surface and the right side surface of the connector facing the supporting plates, respectively, in close proximity. Since the connector is held in a status where no shaking occurs in any direction, there is no need to be sensitive about the assembling accuracy of the portion of the stereo device corresponding to the position of the electronic apparatus, and thus more freedom for back surface panel configuration of the stereo devices can be provided and this reduces the burden of the manufacturers when manufacturing the stereo devices.
    • 连接器36在正向(Ya方向)上的位置由前端面36f 1,36g 1的突起36f,连接器的从左侧面突出的36g和右侧面 分别与屏蔽壳体的壳体的支撑板72,74的定位凹部72a,74a的垂直壁部72a,1,7aa1接触。 连接器在向后方向(Yb方向)上的位置由连接器36的后表面36h接触分隔板70的突出部70a来确定。 连接器的左右方向(Xa-Xb方向)的运动分别通过使连接器的左侧表面和右侧表面分别靠近支撑板来控制。 由于连接器保持在任何方向上不发生振动的状态,因此对于与电子设备的位置相对应的立体声装置的部分的组装精度不需要敏感,因此对于背面的自由度更高 可以提供立体声装置的面板配置,并且这减少了制造立体声装置时制造商的负担。
    • 18. 发明授权
    • Processing apparatus for processing sample in predetermined atmosphere
    • 用于在预定气氛中处理样品的处理装置
    • US06750946B2
    • 2004-06-15
    • US09897930
    • 2001-07-05
    • Yutaka TanakaShigeru TerashimaShinichi Hara
    • Yutaka TanakaShigeru TerashimaShinichi Hara
    • G03B2752
    • H01L21/67196G03F7/7075G03F7/70808G03F7/70841G03F7/70866H01L21/67017H01L21/67201Y10T29/41
    • A substrate processing system has a first processing device which processes a substrate with a first process in a first gas atmosphere within a process chamber and a transfer device that transfers a substrate in a second gas atmosphere within a clean booth, the transfer device transferring a substrate which has been processed with a second process by a second processing device or a substrate which is to be processed by that second processing device. A load-lock chamber has a substrate transfer path between the first processing device and the transfer device and there is a gas supply device which supplies the first gas from the process chamber to the load-lock chamber when the substrate is transferred between the load-lock chamber and a first processing device, and supplies the second gas from the clean booth to the load-lock chamber when the substrate is transferred between the load-lock chamber and the transfer device.
    • 基板处理系统具有第一处理装置,其处理处理室内的第一气体气氛中的第一处理的基板和在清洁室内将第二气体气氛中的基板转印的转印装置,所述转印装置将基板 其通过第二处理装置或将被该第二处理装置处理的基板的第二处理进行处理。 负载锁定室具有在第一处理装置和转印装置之间的基板传送路径,并且存在一个气体供应装置,当基板在载荷传递装置之间传送时,将第一气体从处理室供应到装载锁定室, 锁定室和第一处理装置,并且当衬底在负载锁定室和转移装置之间传送时,将来自清洁室的第二气体供应到负载锁定室。
    • 19. 发明授权
    • Method of monitoring neutron sensitivity of neutron detector
    • 监测中子探测器中子灵敏度的方法
    • US06621884B2
    • 2003-09-16
    • US09849346
    • 2001-05-07
    • Masato ShibazakiYutaka TanakaShigehiro KonoAtsushi Kimura
    • Masato ShibazakiYutaka TanakaShigehiro KonoAtsushi Kimura
    • G01T100
    • G01T1/185G01T3/00
    • Disclosed is a method of monitoring the neutron sensitivity of a neutron detector. Voltage having a predetermined potential difference is applied between an anode and a cathode without irradiating the neutron detector with neutrons to permit an &agr;-ray to be emitted from the nuclear fission substance. The &agr;-ray ionizes the ionizing gas to form an &agr;-ray current (I&agr;) flowing between the anode and the cathode. The current (I&agr;) thus formed is monitored. Also, with the monitoring region in which the applied voltage and the &agr;-ray current (I&agr;) bear a substantially proportional relationship, obtained is an extrapolated zero-volt &agr;-ray current (I&agr;0) at 0V of the applied voltage between the anode and the cathode from the proportional relationship by an extrapolating method, and the extrapolated zero-volt &agr;-ray current (I&agr;0) is correlated with the neutron sensitivity.
    • 公开了一种监测中子探测器的中子灵敏度的方法。 在阳极和阴极之间施加具有预定电位差的电压,而不用中子照射中子检测器以允许从核裂变物质发射α射线。 α射线电离电离气体,形成在阳极和阴极之间流动的α射线电流(Ialpha)。 监测如此形成的电流(Ialpha)。 此外,随着其中施加的电压和α射线电流(Ialpha)具有基本上成比例的关系的监测区域,获得的阳极和/或阳极之间的施加电压的0V处的外推零伏特α射线电流(Ialpha0) 通过外推法的比例关系阴极和外推的零伏特α射线电流(Ialpha0)与中子灵敏度相关。
    • 20. 发明授权
    • Memory control unit and memory control method and medium containing program for realizing the same
    • 存储器控制单元和存储器控制方法以及包含用于实现该程序的介质
    • US06340973B1
    • 2002-01-22
    • US09244036
    • 1999-02-04
    • Toshiyuki OchiaiYosuke FurukawaYutaka TanakaKozo KimuraMakoto HiraiTokuzo KiyoharaHideshi Nishida
    • Toshiyuki OchiaiYosuke FurukawaYutaka TanakaKozo KimuraMakoto HiraiTokuzo KiyoharaHideshi Nishida
    • G06F13372
    • G06F13/1647G11C7/1072G11C7/22
    • A transfer-target unit outputs commands for data reading and data writing. An address generator generates control signals in accordance with the commands, and outputs the number of bytes of data first transferred by read access. A command generator generates control commands in accordance with the control signals to control an SDRAM. At this time the command generator judges the number of transferred bytes to control so that the SDRAM executes instructions in order from an instruction which is the most efficient in data transfer. That is, in the case where data is read across a bank boundary, the command generator judges which is to be executed first between read processing in a bank 0 and active processing in a bank1, to control the SDRAM. A data processor mediates data transfer between the transfer-target unit and the SDRAM in accordance with the control commands. In this way, it is possible to issue commands so as to terminate data transfer in the minimum number of cycles in the case where data read processing is continuously performed to different banks. The number of cycles required for two continuous access (access to the bank 0 and the bank 1) can be thus reduced, thereby increasing effective transfer rates of the SDRAM.
    • 传输目标单元输出用于数据读取和数据写入的命令。 地址生成器根据命令生成控制信号,并输出通过读取访问首先传送的数据的字节数。 命令发生器根据控制信号产生控制命令以控制SDRAM。 此时,命令生成器判断要进行控制的传送字节数,使得SDRAM从数据传输中最有效的指令按顺序执行指令。 也就是说,在通过存储体边界读取数据的情况下,命令生成器判断在存储体0中的读取处理和存储体1中的有效处理之间首先执行哪个,以控制SDRAM。 数据处理器根据控制命令介入转移目标单元和SDRAM之间的数据传输。以这种方式,可以发出命令,以便在数据读取的情况下以最小数量的周期终止数据传输 不断对不同的银行进行处理。 因此可以减少两次连续访问(对存储体0和存储体1的访问)所需的周期数,从而增加SDRAM的有效传输速率。