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11. 发明授权

US5999462A Clock generation circuit for analog value memory circuit 失效
标题翻译：模拟值存储电路的时钟发生电路
公开(公告)号：US5999462A
公开(公告)日：1999-12-07
申请号：US205200
申请日：1998-12-04
申请人： Masayuki Katakura , Masashi Takeda
发明人： Masayuki Katakura , Masashi Takeda
IPC分类号： G11C7/22 , G11C27/04 , G11C7/00
CPC分类号： G11C7/222 , G11C27/04 , G11C7/22
摘要： An analog delay circuit which includes an analog memory circuit wherein a plurality of memory cells each including a memory capacitor and a selection switch for the memory capacitor are arranged in a matrix includes row switches provided for the individual columns for individually being driven by row selection signals. A same clock signal from a clock generation circuit is supplied commonly to an X direction scanning circuit and a Y direction scanning circuit. The number of stages of registers of the X direction scanning circuit and the number of stages of registers of the Y direction scanning circuit are set so that they have no common divisor other than 1. Consequently, when the memory cells are to be selectively scanned, a same selection condition can be provided to all of the memory cells without relying upon the positions of the memory cells, and the parasitic capacitance connected to a signal write/read terminal is reduced.
摘要翻译：一种包括模拟存储电路的模拟延迟电路，其中包括存储电容器和用于存储电容器的选择开关的多个存储单元被布置成矩阵，包括为各个列提供的行开关，用于单独由行选择信号驱动。来自时钟发生电路的相同时钟信号被共同地提供给X方向扫描电路和Y方向扫描电路。将X方向扫描电路的寄存器的级数和Y方向扫描电路的寄存器的级数设置为除了1以外没有公共除数。因此，当要选择性地扫描存储器单元时，可以在不依赖于存储单元的位置的情况下向所有存储单元提供相同的选择条件，并且减少连接到信号写/读终端的寄生电容。

12. 发明授权

US5989934A Process for manufacturing a semiconductor device having a logic circuit and a plurality of input/output amplifier circuits 失效
标题翻译：具有逻辑电路和多个输入/输出放大器电路的半导体器件的制造方法
公开(公告)号：US5989934A
公开(公告)日：1999-11-23
申请号：US315619
申请日：1994-09-30
申请人： Tomoki Nishino , Masashi Takeda
发明人： Tomoki Nishino , Masashi Takeda
IPC分类号： H01L21/822 , H01L21/60 , H01L23/485 , H01L23/528 , H01L27/04
CPC分类号： H01L24/50 , H01L23/528 , H01L24/05 , H01L24/06 , H01L24/48 , H01L24/86 , H01L2224/02166 , H01L2224/04042 , H01L2224/05553 , H01L2224/05554 , H01L2224/05556 , H01L2224/05599 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/48465 , H01L2224/48599 , H01L24/45 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01033 , H01L2924/01079 , H01L2924/01082 , H01L2924/14 , H01L2924/1433 , H01L2924/20753
摘要： A process for manufacturing a semiconductor device wherein the number of input/output terminals can be selectively increased while using input/output amplifier circuit functional portions having the same circuit configuration, by using both ball bonding and TAB bonding techniques. Every two (4A, 4B) of the electrodes on the semiconductor device correspond to each one set of input/output amplifier circuits formed by three ones (6A, 6B, 6C) of the input/output amplifier circuits. The spacing S.sub.1 between the two electrodes (4A, 4B) corresponding to one set of input/output amplifier circuits is substantially equal to the spacing S.sub.2 between the electrode 4B and the adjacent electrode 4C of one adjacent set of input/output amplifier circuits and also to the spacing S.sub.3 between the electrode 4A and the adjacent electrode 4D of the other adjacent set of input/output amplifier circuits.
摘要翻译：一种用于制造半导体器件的方法，其中通过使用球接合和TAB接合技术，可以选择性地增加输入/输出端子的数量，同时使用具有相同电路配置的输入/输出放大器电路功能部分。半导体器件上的每两个电极（4A，4B）对应于由输入/输出放大器电路的三个（6A，6B，6C）形成的每组输入/输出放大器电路。对应于一组输入/输出放大器电路的两个电极（4A，4B）之间的间隔S1基本上等于一组相邻输入/输出放大器电路的电极4B和相邻电极4C之间的间隔S2，相对于另一相邻输入/输出放大器电路组的电极4A和相邻电极4D之间的间隔S3。

13. 发明授权

US4739304A Digital-to-analog converting system 失效
标题翻译：数模转换系统
公开(公告)号：US4739304A
公开(公告)日：1988-04-19
申请号：US917308
申请日：1986-10-10
申请人： Masashi Takeda , Ikuro Hata , Masayuki Katakura , Norio Shoji
发明人： Masashi Takeda , Ikuro Hata , Masayuki Katakura , Norio Shoji
IPC分类号： H03M1/00 , H03M1/68 , H03M1/82
CPC分类号： H03M1/68 , H03M1/745 , H03M1/822
摘要： A digital-to-analog convertor divides an input digital signal into a least significant bit group and a most significant bit group. The most significant bit group is converted using pulse amplitude modulation and the least significant bit group is converted using pulse width modulation, in which the pulse widths are varied symmetrically about predetermined time points within a conversion period in order to improve the linearity of the pulse width modulation conversion.
摘要翻译：数模转换器将输入数字信号分为最低有效位组和最高有效位组。使用脉冲幅度调制转换最高有效位组，并且使用脉冲宽度调制转换最低有效位组，其中脉冲宽度在转换周期内关于预定时间点对称地改变，以便提高脉冲宽度的线性调制转换。

14. 发明授权

US3999125A Peak detector having signal rise-time enhancement 失效
标题翻译：峰值检测器具有信号上升时间增强
公开(公告)号：US3999125A
公开(公告)日：1976-12-21
申请号：US570359
申请日：1975-04-22
申请人： Masashi Takeda , Atsushi Matsuzaki
发明人： Masashi Takeda , Atsushi Matsuzaki
IPC分类号： G01R19/00 , G01R19/04 , G01R19/16
CPC分类号： G01R19/04
摘要： A peak detector having rise-time enhancement of input signals is comprised of a feedback amplifier including two input terminals and a feedback circuit which interconnects the amplifier output terminal with one of the input terminals; and a peak detecting circuit, including a capacitor, coupled to the other of the amplifier input terminals. The capacitor voltage is applied as an input signal to the feedback amplifier, and abrupt changes in the rise-time portion of the input signals are detected and are used to vary the amplifier feedback so as to enhance the output signal produced by the amplifier during the rise-time portion.
摘要翻译：具有输入信号的上升时间增强的峰值检测器由包括两个输入端的反馈放大器和将放大器输出端与其中一个输入端互连的反馈电路构成; 以及包括耦合到放大器输入端子中的另一个的电容器的峰值检测电路。将电容器电压作为输入信号施加到反馈放大器，并且检测输入信号的上升时间部分的突然变化，并用于改变放大器反馈，以便增强在放大器期间产生的输出信号上升时间部分。

15. 发明授权

US08602803B2 Waterproof socket and illumination apparatus 有权
标题翻译：防水插座和照明装置
公开(公告)号：US08602803B2
公开(公告)日：2013-12-10
申请号：US13528296
申请日：2012-06-20
申请人： Satoshi Fukano , Masashi Takeda , Tetsuya Matsumoto , Hirokazu Saegusa
发明人： Satoshi Fukano , Masashi Takeda , Tetsuya Matsumoto , Hirokazu Saegusa
IPC分类号： H01R13/52
CPC分类号： H01R33/9658
摘要： A waterproof socket includes a socket body having an insertion hole to which a lamp pin protruding from an end cap of a straight tube lamp is inserted, a first internal sleeve making contact with the socket body, and a second internal sleeve. The socket body includes a body-side rotation restraint portion engaging with a sleeve-side rotation restraint portion formed in the first internal sleeve to restrain the first internal sleeve from rotating about a center axis of the straight tube lamp. The first internal sleeve includes a first position restraint portion and the second internal sleeve includes a second position restraint portion engaging with the first position restraint portion to restrain the second internal sleeve from rotating about the center axis while allowing the second internal sleeve to move in an axial direction of the straight tube lamp.
摘要翻译：防水插座包括具有插入孔的插座主体，插入从直管灯的端盖突出的灯销，与插座主体接触的第一内部套筒和第二内部套筒。插座主体包括与形成在第一内部套筒中的套筒侧旋转限制部接合的主体侧旋转限制部，以约束第一内部套筒围绕直管灯的中心轴线旋转。第一内部套筒包括第一位置限制部分，并且第二内部套筒包括与第一位置限制部分接合的第二位置限制部分，以限制第二内部套筒围绕中心轴线旋转，同时允许第二内部套筒以直管灯的轴向。

16. 发明授权

US06983231B2 Information processing device and method, data holding device, and program 失效
公开(公告)号：US06983231B2
公开(公告)日：2006-01-03
申请号：US09958244
申请日：2001-02-09
申请人： Hideki Noma , Masahiro Fujita , Makoto Inoue , Noritoshi Inoue , Katsuya Muramatsu , Masashi Takeda
发明人： Hideki Noma , Masahiro Fujita , Makoto Inoue , Noritoshi Inoue , Katsuya Muramatsu , Masashi Takeda
IPC分类号： G06G7/48
CPC分类号： G06N3/006 , G06N3/126
摘要： In an information processing device and method, and programs, firstly, new second inheritance data is created based on first inheritance data regulating the shape and/or behaviors of a virtual creature and secondly, the gene data of the virtual creature is diagnosed and a given value added is applied to the virtual creature when it is determined based on the diagnostic result that the gene data satisfies predetermined conditions and thirdly, information on parents of virtual creatures which are sequentially created by mixing and registered, is stored and a pedigree of a designated virtual creature is inquired into based on the information. On the other hand, a data storing device is provided with a first storage means for storing inheritance data to regulate the shape and/or behaviors of a virtual creature, a communication means for transmitting/receiving inheritance data to/from the outside, and a second storing means for storing the inheritance data of other virtual creatures via the communication means.

17. 发明授权

US06820112B1 Information processing system, information processing method and apparatus, and information serving medium 有权
标题翻译：信息处理系统，信息处理方法和装置以及信息服务媒体
公开(公告)号：US06820112B1
公开(公告)日：2004-11-16
申请号：US09520910
申请日：2000-03-07
申请人： Koichi Matsuda , Koji Matsuoka , Masashi Takeda
发明人： Koichi Matsuda , Koji Matsuoka , Masashi Takeda
IPC分类号： G06F1516
CPC分类号： G06T13/40 , G06T2213/04 , H04L29/06 , H04L67/12 , H04L67/38 , H04L69/329
摘要： An AO server 100, shared server 105 and a client PC 110 are connected to one another via the Internet to build virtual community space accessible from a plurality of client PCs 110, 120, 130, 140, .. . A movement interpretation node 112 for a virtual living object 111 is provided at the client PC 110 for example, and an object management node 102 for the virtual living object 101 (111) in the virtual community space is provided at the AO server 100. Thus, the movement and structure of an object in a virtual space can freely be changed or modified.
摘要翻译： AO服务器100，共享服务器105和客户端PC 110经由互联网彼此连接，以构建可从多个客户PC 110,120,130,140，...访问的虚拟社区空间。例如，在客户机PC 110处提供用于虚拟活体111的移动解释节点112，并且在AO服务器100处提供虚拟社区空间中的虚拟活动对象101（111）的对象管理节点102。虚拟空间中的对象的运动和结构可以自由地改变或修改。

18. 发明授权

US06710734B2 Parallel AD converter 失效
标题翻译：并行AD转换器
公开(公告)号：US06710734B2
公开(公告)日：2004-03-23
申请号：US10345282
申请日：2003-01-16
申请人： Koichi Ono , Hirotaka Shimizu , Masashi Takeda
发明人： Koichi Ono , Hirotaka Shimizu , Masashi Takeda
IPC分类号： H03M136
CPC分类号： H03M1/002 , H03M1/204 , H03M1/365
摘要： An interpolation parallel AD converter is provided in which a switch is installed at each pre-amplifier in a first pre-amplifier array for selectively short-circuiting a portion between a comparison input end and a reference input end thereof, while a load transistor, a switch for selectively diode-connecting the load transistor, and a capacitor for keeping a voltage when the load transistor is diode-connected are installed in a pre-amplifier in a second pre-amplifier array. An offset occurring in each pre-amplifier in the first pre-amplifier array is suppressed by a compression effect of using a gain difference between a reset mode and an amplification mode.
摘要翻译：提供了一种插值并行AD转换器，其中开关安装在第一前置放大器阵列中的每个前置放大器处，用于选择性地使比较输入端和其参考输入端之间的部分短路，而负载晶体管用于选择性地连接负载晶体管的二极管的开关和用于在负载晶体管二极管连接时保持电压的电容器安装在第二前置放大器阵列中的前置放大器中。通过使用复位模式和放大模式之间的增益差的压缩效应来抑制在第一前置放大器阵列中的每个前置放大器中发生的偏移。

19. 发明授权

US06681033B1 Capacitance detecting apparatus and its inspecting method and fingerprint checking apparatus 失效
标题翻译：电容检测装置及其检查方法和指纹检查装置
公开(公告)号：US06681033B1
公开(公告)日：2004-01-20
申请号：US09439084
申请日：1999-11-12
申请人： Motoyasu Yano , Masashi Takeda , Takeshi Koyama , Keiichi Shinozaki
发明人： Motoyasu Yano , Masashi Takeda , Takeshi Koyama , Keiichi Shinozaki
IPC分类号： G06K928
CPC分类号： G01D5/2417 , G01D5/24 , G01D5/2405 , G06K9/0002
摘要： When a current charge method is used as a method of detecting capacitance, there poses a problem in which S/N is deteriorated by a dispersion in element characteristics of a cell to be detected and when a voltage charge method is used, since parasitic capacitances of column sense lines are very large and accordingly, there is needed some devise for sampling electric charge charged to the capacitance. There are arranged unit cells having detection electrodes and cell selecting switches connected between the detection electrodes and column sense lines in an array shape, electric charge is charged from detecting circuits to the detection electrodes under constant charge voltage, and thereafter, the column sense lines are imaginarily grounded to thereby detect the capacitances formed between the detection electrodes and the surface of the finger in accordance with recesses and projections of a fingerprint via the column sense lines.
摘要翻译：当使用当前的充电方法作为检测电容的方法时，存在由于要检测的单元的元件特性的色散而导致S / N恶化的问题，并且当使用电压充电方法时，由于寄生电容列检测线非常大，因此，需要一些用于对充电到电容的电荷进行采样的设备。布置了具有检测电极和单元选择开关的单位单元，其以检测电极和列感测线为阵列形状，在恒定的充电电压下从检测电路向检测电极充电，之后，列感测线为通过接地，通过经由列感测线路的指纹的凹凸来检测检测电极与手指的表面之间形成的电容。

20. 发明授权

US5110842A Electron-beam cured sheet-type foam 失效
标题翻译：电子束固化片型泡沫
公开(公告)号：US5110842A
公开(公告)日：1992-05-05
申请号：US598646
申请日：1990-10-22
申请人： Nario Uejikkoku , Masashi Takeda
发明人： Nario Uejikkoku , Masashi Takeda
IPC分类号： C08J9/00 , C08L23/08 , C08L23/10 , C08L23/12 , C08L23/14 , C08L51/06
CPC分类号： C08L23/12 , C08J9/0061 , C08L23/14 , C08L23/142 , C08J2323/10 , C08J2423/00 , C08L2203/14 , C08L2205/03 , C08L23/0815 , C08L23/0853 , C08L23/0869 , C08L2312/06 , C08L51/06 , Y10S521/915
摘要： An electron-beam cured sheet-type foam comprises: a polypropylene type resin (A) of 100 parts by weight of which main component is polypropylene; a copolymer resin (B) of 5 to 40 parts by weight which is made of ethylene and at least one selected from the group consisting of acrylic acid, ethylacrylate maleic acid anhydride and vinylacetate; and a copolymer resin (C) made of ethylene and an .alpha.-olefin of 4 to 8 carbon atoms, having a melting point of 117.degree. C. to 123.degree. C. and a density of 0.890 g/cm.sup.3 to 0.910 g/cm.sup.3. This foam contains 20 to 60 percent in gel content and has an expansion ratio of 5 to 40.
摘要翻译： PCT No.PCT / JP90 / 00612 Sec。 371 1990年10月22日第 102（e）1990年10月22日日期PCT提交1990年5月14日PCT公布。 WO90 / 14385 PCT公开号日期：1990年11月29日。电子束固化片状泡沫体包括：主要成分为聚丙烯100重量份的聚丙烯类树脂（A）共聚物树脂（B）为5-40重量份，由乙烯制成，至少一种选自丙烯酸，丙烯酸乙酯，马来酸酐和乙酸乙烯酯; 和由乙烯和碳原子数为4〜8的α-烯烃制成的共聚物树脂（C），其熔点为117〜123℃，密度为0.890g / cm 3〜0.910g / cm 3。该泡沫体的凝胶含量为20〜60％，发泡倍率为5〜40。

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