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11. 发明授权

US06893548B2 Method of conditioning electrochemical baths in plating technology 失效
标题翻译：电镀技术中电化学浴的调理方法
公开(公告)号：US06893548B2
公开(公告)日：2005-05-17
申请号：US09882208
申请日：2001-06-13
申请人： Robin Cheung , Daniel A. Carl , Liang-Yuh Chen , Yezdi Dordi , Paul F. Smith , Ratson Morad , Peter Hey , Ashok Sinha
发明人： Robin Cheung , Daniel A. Carl , Liang-Yuh Chen , Yezdi Dordi , Paul F. Smith , Ratson Morad , Peter Hey , Ashok Sinha
IPC分类号： C23C18/16 , C25D7/12 , C25D21/12 , C25D21/18 , C25D5/00
CPC分类号： C25D21/18 , C23C18/1617 , C23C18/1683 , C25D21/12
摘要： An apparatus and method is provided for analyzing or conditioning an electrochemical bath. One aspect of the invention provides a method for analyzing an electrochemical bath in an electrochemical deposition process including providing a first electrochemical bath having a first bath composition, utilizing the first electrochemical bath in an electrochemical deposition process to form a second electrochemical bath having a second bath composition and analyzing the first and second compositions to identify one or more constituents generated in the electrochemical deposition process. Additive material having a composition that is substantially the same as all or at least some of the one or more constituents generated in the electrochemical deposition process may be added to another electrochemical bath to produce a desired chemical composition. The constituents may be added at the beginning of the use of the bath to initially condition the electrochemical bath or may be added, preferably either continuously or periodically, during the electrochemical deposition process.
摘要翻译：提供了一种用于分析或调理电化学浴的装置和方法。本发明的一个方面提供了一种用于在电化学沉积方法中分析电化学浴的方法，包括提供具有第一浴组成的第一电化学浴，利用电化学沉积工艺中的第一电化学浴形成具有第二浴的第二电化学浴组合和分析第一和第二组合物以鉴定在电化学沉积过程中产生的一种或多种成分。具有与在电化学沉积工艺中产生的一种或多种成分中的全部或至少一些基本上相同的组成的添加剂材料可以加入到另一电化学浴中以产生所需的化学组成。可以在使用浴的开始时添加组分以最初调节电化学浴，或者可以在电化学沉积过程期间连续地或周期性地添加。

12. 发明授权

US06399479B1 Processes to improve electroplating fill 有权
标题翻译：改善电镀填充的工艺
公开(公告)号：US06399479B1
公开(公告)日：2002-06-04
申请号：US09386077
申请日：1999-08-30
申请人： Fusen Chen , Zheng Xu , Peijun Ding , Barry Chin , Ashok Sinha
发明人： Fusen Chen , Zheng Xu , Peijun Ding , Barry Chin , Ashok Sinha
IPC分类号： H01L214763
CPC分类号： H01L21/76862 , H01L21/76865 , H01L21/76868 , H01L21/76873 , H01L21/76877
摘要： The invention provides a method for filling a structure on a substrate comprising: depositing a barrier layer on one or more surfaces of the structure, depositing a seed layer over the barrier layer, removing a portion of the seed layer, and electrochemically depositing a metal to fill the structure. Preferably, a portion or all of the seed layer formed on the sidewall portion of the structure is removed using a electrochemical de-plating process prior to the electroplating process.
摘要翻译：本发明提供了一种用于在衬底上填充结构的方法，包括：在结构的一个或多个表面上沉积阻挡层，在阻挡层上沉积种子层，去除种子层的一部分，以及电化学沉积金属填写结构。优选地，在电镀工艺之前使用电化学去镀工艺去除在结构的侧壁部分上形成的种子层的一部分或全部。

13. 发明授权

US06270621B1 Etch chamber 失效
标题翻译：蚀刻室
公开(公告)号：US06270621B1
公开(公告)日：2001-08-07
申请号：US09593018
申请日：2000-06-13
申请人： Simon W. Tam , Semyon Sherstinsky , Mei Chang , Alan Morrison , Ashok Sinha
发明人： Simon W. Tam , Semyon Sherstinsky , Mei Chang , Alan Morrison , Ashok Sinha
IPC分类号： H01L2100
CPC分类号： H01L21/68721 , H01J2237/022 , H01L21/68785
摘要： A conventional plasma etch chamber is modified to reduce particulate generation in the chamber that contaminates the chamber and substrates mounted on a pedestal support being processed therein. A clamping ring cover in the chamber is made of ceramic. Grooves are machined into the cover and metal antennas can be mounted in the grooves to act as a getter for particles and pre-particle, non-volatile contaminants in the chamber. The clamping ring for the substrate being processed is also made of ceramic. Fewer particles are generated by ion bombardment using ceramic versus prior art clamping rings made of aluminum. Further, the cylinder clamping ring support which surrounds the pedestal support is fitted with a plurality of openings or windows to allow escape of purge gases that carry particles through the windows and into the adjoining exhaust system of the chamber and thus also away from the substrate being processed. Markedly fewer particles are deposited onto substrates using the modified plasma etch chamber of the invention than was found for unmodified chambers.
摘要翻译：修改常规等离子体蚀刻室以减少腔室中的颗粒产生，从而污染安装在其中处理的基座支撑件上的腔室和基底。腔室中的夹紧环盖由陶瓷制成。槽被加工成盖子，并且金属天线可以安装在凹槽中，以用作在室中的颗粒和预颗粒，非挥发性污染物的吸气剂。用于被处理的基板的夹紧环也由陶瓷制成。通过使用陶瓷的离子轰击产生的较少的颗粒与由铝制成的现有技术的夹紧环产生。此外，围绕基座支撑件的气缸夹紧环支撑装配有多个开口或窗口，以允许通过窗口携带颗粒的吹扫气体逸出并进入室的相邻排气系统，并且因此也远离基板处理。使用本发明的改进的等离子体蚀刻室，显着减少颗粒沉积到基板上，而不是未修改的室。

14. 发明授权

US06176667B1 Multideck wafer processing system 失效
标题翻译： Multideck晶圆处理系统
公开(公告)号：US06176667B1
公开(公告)日：2001-01-23
申请号：US08644636
申请日：1996-04-30
申请人： Kevin Fairbairn , Ashok Sinha
发明人： Kevin Fairbairn , Ashok Sinha
IPC分类号： B65G4907
CPC分类号： H01L21/67271 , H01L21/67017 , H01L21/67178 , H01L21/6719 , H01L21/67201 , H01L21/67742 , H01L21/67754 , Y10S414/137 , Y10S414/139 , Y10S414/141
摘要： A multideck wafer processing system is described for the treatment of semiconductor wafers. The system includes at least two process chambers stacked one above the other to provide for higher wafer throughput per unit area of cleanroom space. The stacked process chambers enable sharing of pressurization, gas, electrical, and control support services for the processing chambers.
摘要翻译：描述了用于处理半导体晶片的多层晶片处理系统。该系统包括至少两个堆叠在一起的处理室，以提供每单位面积洁净室空间的更高的晶片生产量。堆叠的处理室能够共享用于处理室的加压，气体，电气和控制支持服务。

15. 发明申请

US20100151694A1 METHOD AND APPARATUS FOR GROWING THIN OXIDE FILMS ON SILICON WHILE MINIMIZING IMPACT ON EXISTING STRUCTURES 有权
标题翻译：在最小化现有结构影响下生长硅氧化物薄膜的方法和装置
公开(公告)号：US20100151694A1
公开(公告)日：2010-06-17
申请号：US12334425
申请日：2008-12-12
申请人： Bruce W. Peuse , Yaozhi Hu , Paul Janis Timans , Guangcai Xing , Wilfried Lerch , Sing-Pin Tay , Stephen E. Savas , Georg Roters , Zsolt Nenyei , Ashok Sinha
发明人： Bruce W. Peuse , Yaozhi Hu , Paul Janis Timans , Guangcai Xing , Wilfried Lerch , Sing-Pin Tay , Stephen E. Savas , Georg Roters , Zsolt Nenyei , Ashok Sinha
IPC分类号： H01L21/316 , C23C16/00
CPC分类号： H01L21/31654 , H01L21/0223 , H01L21/02238 , H01L21/02323 , H01L21/0234 , H01L21/67115 , H01L21/67248 , H01L21/68771
摘要： Plasma assisted low temperature radical oxidation is described. The oxidation is selective to metals or metal oxides that may be present in addition to the silicon being oxidized. Selectivity is achieved by proper selection of process parameters, mainly the ratio of H2 to O2 gas. The process window may be enlarged by injecting H2O steam into the plasma, thereby enabling oxidation of silicon in the presence of TiN and W, at relatively low temperatures. Selective oxidation is improved by the use of an apparatus having remote plasma and flowing radicals onto the substrate, but blocking ions from reaching the substrate.
摘要翻译：描述了等离子体辅助低温自由基氧化。除了被氧化的硅之外，氧化对于可能存在的金属或金属氧化物是选择性的。选择性通过适当选择工艺参数来实现，主要是H2与O2气的比例。可以通过将H 2 O蒸汽注入到等离子体中来扩大工艺窗口，从而可以在相对低的温度下在TiN和W的存在下氧化硅。通过使用具有远离等离子体和流动基团的装置到衬底上但阻止离子到达衬底的装置来改善选择性氧化。

16. 发明申请

US20070095654A1 Controlled multi-step magnetron sputtering process 审中-公开
标题翻译：受控多级磁控溅射工艺
公开(公告)号：US20070095654A1
公开(公告)日：2007-05-03
申请号：US11636751
申请日：2006-12-11
申请人： Praburam Gopalraja , Jianming Fu , Fusen Chen , Girish Dixit , Zheng Xu , Wei Wang , Ashok Sinha
发明人： Praburam Gopalraja , Jianming Fu , Fusen Chen , Girish Dixit , Zheng Xu , Wei Wang , Ashok Sinha
IPC分类号： C23C14/00
CPC分类号： H01L21/76844 , C23C14/046 , C23C14/165 , C23C14/185 , C23C14/225 , C23C14/35 , H01J37/3405 , H01J37/342 , H01J37/3423 , H01J37/3452 , H01J37/3455 , H01J37/3458 , H01L21/2855 , H01L21/76805 , H01L21/76843 , H01L21/76862 , H01L21/76865 , H01L21/76873 , H01L2221/1089
摘要： A multi-step sputtering process in plasma sputter reactor having target and magnetron operable in two modes, for example, in a substrate sputter etch and a substrate sputter deposition. The target has an annular vault facing the wafer to be sputter coated. Various types of magnetic means positioned around the vault create a magnetic field supporting a plasma extending over a large volume of the vault. An integrated copper via filling process with the inventive reactor or other reactor includes a first step of highly ionized sputter deposition of copper, which can optionally be used to remove the barrier layer at the bottom of the via, a second step of more neutral, lower-energy sputter deposition of copper to complete the seed layer, and a third step of electroplating copper into the hole to complete the metallization. The first two steps can be also used with barrier metals.
摘要翻译：在等离子体溅射反应器中的多步骤溅射工艺，其具有可在两种模式中操作的靶和磁控管，例如在衬底溅射蚀刻和衬底溅射沉积中。目标具有面向待溅射涂覆的晶片的环形保险库。位于拱顶周围的各种类型的磁性装置产生一个支撑等离子体的磁场，该等离子体延伸在大容积的拱顶上。与本发明的反应器或其它反应器的集成铜通孔填充方法包括铜的高度电离溅射沉积的第一步骤，其可任选地用于去除通孔底部的阻挡层，更中立的，更低的铜的完全溅射沉积以完成种子层，以及将铜电镀到孔中以完成金属化的第三步骤。前两个步骤也可以与阻隔金属一起使用。

17. 发明申请

US20060264031A1 METHOD FOR DEPOSITING TUNGSTEN-CONTAINING LAYERS BY VAPOR DEPOSITION TECHNIQUES 有权
标题翻译：通过蒸发沉积技术沉积含钨层的方法
公开(公告)号：US20060264031A1
公开(公告)日：2006-11-23
申请号：US11461909
申请日：2006-08-02
申请人： Ming Xi , Ashok Sinha , Moris Kori , Alfred Mak , Xinliang Lu , Ken Lai , Karl Littau
发明人： Ming Xi , Ashok Sinha , Moris Kori , Alfred Mak , Xinliang Lu , Ken Lai , Karl Littau
IPC分类号： H01L21/4763
CPC分类号： C23C16/0272 , C23C16/34 , C23C16/45525 , C23C16/45527 , C23C16/45561 , C30B25/02 , C30B25/14 , C30B29/38 , H01L21/28562 , H01L21/76843 , H01L21/76876
摘要： In one embodiment, a method for forming a tungsten-containing material on a substrate is provided which includes forming a tungsten nucleation layer by sequentially exposing a substrate to a boron-containing gas and a tungsten-containing gas within a processing chamber during an atomic layer deposition process, and forming a tungsten bulk layer on the tungsten nucleation layer by exposing the substrate to a processing gas that contains the tungsten-containing gas and a reactive precursor gas within another processing chamber during a chemical vapor deposition process. In one example, the tungsten nucleation layer is deposited on a dielectric material, such as silicon oxide. In another example, the tungsten nucleation layer is deposited on a barrier material, such as titanium or titanium nitride. Other examples provide that the tungsten nucleation layer and the tungsten bulk layer are deposited in the same processing chamber.
摘要翻译：在一个实施例中，提供了一种用于在基板上形成含钨材料的方法，其包括通过在原子层中将衬底顺序地暴露于处理室内的含硼气体和含钨气体来形成钨成核层通过在化学气相沉积工艺期间将衬底暴露于另一处理室内含有含钨气体和反应性前体气体的处理气体，在钨成核层上形成钨体层。在一个实例中，钨成核层沉积在介电材料如氧化硅上。在另一个实例中，钨成核层沉积在诸如钛或氮化钛的阻挡材料上。其他实例提供了钨成核层和钨本体层沉积在相同的处理室中。

18. 发明申请

US20060246690A1 Electro-chemical deposition system 失效
公开(公告)号：US20060246690A1
公开(公告)日：2006-11-02
申请号：US11476945
申请日：2006-06-27
申请人： Yezdi Dordi , Donald Olgado , Ratson Morad , Peter Hey , Mark Denome , Michael Sugarman , Mark Lloyd , Anna Lloyd , Joseph Stevens , Dan Marohl , Ho Shin , Eugene Ravinovich , Robin Cheung , Ashok Sinha , Avi Tepman , Dan Carl , George Birkmaier
发明人： Yezdi Dordi , Donald Olgado , Ratson Morad , Peter Hey , Mark Denome , Michael Sugarman , Mark Lloyd , Anna Lloyd , Joseph Stevens , Dan Marohl , Ho Shin , Eugene Ravinovich , Robin Cheung , Ashok Sinha , Avi Tepman , Dan Carl , George Birkmaier
IPC分类号： H01L21/20 , B05D3/00 , B05C13/00 , B05C13/02
CPC分类号： H01L21/6723 , C25D7/123 , C25D17/001 , C25D17/06 , C25D21/02 , C25D21/12 , H01L21/2885 , H01L21/67028 , H01L21/67051 , H01L21/6708 , H01L21/67126 , H01L21/67167 , H01L21/67184 , H01L21/67745 , H01L21/68707 , H01L21/68721 , H01L21/68728 , H01L21/68742 , H05K3/241
摘要： The present invention provides an electro-chemical deposition system that is designed with a flexible architecture that is expandable to accommodate future designs and gap fill requirements and provides satisfactory throughput to meet the demands of other processing systems. The electro-chemical deposition system generally comprises a mainframe having a mainframe wafer transfer robot, a loading station disposed in connection with the mainframe, one or more processing cells disposed in connection with the mainframe, and an electrolyte supply fluidly connected to the one or more electrical processing cells. Preferably, the electro-chemical deposition system includes a spin-rinse-dry (SRD) station disposed between the loading station and the mainframe, a rapid thermal anneal chamber attached to the loading station, and a system controller for controlling the electro-chemical deposition process and the components of the electro-chemical deposition system.

19. 发明申请

US20060063370A1 Semiconductor device interconnect fabricating techniques 失效
标题翻译：半导体器件互连制造技术
公开(公告)号：US20060063370A1
公开(公告)日：2006-03-23
申请号：US10945664
申请日：2004-09-21
申请人： Robin Cheung , Ashok Sinha
发明人： Robin Cheung , Ashok Sinha
IPC分类号： H01L21/4763 , H01L21/44
CPC分类号： H01L21/76885 , H01L21/288 , H01L21/2885 , H01L21/76834 , H01L21/7685 , H01L21/76852 , H01L2221/1089
摘要： The present invention provides methods for fabricating integrated circuit structures for use in semiconductor wafer fabrication techniques. A Cu diffusion barrier/Cu seed sandwich layer is deposited on a substrate. A first sacrificial layer, deposited on the sandwich layer, is developed to form a cavity. A first Cu layer is selectively deposited on the sandwich layer inside the cavity. A second sacrificial layer is deposited on the first sacrificial layer and on the first Cu layer. A cavity is formed in the second sacrificial layer, exposing at least a portion of the first Cu layer. A second Cu layer is selectively deposited in the second sacrificial layer cavity including the exposed portion of the first Cu layer. The combination of the first and second Cu layers forms a Cu component. Subsequently, the first and second sacrificial layers are removed resulting in a Cu component that is free standing on the sandwich layer, such that the top and sides of the component are exposed. Sandwich layer portions extending from the Cu component are removed from the substrate, thereby forming an exposed sandwich layer edge between the surface of the Cu component and the substrate. A Cu diffusion barrier layer is deposited on the Cu component and on the exposed edge of the sandwich layer, resulting in a Cu barrier layer encapsulated component. The encapsulated component is encased in a dielectric layer. Similarly, Cu components of the present invention are fabricated by means of selective electroless Cu deposition in a sacrificial layer cavity having a metal layer that is formed by selective electroless deposition of a metal on a sensitizer layer. Examples of Cu components and encapsulated Cu components of the present invention include vertical interconnects and inverted damascene structures.
摘要翻译：本发明提供用于制造用于半导体晶片制造技术的集成电路结构的方法。在基底上沉积Cu扩散阻挡层/ Cu种子夹层。沉积在夹心层上的第一牺牲层被开发以形成空腔。第一Cu层被选择性地沉积在空腔内的夹层上。在第一牺牲层和第一Cu层上沉积第二牺牲层。在第二牺牲层中形成空腔，露出第一Cu层的至少一部分。第二Cu层被选择性地沉积在包括第一Cu层的暴露部分的第二牺牲层腔中。第一和第二Cu层的组合形成Cu组分。随后，去除第一和第二牺牲层，导致在夹层上自由站立的Cu成分，使得部件的顶部和侧面被暴露。从基板上除去从Cu成分延伸的夹层，从而在Cu成分的表面与基板之间形成露出的夹层结构。在Cu组分和夹层的暴露边缘上沉积Cu扩散阻挡层，形成Cu阻挡层封装组分。封装的组件被封装在电介质层中。类似地，本发明的Cu组分通过选择性无电镀Cu沉积在具有金属层的牺牲层腔中制造，所述金属层通过金属在敏化剂层上的选择性无电沉积形成。本发明的Cu组分和包封的Cu组分的实例包括垂直互连和反向镶嵌结构。

20. 发明申请

US20050255700A1 Controlled multi-step magnetron sputtering process 审中-公开
标题翻译：受控多级磁控溅射工艺
公开(公告)号：US20050255700A1
公开(公告)日：2005-11-17
申请号：US11166836
申请日：2005-06-24
申请人： Praburam Gopalraja , Jianming Fu , Fusen Chen , Girish Dixit , Zheng Xu , Wei Wang , Ashok Sinha
发明人： Praburam Gopalraja , Jianming Fu , Fusen Chen , Girish Dixit , Zheng Xu , Wei Wang , Ashok Sinha
IPC分类号： C23C14/34 , C23C14/04 , C23C14/16 , C23C14/32 , C23C14/35 , H01J37/34 , H01L21/203 , H01L21/285 , H01L21/288 , H01L21/768
CPC分类号： H01L21/76844 , C23C14/046 , C23C14/165 , C23C14/185 , C23C14/225 , C23C14/35 , H01J37/3405 , H01J37/342 , H01J37/3423 , H01J37/3452 , H01J37/3455 , H01J37/3458 , H01L21/2855 , H01L21/76805 , H01L21/76843 , H01L21/76862 , H01L21/76865 , H01L21/76873 , H01L2221/1089
摘要： A multi-step sputtering process in plasma sputter reactor having target and magnetron operable in two modes, for example, in a substrate sputter etch and a substrate sputter deposition. The target has an annular vault facing the wafer to be sputter coated. Various types of magnetic means positioned around the vault create a magnetic field supporting a plasma extending over a large volume of the vault. An integrated copper via filling process with the inventive reactor or other reactor includes a first step of highly ionized sputter deposition of copper, which can optionally be used to remove the barrier layer at the bottom of the via, a second step of more neutral, lower-energy sputter deposition of copper to complete the seed layer, and a third step of electroplating copper into the hole to complete the metallization. The first two steps can be also used with barrier metals.
摘要翻译：在等离子体溅射反应器中的多步骤溅射工艺，其具有可在两种模式中操作的靶和磁控管，例如在衬底溅射蚀刻和衬底溅射沉积中。目标具有面向待溅射涂覆的晶片的环形保险库。位于拱顶周围的各种类型的磁性装置产生一个支撑等离子体的磁场，该等离子体延伸在大容积的拱顶上。与本发明的反应器或其它反应器的集成铜通孔填充方法包括铜的高度电离溅射沉积的第一步骤，其可任选地用于去除通孔底部的阻挡层，更中立的，更低的铜的完全溅射沉积以完成种子层，以及将铜电镀到孔中以完成金属化的第三步骤。前两个步骤也可以与阻隔金属一起使用。

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