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    • 9. 发明公开
    • 반도체 장치
    • 半导体器件
    • KR1020140147045A
    • 2014-12-29
    • KR1020140073567
    • 2014-06-17
    • 가부시키가이샤 한도오따이 에네루기 켄큐쇼
    • 아오키다케시구로카와요시유키고즈마무네히로나카가와다카시
    • G11C5/14G11C7/00
    • H03K19/0013H03K19/018585
    • The present invention relates to data retention of a register in a programmable logic element. A volatile storage circuit and a nonvolatile storage circuit are provided in a register of a programmable logic element whose function can be changed in response to a plurality of context signals. The nonvolatile storage circuit includes nonvolatile storage portions for storing data in the register. The number of nonvolatile storage portions corresponds to the number of context signals. With such a structure, the function can be changed each time context signals are switched and data in the register that are changed when the function is changed can be backed up to the nonvolatile storage portion in each function. In addition, the function can be changed each time context signals are switched and the data in the register that are backed up when the function is changed can be recovered to the volatile storage circuit.
    • 本发明涉及可编程逻辑元件中寄存器的数据保持。 易失性存储电路和非易失性存储电路设置在可编程逻辑元件的寄存器中,该可编程逻辑元件的功能可以响应于多个上下文信号而改变。 非易失性存储电路包括用于将数据存储在寄存器中的非易失性存储部分。 非易失性存储部分的数量对应于上下文信号的数量。 通过这样的结构,可以在每次上下文信号切换时改变功能,并且在功能改变时改变的寄存器中的数据可以备份到每个功能中的非易失性存储部分。 此外,每当上下文信号被切换并且功能改变时备份的寄存器中的数据可以被恢复到易失性存储电路时,可以改变该功能。