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1. 发明专利

JP2013123083A Auto-zero amplifier and feedback amplification circuit using the amplifier 有权
标题翻译：使用放大器的自动零放大器和反馈放大电路
公开(公告)号：JP2013123083A
公开(公告)日：2013-06-20
申请号：JP2011269863
申请日：2011-12-09
申请人： Fuji Electric Co Ltd , 富士電機株式会社
发明人： IWAMOTO MOTOMITSU
IPC分类号： H03F3/34 , H03F3/45
CPC分类号： H03F3/45179 , H03F1/342 , H03F3/45183 , H03F3/45475 , H03F3/45968 , H03F3/45986 , H03F2203/45536 , H03F2203/45544 , H03F2203/45562 , H03F2203/45588 , H03F2203/45614 , H03F2203/45616 , H03F2203/45618 , H03F2203/45644 , H03F2203/45674 , H03F2203/45681 , H03F2203/45684 , H03F2203/45724
摘要： PROBLEM TO BE SOLVED: To provide an auto-zero amplifier that has a single OP amplifier, eliminates the time when the OP amplifier is out of operation, and can adapt to a temperature drift.SOLUTION: During a normal operation, the OP amplifier has an output fed back such that the same current flows through differential pair transistors M2, M3. Specifically, in order that the same current may flow through the differential pair transistors M2, M3, a voltage applied to a gate terminal of M3 must be lower by |ΔVt| than that applied to M2 to compensate for a threshold difference between the differential pair transistors. Flipping switches SW1-SW4 while a virtual short circuit is established makes the output a signal in which positive and negative ripples proportional to |ΔVt| are superposed on a true value, and the true value can be retrieved through an LPF (low pass filter).
摘要翻译：要解决的问题：为了提供一个具有单个OP放大器的自动归零放大器，消除了OP放大器失去工作的时间，并且可以适应温度漂移。解决方案：在正常操作期间，OP放大器具有反馈的输出，使得相同的电流流过差分对晶体管M2，M3。具体地说，为了使相同的电流可以流过差分对晶体管M2，M3，施加到M3的栅极端子的电压必须比施加到M2的电压低3/4Vt以补偿差分对晶体管之间的阈值差。在虚拟短路建立的情况下，翻转开关SW1-SW4使输出成为与¾ΔVt¾成比例的正和负波纹叠加在真实值上的信号，并且可以通过LPF（低通滤波器）检索真值。版权所有（C）2013，JPO＆INPIT

2. 发明专利

JP2009284150A Offset canceling circuit and display 审中-公开
标题翻译：偏移取消电路和显示
公开(公告)号：JP2009284150A
公开(公告)日：2009-12-03
申请号：JP2008133150
申请日：2008-05-21
申请人： Panasonic Corp , パナソニック株式会社
发明人： KOJIMA TOMOKAZU , MIZUKI MAKOTO
IPC分类号： H03F3/34 , G02F1/133 , G09G3/20 , G09G3/36 , H01L51/50 , H03F3/45
CPC分类号： G09G3/20 , G09G3/32 , G09G2310/0275 , G09G2320/02 , H03F3/005 , H03F3/45183 , H03F3/45188 , H03F3/45753 , H03F2203/45212 , H03F2203/45366 , H03F2203/45512 , H03F2203/45514 , H03F2203/45534 , H03F2203/45536 , H03F2203/45618 , H03F2203/45631 , H03F2203/45651 , H03F2203/45726 , H03F2203/45728
摘要： PROBLEM TO BE SOLVED: To suppress and output an offset voltage at a high speed by a driving circuit in liquid crystal or a display. SOLUTION: An input voltage is applied to transistors M1 and M2 forming a differential pair at the same time, and M3 and M4 transistors forming an active load are diode-connected and capacities are prepared at gates of M3, M4 to store an operating current and an operating voltage suitable to the input voltage. Then the gate and drain of the M3 and the gate and drain of the M4 which form the active load are placed in non-conductive states to hold electric charges accumulated in the capacitors of the M3 and the MI4, thereby performing operation in a voltage-follower state. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：通过液晶或显示器中的驱动电路抑制和输出高速的偏移电压。
解决方案：输入电压同时施加到形成差分对的晶体管M1和M2，形成有源负载的M3和M4晶体管是二极管连接的，并且在M3，M4的栅极准备容量，工作电流和适用于输入电压的工作电压。然后，形成有源负载的M3的栅极和漏极以及M4的栅极和漏极被置于非导通状态，以保持蓄积在M3和MI4的电容器中的电荷，从而在电压 - 追随者状态。版权所有（C）2010，JPO＆INPIT

3. 发明专利

JP2008108409A Photoreceiver/amplifier circuit, optical pickup apparatus, and optical disk drive 有权
标题翻译：光电/放大器电路，光学拾取器和光盘驱动器
公开(公告)号：JP2008108409A
公开(公告)日：2008-05-08
申请号：JP2007181433
申请日：2007-07-10
申请人： Sharp Corp , シャープ株式会社
发明人： ONISHI MASAYA
IPC分类号： G11B7/13 , H01L31/10
CPC分类号： H03F3/087 , H03F1/26 , H03F3/45085 , H03F3/45475 , H03F3/456 , H03F3/45973 , H03F2203/45212 , H03F2203/45528 , H03F2203/45536 , H03F2203/45618
摘要： PROBLEM TO BE SOLVED: To obtain a photoreceiver/amplifier circuit reducing noise and providing desirable offset voltage characteristics. SOLUTION: The subject invention provides a photoreceiver/amplifier circuit comprising a differential circuit including a differential transistor pair and a bias circuit; an active load; a feedback resistor for converting a photocurrent generated from a photodiode into a voltage; a reference resistor; and a compensation circuit. The resistance of the feedback resistor is greater than the resistance of the reference resistor. The compensation circuit supplies a compensation current from a junction between the feedback resistor and a non-inverting input terminal of the differential amplifier circuit, so as to cancel the difference between a voltage between terminals of the feedback resistor and a voltage between terminals of the reference resistor. This reduces noise and improves offset voltage characteristics. The present invention provides a photoreceiver/amplifier circuit ensuring noise reduction and desirable offset voltage characteristics. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：获得降低噪声并提供期望的失调电压特性的光接收器/放大器电路。解决方案：本发明提供了一种光接收器/放大器电路，其包括包括差分晶体管对和偏置电路的差分电路; 有功负载; 用于将从光电二极管产生的光电转换成电压的反馈电阻器; 参考电阻; 和补偿电路。反馈电阻的电阻大于参考电阻的电阻。补偿电路从反馈电阻和差分放大器电路的非反相输入端之间的接点提供补偿电流，以消除反馈电阻的端子之间的电压与参考电压的端子之间的电压之间的差值电阻。这降低了噪声并改善了失调电压特性。本发明提供一种确保噪声降低和期望的失调电压特性的光接收器/放大器电路。版权所有（C）2008，JPO＆INPIT

5. 发明专利

JP2012114903A Low distortion variable gain amplifier (vga) 有权
标题翻译：低失真可变增益放大器（VGA）
公开(公告)号：JP2012114903A
公开(公告)日：2012-06-14
申请号：JP2011247734
申请日：2011-11-11
申请人： Marvell World Trade Ltd , マーベルワールドトレードリミテッド
发明人： STEVE VAN , ZHANG TANG , YOO MYUNG JAE
IPC分类号： H03G3/12 , H03F1/32 , H03F1/34 , H03F3/45
CPC分类号： H03F3/45071 , H03F1/303 , H03F1/3211 , H03F3/45475 , H03F2200/234 , H03F2203/45116 , H03F2203/45588 , H03F2203/45591 , H03F2203/45594 , H03F2203/45616 , H03F2203/45618 , H03G1/0023 , H03G3/004
摘要： PROBLEM TO BE SOLVED: To correct the asymmetry of an asymmetric signal.SOLUTION: A first resistance is coupled between an input node and an output node of an amplifier, the input node receiving an asymmetric signal. A second resistance is coupled to the input node of the amplifier. The second resistance includes a linear resistor. A third resistance is coupled to the second resistance. The third resistance is varied to adjust an amount of asymmetric correction provided by the amplifier to correct the asymmetric signal at the output node. The amount of asymmetric correction is a function of the first resistance and a combination of the second resistance and the third resistance.
摘要翻译：要解决的问题：纠正不对称信号的不对称性。解决方案：第一电阻耦合在放大器的输入节点和输出节点之间，输入节点接收不对称信号。第二电阻耦合到放大器的输入节点。第二个电阻包括一个线性电阻。第三电阻耦合到第二电阻。改变第三电阻以调整由放大器提供的非对称校正量，以校正输出节点处的不对称信号。非对称校正的量是第一电阻和第二电阻和第三电阻的组合的函数。版权所有（C）2012，JPO＆INPIT

6. 发明专利

JP2010041368A Operational amplifier circuit and display panel driving apparatus 审中-公开
标题翻译：操作放大器电路和显示面板驱动装置
公开(公告)号：JP2010041368A
公开(公告)日：2010-02-18
申请号：JP2008201610
申请日：2008-08-05
申请人： Nec Electronics Corp , Necエレクトロニクス株式会社
发明人： NISHIMURA KOICHI
IPC分类号： H03F3/45 , G02F1/133 , G09G3/20 , G09G3/36
CPC分类号： H03F3/45183 , G09G3/2011 , G09G3/3614 , G09G3/3685 , G09G2310/027 , G09G2310/0289 , G09G2320/0276 , H03F3/3023 , H03F3/45179 , H03F3/4521 , H03F3/45219 , H03F3/45376 , H03F3/45475 , H03F2200/414 , H03F2203/30021 , H03F2203/45138 , H03F2203/45188 , H03F2203/45224 , H03F2203/45236 , H03F2203/45396 , H03F2203/45471 , H03F2203/45512 , H03F2203/45618
摘要： PROBLEM TO BE SOLVED: To provide an operational amplifier circuit which is less in power consumption, and can be operated even when a power voltage is low. SOLUTION: The operational amplifier circuit 10 includes: an input stage 11 for generating an internal current I IN + in response to a potential difference between an inverting input terminal and a non-inverting input terminal; and an output stage 12A for driving an output terminal in response to the internal current I IN + . The output stage 12A includes: a floating current source through which the internal current I IN + is allowed to flow; a PMOS transistor MP 10 for driving the output terminal in response to the potential of a first terminal of the floating current source; and an NMOS transistor MN 10 for driving the output terminal in response to the potential of a second terminal of the floating current source. The floating current source includes: a PMOS transistor MP 9 whose source and drain are respectively connected to the first and second terminals; and an NMOS transistor MN 9 whose drain and source are respectively connected to the first and second terminals. A back gate of the PMOS transistor MP 9 is connected to the source thereof. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供功耗较小的运算放大器电路，并且即使在电源电压低的情况下也能够运行。解决方案：运算放大器电路10包括：输入级11，用于响应于反相输入端和反相输入端之间的电位差产生内部电流I IN + 非反相输入端子; 以及用于响应于内部电流I IN + 驱动输出端子的输出级12A。输出级12A包括：允许内部电流I IN + 流动的浮动电流源; 用于响应于浮动电流源的第一端子的电位驱动输出端子的PMOS晶体管MP 10 以及用于响应于浮动电流源的第二端子的电位驱动输出端子的NMOS晶体管MN 10 。浮动电流源包括：源极和漏极分别连接到第一和第二端子的PMOS晶体管MP SB <9S; 以及其漏极和源极分别连接到第一和第二端子的NMOS晶体管MN 9 。 PMOS晶体管MP <9>的背栅极连接到其源极。版权所有（C）2010，JPO＆INPIT

7. 发明专利

JP5504032B2 Audio signal amplification circuit 有权
公开(公告)号：JP5504032B2
公开(公告)日：2014-05-28
申请号：JP2010078285
申请日：2010-03-30
申请人：ローム株式会社
发明人：克幸小野 , 明展河村
IPC分类号： H03F1/00 , H03F3/183 , H04R3/00
CPC分类号： H03F3/45475 , H03F1/0261 , H03F3/45183 , H03F2200/03 , H03F2203/45528 , H03F2203/45536 , H03F2203/45544 , H03F2203/45548 , H03F2203/45561 , H03F2203/45594 , H03F2203/45596 , H03F2203/45618 , H03F2203/45622

8. 发明专利

JP5328461B2 Operational amplifier 有权
公开(公告)号：JP5328461B2
公开(公告)日：2013-10-30
申请号：JP2009103187
申请日：2009-04-21
申请人：ルネサスエレクトロニクス株式会社
发明人：浩一西村
IPC分类号： G09G3/36 , G09G3/20 , H03F1/02 , H03F3/30
CPC分类号： H03F3/45192 , G09G3/3614 , G09G3/3688 , G09G2310/0291 , G09G2330/021 , H03F3/3028 , H03F2203/45562 , H03F2203/45614 , H03F2203/45616 , H03F2203/45618 , H03F2203/45644 , H03F2203/45724 , H03F2203/45728
摘要： An operational amplifier includes an input differential stage having one external input receiving an external input voltage and two outputs; and two output stages. A switch section is provided between inputs of the two output stages and the two outputs of the input differential stage, and is configured to alternately connect the two outputs of the input differential stage and inputs of a positive-only output stage of the two output stages; and the two outputs of the input differential stage and inputs of a negative-only output stage of the two output stages.

9. 发明专利

JP4228020B2 The light-receiving amplifier circuit, the optical pickup device and optical disk device 有权
公开(公告)号：JP4228020B2
公开(公告)日：2009-02-25
申请号：JP2007181433
申请日：2007-07-10
申请人：シャープ株式会社
发明人：雅也大西
IPC分类号： G11B7/13 , H01L31/10
CPC分类号： H03F3/087 , H03F1/26 , H03F3/45085 , H03F3/45475 , H03F3/456 , H03F3/45973 , H03F2203/45212 , H03F2203/45528 , H03F2203/45536 , H03F2203/45618

10. 发明专利

JPWO2006103977A1 ディスプレイ駆動回路有权
公开(公告)号：JPWO2006103977A1
公开(公告)日：2008-09-04
申请号：JP2007510404
申请日：2006-03-20
申请人：松下電器産業株式会社
发明人：西　和義 , 和義西 , 淳二瀧口 , 淳二瀧口 , 浅田　哲男 , 哲男浅田 , 皿井　修 , 修皿井
IPC分类号： G09G3/36 , G02F1/133 , G09G3/20
CPC分类号： G09G3/20 , G09G3/3688 , G09G2310/0275 , G09G2320/0252 , G09G2330/021 , G09G2330/06 , H03F3/3001 , H03F3/4521 , H03F2203/30099 , H03F2203/30132 , H03F2203/45618 , H03F2203/45726
摘要：出力モードでは、出力スイッチ(SW11)がオンになり供給スイッチ(SW13a,SW13b)がオフになるとともに、駆動トランジスタ(T105a,T105b)から出力電流が中間ノード(nc)へ供給される。一方、遷移モードでは、出力スイッチ(SW11)がオフになり供給スイッチ(SW13a,SW13b)がオンになるとともに、駆動トランジスタ(T105a,T105b)からの出力電流の供給が遮断される。このとき、容量素子(C103a,C103b)は、基準ノード(Vcc,Vss)からの電圧を受ける。また、中間ノード(nc)には入力電圧(Vin)が供給される。

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