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2. 发明专利

JP2008042502A Offset correction apparatus, semiconductor device and display device and offset correcting method, noise detector, and noise detecting method 有权
标题翻译：偏移校正装置，半导体装置和显示装置和偏移校正方法，噪声检测器和噪声检测方法
公开(公告)号：JP2008042502A
公开(公告)日：2008-02-21
申请号：JP2006213886
申请日：2006-08-04
申请人： Sharp Corp , シャープ株式会社
发明人： NAKAO TOMOAKI , MINAMIGUCHI TETSUYA , NAKAHARA MICHIHIRO , NAKAI TAKAHIRO , FUJINO HIROAKI
IPC分类号： H03F3/34
CPC分类号： H03F3/45977 , H03F3/45183 , H03F3/45475 , H03F3/45753 , H03F2203/45101 , H03F2203/45136 , H03F2203/45212 , H03F2203/45534
摘要： PROBLEM TO BE SOLVED: To accomplish an offset correction apparatus which is capable of performing offset correction, without requiring frequent refresh, while absorbing offset variation in small circuit scale.
SOLUTION: In an operational amplifier circuit 1, a switch element S1 is closed and a switch element S2 is opened. A latch circuit DL latches an output voltage of an operational amplifier 1a and performs Q outputting corresponding thereto, and a control circuit 2a inputs a signal s1 for offset correction to an offset control input terminal OR of the operational amplifier 1a. An output voltage thus offset-corrected is further latched by the latch circuit DL and the signal s1 for offset correction is to be precisely controlled for correcting remaining offset. Thus, the offset of the output voltage of the operational amplifier 1a is quantized while being weighted in accordance with the number of times of the latched output voltage at that time, and is stored within the control circuit 2a as a binary logic signal.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：为了实现能够进行偏移校正的偏移校正装置，而不需要频繁刷新，同时吸收小电路规模的偏移变化。解决方案：在运算放大器电路1中，开关元件S1闭合，开关元件S2断开。锁存电路DL锁存运算放大器1a的输出电压，并进行与其对应的Q输出，控制电路2a向运算放大器1a的偏移控制输入端OR输入偏移校正用信号s1。由锁存电路DL进一步锁存由此偏移校正的输出电压，并精确地控制用于偏移校正的信号s1以校正剩余偏移。因此，运算放大器1a的输出电压的偏移量根据当时锁存的输出电压的次数进行加权而量化，并作为二进制逻辑信号存储在控制电路2a内。版权所有（C）2008，JPO＆INPIT

3. 发明专利

JP2007116493A Offset canceller 审中-公开
标题翻译： OFFSET CANCELLER
公开(公告)号：JP2007116493A
公开(公告)日：2007-05-10
申请号：JP2005306660
申请日：2005-10-21
申请人： Oki Electric Ind Co Ltd , 沖電気工業株式会社
发明人： HIGUCHI KOUJI
IPC分类号： H03F3/34 , G09G3/20 , G09G3/36
CPC分类号： H03F3/45183 , H03F3/45475 , H03F3/45744 , H03F3/45753 , H03F3/45968 , H03F3/45977 , H03F2203/45616 , H03F2203/45728
摘要： PROBLEM TO BE SOLVED: To provide an offset canceller capable of outputting a signal during an operation for offset compensation and compensating an offset caused by a capacitive element and a resistive element externally connected to an operational amplifier.
SOLUTION: A drive circuit 10 includes a plurality of output circuits (#1 to #n+1) 16, which respectively provide outputs of drive signals from one-side outputs 14 to a plurality of output terminals (#1 to #n) 12 and provide outputs of the drive signals from the other-side outputs 18. The outputs 14 and the outputs 18 are connected to a plurality of output selection circuits (#1 to #n) 20, which select either of signals outputted from the two output circuits 14 adjacent to each other and provide outputs of the selected signals to the output terminals 12. The other outputs 18 of the output circuits (#1 to #n+1) 16 are connected to a discrimination circuit 30, which compares the signal 18 with a reference voltage, outputs a discrimination signal to an output 40 in response to a result of the comparison in a prescribed timing, and the output circuits 16 carry out offset canceling in response to the output 40.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供能够在用于偏移补偿的操作期间输出信号并补偿由外部连接到运算放大器的电容元件和电阻元件引起的偏移的偏移消除器。解决方案：驱动电路10包括多个输出电路（＃1至＃n + 1）16，它们分别提供从一侧输出端14到多个输出端子（＃1至＃ n）12，并且提供来自另一侧输出18的驱动信号的输出。输出14和输出18连接到多个输出选择电路（＃1至#n）20，其选择从两个输出电路14彼此相邻并且将所选择的信号的输出提供给输出端子12.输出电路（＃1至＃n + 1）16的其他输出端18连接到鉴别电路30，鉴别电路30 具有参考电压的信号18响应于规定定时的比较结果，将输出40输出到输出端40，输出电路16响应于输出40进行偏移消除。版权所有：（C）2007，JPO＆INPIT

4. 发明专利

JP2005536925A Operational amplifier 审中-公开
公开(公告)号：JP2005536925A
公开(公告)日：2005-12-02
申请号：JP2004528764
申请日：2003-08-12
申请人：コーニンクレッカフィリップスエレクトロニクスエヌヴィKoninklijke Philips Electronics N.V.
发明人：ゼンウァ、ワン
IPC分类号： H03F3/34 , H03F3/45
CPC分类号： H03F3/45771 , H03F3/45753
摘要：本発明は、演算増幅器に関する。演算増幅器の出力オフセット電圧のより一層の低下を可能にするために、演算増幅器は、演算増幅器の内部ノードＡにさらなる電流Ｉｃを導入して演算増幅器の出力オフセット電圧を低下させる手段Ｓ、Ｔを備える。本発明はまた、演算増幅器の出力オフセット電圧を低下させる方法に関する。この方法は、演算増幅器の内部ノードＡにさらなる電流Ｉｃを導入することを含む。

5. 发明专利

JP4861791B2 Operational amplifier and display device 有权
公开(公告)号：JP4861791B2
公开(公告)日：2012-01-25
申请号：JP2006293182
申请日：2006-10-27
申请人：ルネサスエレクトロニクス株式会社
发明人：淳嶋谷 , 浩一西村
IPC分类号： G09G3/36 , G02F1/133 , G09G3/20 , H03F3/45
CPC分类号： H03F3/4521 , H03F3/3022 , H03F3/45183 , H03F3/45753 , H03F2203/45212 , H03F2203/45534 , H03F2203/45726

6. 发明专利

JP4412027B2 Amplifier circuit and display device 有权
公开(公告)号：JP4412027B2
公开(公告)日：2010-02-10
申请号：JP2004096525
申请日：2004-03-29
申请人：日本電気株式会社
发明人：弘土
IPC分类号： H03F3/45 , G02F1/133 , G09G3/36 , H03F3/34
CPC分类号： H03F3/45753 , H03F3/45183 , H03F3/45744

7. 发明专利

JP2007228388A Offset cancel amplifier, display unit using the same, and method for controlling the same 有权
标题翻译：偏移取消放大器，使用其的显示单元及其控制方法
公开(公告)号：JP2007228388A
公开(公告)日：2007-09-06
申请号：JP2006048649
申请日：2006-02-24
申请人： Nec Corp , 日本電気株式会社
发明人： IRIGUCHI MASAO
IPC分类号： H03F3/34 , G09G3/20 , G09G3/36 , H03F1/30 , H03F3/45
CPC分类号： H03F3/45183 , H03F3/45753 , H03F3/45762 , H03F2200/453 , H03F2203/45212 , H03F2203/45588 , H03F2203/45616 , H03F2203/45652 , H03F2203/45681 , H03F2203/45726
摘要： PROBLEM TO BE SOLVED: To provide an offset cancel amplifier which suppresses input capacitance and suppresses element dispersion or the influence of noise with high accuracy. SOLUTION: The offset cancel amplifier comprises a differential pair 102, 101, loading circuits M1, M2 common to the two differential pairs, an amplification step 103, and capacitors C1, C2. The capacitor C1 is connected to the gate of the transistor M5 of the differential pair 102, and during a first period of a data output period, an output voltage Vout and a reference voltage Vref are inputted into the gate of the differential pair 102. In a state where the capacitor C2 is shut off from the gate of a transistor M6, the output voltage Vout is stored in the capacitors C1, C2; and input voltage Vin is commonly inputted to the gate of the differential pair 101. During a second period, the capacitor C2 is shut off from the capacitor C1 and is connected to the gate of the transistor M6 of the differential pair 102; and the output voltage Vout and the reference voltage Vref are stored in the capacitors C1, C2. During a third period, the gate of the differential pair 102 is shut off from the supply of the output voltage Vout, the reference voltage Vref and inputs a stored voltage of the capacitors C1, C2, and the output voltage Vout and the input voltage Vin are inputted into the gate of the differential pair 101. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供抑制输入电容并抑制元件色散或高精度噪声影响的偏移消除放大器。解决方案：偏移消除放大器包括差分对102,101，两个差分对共用的加载电路M1，M2，放大步骤103和电容器C1，C2。电容器C1连接到差分对102的晶体管M5的栅极，并且在数据输出周期的第一周期期间，将输出电压Vout和参考电压Vref输入到差分对102的栅极。在电容器C2从晶体管M6的栅极截止的状态，输出电压Vout存储在电容器C1，C2中; 并且输入电压Vin通常输入到差分对101的栅极。在第二周期期间，电容器C2从电容器C1截止并连接到差分对102的晶体管M6的栅极; 并且输出电压Vout和参考电压Vref存储在电容器C1，C2中。在第三时段期间，差分对102的栅极与输出电压Vout（参考电压Vref）的供给切断，并输入电容器C1，C2的存储电压和输出电压Vout以及输入电压Vin 被输入到差分对101的门。版权所有（C）2007，JPO＆INPIT

8. 发明专利

JP2006253910A Operational amplifier and method for cancelling offset voltage of operational amplifier 有权
标题翻译：操作放大器和取消操作放大器偏置电压的方法
公开(公告)号：JP2006253910A
公开(公告)日：2006-09-21
申请号：JP2005065686
申请日：2005-03-09
申请人： Fujitsu Ltd , 富士通株式会社
发明人： NISHIMORI EIJI
IPC分类号： H03F3/34 , H03F3/45
CPC分类号： H03F3/45753 , H03F3/45183 , H03F3/45977 , H03F2203/45548
摘要： PROBLEM TO BE SOLVED: To provide an operational amplifier cancelling an offset voltage and capable of arbitrarily setting a gain.
SOLUTION: Gates for a pair of transistors Q1 and Q2 constituting a first differential input section 31 are short-circuited by a first switch SW1, and the offset voltage e1 by an output voltage Vo outputted from the operational amplifier 21 is held to a capacitor C1 connected to the gates for a pair of the transistors Q6 and Q7 constituting a second differential input section 41. A potential difference by the held offset voltage el is generated in the gates for a pair of the transistors Q6 and Q7 constituting the second differential input section 41.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种运算放大器消除偏移电压并能够任意设定增益。解决方案：构成第一差分输入部分31的一对晶体管Q1和Q2的栅极由第一开关SW1短路，并且将从运算放大器21输出的输出电压Vo的偏移电压e1保持为连接到构成第二差分输入部分41的一对晶体管Q6和Q7的栅极的电容器C1。在构成第二差分输入部分41的一对晶体管Q6和Q7的栅极中产生由保持的偏移电压el产生的电位差差分输入部分41.版权所有（C）2006，JPO＆NCIPI

9. 发明专利

JP2005182494A Current amplifier circuit and liquid crystal display provided with it 审中-公开
标题翻译：电流放大器电路和液晶显示器
公开(公告)号：JP2005182494A
公开(公告)日：2005-07-07
申请号：JP2003422998
申请日：2003-12-19
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： HIDA YOICHI
IPC分类号： G09G3/36 , G05F1/56 , G09G3/20 , H03F3/45 , H03F3/72
CPC分类号： G09G3/3688 , G09G3/2011 , G09G2310/027 , G09G2310/0291 , G09G2320/0233 , H03F3/45753 , H03F2203/45506 , H03F2203/45728
摘要： PROBLEM TO BE SOLVED: To provide a current amplifier circuit which is stable against oscillation operation and consumes low power, and to provide a liquid crystal display provided with the circuit for driving a data line or a gradation voltage. SOLUTION: A differential amplifier circuit 11, according to a voltage difference between an input node Ni and an output node No, generates a voltage difference between a node N6 and a node N7. An output circuit 20 generates, on the output node No, a voltage and a current according to the voltage of a control node Ng. A switch element S1 is provided between the node N6 and the control node Ng. The differential amplifier circuit 11 and an output circuit 20, if a feedback loop is formed as the switch element S1 is turned on, operate so that the voltage of the output node No will match the voltage of the input node Ni. The switch element S1 is turned off after the voltage of the output node No becomes equivalent to the voltage of the input node Ni due to the formation of the feedback loop. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种对振荡操作稳定并消耗低功率的电流放大器电路，并且提供一种设置有用于驱动数据线或灰度电压的电路的液晶显示器。解决方案：根据输入节点Ni和输出节点No之间的电压差，差分放大器电路11产生节点N6和节点N7之间的电压差。输出电路20根据控制节点Ng的电压在输出节点No上产生电压和电流。开关元件S1设置在节点N6和控制节点Ng之间。如果在开关元件S1导通时形成反馈回路，则差分放大电路11和输出电路20工作，使得输出节点No的电压与输入节点Ni的电压相匹配。在输出节点No的电压由于形成反馈回路而变得等于输入节点Ni的电压之后，开关元件S1截止。版权所有（C）2005，JPO＆NCIPI

10. 发明专利

JP2004519969A High duty cycle offset compensation of the operational amplifier 有权
公开(公告)号：JP2004519969A
公开(公告)日：2004-07-02
申请号：JP2002581683
申请日：2002-04-08
申请人：コーニンクレッカフィリップスエレクトロニクスエヌヴィKoninklijke Philips Electronics N.V.
发明人：アンドレアミラネシ
IPC分类号： G09G3/36 , G09G3/20 , H03F3/34 , H03F3/45
CPC分类号： H03F3/45977 , H03F3/45183 , H03F3/45475 , H03F3/45753
摘要： A circuit arrangement comprising an input amplifier stage (31) with two inputs (36, 37) and an output (34) being connectable to an input (35) of an output amplifier stage (32). The circuit furthermore comprises a comparator (33) with a first input (41), a second input (42) and a comparator output (44), a feedback capacitor (43) connected to an offset tuning input (45) of the input amplifier stage (31), and a plurality of switches (S1, S2) that are controllable by switching signals (V1, V2) to allow the circuit to be switched from a first phase to a second phase. During the first phase (1), the output (34) and the input (35) are separated by a first one of the switches (S2) and the two inputs (36, 37) are connected via a second one of the switches (S1). The first input (41) of the comparator (33) is connected to the output (34) of the input amplifier stage (31) and the second input (42) of the comparator (33) is connected to the input (35) of the output amplifier stage (32) such that via the comparator output (44) a charge on the feedback capacitor (43), and hence the voltage at the offset tuning input (45) is altered and an offset of the input amplifier stage (31) is corrected.

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