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    • 3. 发明专利
    • スイッチトキャパシタ回路及びその駆動方法
    • 它开关电容电路和驱动方法
    • JPWO2014083736A1
    • 2017-01-05
    • JP2014549768
    • 2013-09-27
    • パナソニックIpマネジメント株式会社
    • 徳永 祐介祐介 徳永
    • H03F3/34
    • G11C27/026H03F3/005H03F3/45475H03F2203/45514H03F2203/45551H03F2203/45634H03H19/004H03M1/00H03M1/12H03M1/1255H03M1/804
    • 本発明のスイッチトキャパシタ回路(300)は、第1端子と第2端子とを有し第1端子に入力電圧が印加されるように配置された容量(311)と、第3端子と第4端子とを有し第3端子が第2端子と接続された容量(321)と、第2入力端子と第2出力端子とを有し第2入力端子が第4端子と接続された反転増幅器(332)と、第5端子と第6端子とを有し第6端子が出力端子(208)に接続された容量(351)と、第7端子と第8端子とを有し第2出力端子と第5端子との電気経路上に配置された容量(341)と、第9端子と第10端子とを有し第9端子が第2端子に接続されるよう、かつ、第10端子が第6端子に接続されるように配置された容量(361)とを具備する。
    • 本发明(300)的开关电容电路包括第一端子和电容器的输入电压到所述第一端子和第二端子被配置为被施加(311),第三端子和第四端子 制备具有上述第3端子连接到所述第二端子(321),第二输入端和反相放大器第二输入端与连接到第四端的第二输出端子(电容332 ),连接(351)到所述第五端子和第六端子的电容是输出端子和第六端子(208),以及第七端子的第二输出端子和第八端子的第一 被布置成5的电通路上的端子(341)的容量,作为第九端子和第九端子和耦合到所述第二端子的第十端子和第十端子是第六终端 包括所布置的电容器被连接(361)到。
    • 9. 发明专利
    • Semiconductor integrated circuit
    • 半导体集成电路
    • JP2008228029A
    • 2008-09-25
    • JP2007064834
    • 2007-03-14
    • Toshiba Corp株式会社東芝
    • AGAWA KENICHI
    • H03F1/34
    • H03G5/16H03F3/45475H03F2200/153H03F2200/393H03F2203/45514H03G5/005
    • PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit which judges stability from amplitude characteristics and makes a value of capacitance for phase compensation most optimal, thereby allowing the cost of the semiconductor integrated circuit to be reduced.
      SOLUTION: The semiconductor integrated circuit is equipped with: an amplifier circuit which includes phase compensation capacitance C and has a feedback loop; and a stability judgment and adjustment circuit 2 which measures the amplitude of an output voltage from the amplifier circuit in a predetermined frequency and adjusts a capacitance value of the phase compensation capacitance based on a ratio of the amplitude.
      COPYRIGHT: (C)2008,JPO&INPIT
    • 要解决的问题:为了提供从幅度特性判断稳定性并使相位补偿的电容值最优化的半导体集成电路,从而可以降低半导体集成电路的成本。

      解决方案:半导体集成电路配备有:包括相位补偿电容C并具有反馈回路的放大器电路; 以及稳定性判断和调整电路2,其以预定频率测量来自放大器电路的输出电压的幅度,并且基于振幅的比例来调整相位补偿电容的电容值。 版权所有(C)2008,JPO&INPIT

    • 10. 发明专利
    • Analog signal processing circuit for ccd camera
    • CCD摄像机模拟信号处理电路
    • JP2007124479A
    • 2007-05-17
    • JP2005316237
    • 2005-10-31
    • Matsushita Electric Ind Co Ltd松下電器産業株式会社
    • YAMAGUCHI KOJI
    • H04N5/225H04N101/00
    • H03F3/005G11C27/026H03F3/45475H03F2203/45514H03F2203/45551H03F2203/45616H03F2203/45726
    • PROBLEM TO BE SOLVED: To prevent a malfunction during a preblanking (PB) term and just after the PB term without deteriorating a signal amplitude or without increasing a noise quantity during an ordinary term other than the PB term.
      SOLUTION: Switch circuits SW51, SW52 of a switch circuit unit 5 and a bias circuit Vref6 of a bias circuit unit 6 are added to a switched capacitor amplifier circuit 1. Switch circuits SW102, SW103 are controlled with a pulse waveform D, fixed in an OFF state during a preblanking (PB) term, and a sampling operation is performed while switching ON/OFF during an ordinary term other than the PB term. Furthermore, the switch circuits SW51, SW52 are controlled with a pulse waveform E, a sampling operation is performed while switching ON/OFF during the PB term, and fixed in an OFF state during the ordinary term other than the PB term. The switch circuits SW102, SW103, SW51, SW52 are controlled with the pulse waveforms D, E and a malfunction during the PB term and just after the PB term, caused by the influence of an unexpected excessive input signal during the PB term is prevented.
      COPYRIGHT: (C)2007,JPO&INPIT
    • 要解决的问题:为了防止在PB期间和刚刚在PB项之后的故障,而不降低信号幅度或在除PB项之外的普通术语期间不增加噪声量。 解决方案:将开关电路单元5的开关电路SW51,SW52和偏置电路单元6的偏置电路Vref6相加到开关电容放大器电路1.开关电路SW102,SW103由脉冲波形D控制, 在预吹(PB)项期间固定为OFF状态,并且在除PB项之外的普通项期间切换ON / OFF时执行采样操作。 此外,开关电路SW51,SW52以脉冲波形E进行控制,在PB期间切换ON / OFF时进行取样动作,在除PB期限以外的通常期间固定为OFF状态。 开关电路SW102,SW103,SW51,SW52由脉冲波形D,E控制,并且在PB项期间以及刚刚在PB项之后的故障由PB期间期间意外的过大输入信号的影响而被防止。 版权所有(C)2007,JPO&INPIT