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    • 5. 发明专利
    • Semiconductor optical device and manufacturing method therefor
    • 半导体光学器件及其制造方法
    • JP2008218849A
    • 2008-09-18
    • JP2007056538
    • 2007-03-07
    • Opnext Japan Inc日本オプネクスト株式会社
    • MAKINO SHIGEKISHINODA KAZUNORIKITATANI TAKESHI
    • H01S5/026G02B6/122G02F1/017
    • H01S5/0265B82Y20/00H01L2224/48091H01S5/02276H01S5/02284H01S5/026H01S5/0425H01S5/06256H01S5/101H01S5/12H01S5/227H01S5/34306H01L2924/00014
    • PROBLEM TO BE SOLVED: To solve the problems where the increase in the parasitic capacitance and the trade-off of pileup are the problems in a low reflection window structure in a conventional electroabsorption optical modulating element, because the capacitance density of a p-n junction in the window structure is high, as compared with a pin junction as an optical absorption region, also field application to the optical absorption region becomes insufficient, when an electrode structure is moved away from the bonding part of the optical absorption region and the window structure and the discharge of photocarriers generated in the optical absorption region becomes difficult. SOLUTION: Between the optical absorption region and the low light reflecting window structure, an undoped waveguide structure comprising such a composition wavelength and film thickness structure that the composition wavelength of each multilayer, constituting the waveguide structure is sufficiently shorter than signal light and the average refractive index is at the same level as the optical absorption region, is provided. When the electrode structure is formed so as to cross the junction interface of the optical absorption region and the undoped waveguide, and not to be over the junction interface of the undoped waveguide and the window structure, both of the increase of the parasitic capacitance due to the pn junction of the window structure and the pileup are suppressed simultaneously. COPYRIGHT: (C)2008,JPO&INPIT
    • 解决的问题为了解决传统的电吸收光调制元件中的寄生电容的增加和堆积的权衡是低反射窗结构中的问题的问题,因为pn的电容密度 与窗口结构相比较,与作为光吸收区域的针结相比,当光吸收区域的场应用也变得不足时,当电极结构远离光吸收区域和窗口的接合部分移动时 在光吸收区域中产生的光载流子的结构和放电变得困难。 解决方案:在光吸收区域和低反射窗口结构之间,构成波导结构的组成波长和组成波长的组合波长和膜厚结构的未掺杂的波导结构足以比信号光短, 平均折射率与光吸收区域相同。 当电极结构形成为穿过光吸收区域和未掺杂波导的结界面,并且不在未掺杂波导和窗结构的结界面之上时,寄生电容的增加由于 窗结构和堆积的pn结被同时抑制。 版权所有(C)2008,JPO&INPIT
    • 7. 发明专利
    • Semiconductor laser element
    • 半导体激光元件
    • JP2010141232A
    • 2010-06-24
    • JP2008318115
    • 2008-12-15
    • Opnext Japan Inc日本オプネクスト株式会社
    • FUKAMACHI TOSHIHIKOKITATANI TAKESHISHIODA TAKASHI
    • H01S5/12
    • PROBLEM TO BE SOLVED: To improve reliability of a refractive index coupling type DFB laser element having a diffraction grating formed of InGaAsP having a higher refractive index than InP formed in an InP layer.
      SOLUTION: A lattice constant of InGaAsP in a bulk state constituting a diffraction grating layer of the refractive index coupling type DFB laser element is made shorter than that of InP. Thus, light emission by a natural discharge process of a carrier accumulated in the diffraction grating layer is easily suppressed. Carrier loss is reduced and a power consumption increase by a rise of electric resistance due to notch formation is reduced.
      COPYRIGHT: (C)2010,JPO&INPIT
    • 要解决的问题:为了提高折射率耦合型DFB激光元件的可靠性,其具有由具有比在InP层中形成的InP更高的折射率的InGaAsP形成的衍射光栅。 解决方案:构成折射率耦合型DFB激光元件的衍射光栅层的体状的InGaAsP的晶格常数比InP短。 因此,容易抑制在衍射光栅层中积聚的载体的自然放电处理的发光。 载流子损失减少,并且由于陷波形成导致的电阻上升而导致的功率消耗增加。 版权所有(C)2010,JPO&INPIT
    • 9. 发明专利
    • Method of manufacturing integrated optical device
    • 制造集成光学器件的方法
    • JP2010165759A
    • 2010-07-29
    • JP2009005299
    • 2009-01-14
    • Opnext Japan Inc日本オプネクスト株式会社
    • SHINODA KAZUNORIKITATANI TAKESHIMAKINO SHIGEKISHIODA TAKASHI
    • H01S5/026H01S5/125H01S5/227H01S5/343
    • PROBLEM TO BE SOLVED: To provide a method of manufacturing an integrated optical element having three or more optical element portions integrated by butt joint technique, in which the integrated optical device having small optical loss and high optical coupling efficiency is achieved by suppressing film thickness unevenness nearby a butt joint connection portion and a crystal defect of a multiple quantum well structure nearby the butt joint connection portion. SOLUTION: In the method of manufacturing the integrated optical element having the three or more optical element portions integrated in a manner of connecting them one after another by using the butt joint technique twice or more, a dielectric mask pattern used for the second butt joint process is shaped such that a tip portion is made thinner. COPYRIGHT: (C)2010,JPO&INPIT
    • 解决方案:提供一种具有通过对接技术集成的三个或更多个光学元件部分的集成光学元件的制造方法,其中具有小的光学损耗和高的光耦合效率的集成光学器件通过抑制 对接连接部附近的膜厚不均匀性和对接连接部附近的多量子阱结构的晶体缺陷。 解决方案:在制造具有三个或更多个光学元件部分的集成光学元件的方法中,通过使用两次或更多次的对接技术将它们一个接一个地连接起来,用于第二个的电介质掩模图案 对接工序被成形为使得末端部分变薄。 版权所有(C)2010,JPO&INPIT