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1. 发明专利

JP2007053391A Method of manufacturing semiconductor integrated circuit device 审中-公开
标题翻译：制造半导体集成电路器件的方法
公开(公告)号：JP2007053391A
公开(公告)日：2007-03-01
申请号：JP2006263706
申请日：2006-09-28
申请人： Hitachi High-Technologies Corp , Hitachi Ltd , 株式会社日立ハイテクノロジーズ , 株式会社日立製作所
发明人： MORI MASASHI , TSUTSUMI TAKASHI , IZAWA MASARU , ITABASHI NAOSHI
IPC分类号： H01L29/78 , H01L21/28 , H01L21/3065
摘要： PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor integrated circuit device having a fine pattern formation without causing increase in the chip cost or throughput degradation.
SOLUTION: A method of manufacturing a semiconductor integrated circuit device comprises a step of patterning a gate (an electrode or wiring). After a hard mask on a gate is patterned with a resist mask, the resist mask is removed. Then, by using the hard mask, a side surface of a gate material is thinned under a dry etching condition leaving no reaction product on the side surface of the gate material, thereby forming an I-type gate.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：解决的问题：提供一种具有精细图案形成的半导体集成电路器件的制造方法，而不会导致芯片成本或产量降低的增加。解决方案：制造半导体集成电路器件的方法包括对栅极（电极或布线）进行构图的步骤。在栅极上的硬掩模用抗蚀剂掩模图案化之后，去除抗蚀剂掩模。然后，通过使用硬掩模，栅极材料的侧表面在干蚀刻条件下变薄，在栅极材料的侧表面上不产生反应产物，从而形成I型栅极。版权所有（C）2007，JPO＆INPIT

2. 发明专利

JP2005045290A Method of manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：JP2005045290A
公开(公告)日：2005-02-17
申请号：JP2004315424
申请日：2004-10-29
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： MORI MASASHI , TAJI SHINICHI , YOKOGAWA KATANOBU
IPC分类号： H01L21/3065
摘要： PROBLEM TO BE SOLVED: To generate active species necessary for etching and to etch a silicon oxide film while maintaining a former selectivity, since it is anticipated that PFC (perfluorocarbon) and HFC (hydrofluorocarbon) as an etching gas of the silicon oxide film or a silicon nitride film will be limited to use or will become unavailable in the future due to environmental regulations. SOLUTION: In a region where a plasma treatment is performed by introducing a gas containing a fluorine used as a constituting element as a material gas for etching, a plasma of a gas containing the fluorine is caused to react on a carbon 112 under a solid state to generate molecular chemical species such as CF 4 , CF 2 , CF 3 , C 2 F 4 , or the like, and the etching is performed by these chemical species. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：为了产生腐蚀所必需的活性物质并且保持前一选择性而蚀刻氧化硅膜，因为预期作为氧化硅的蚀刻气体的PFC（全氟化碳）和HFC（氢氟烃）由于环境规定，膜或氮化硅膜在将来将被限制使用或将不可用。解决方案：在通过引入包含用作构成元素的氟的气体作为蚀刻材料进行等离子体处理的区域中，使含有氟的气体的等离子体在碳112下反应产生分子化学物质如CF 4，CF 2 ，CF 3 ，C 2 SB等等，并且通过这些化学物质进行蚀刻。版权所有（C）2005，JPO＆NCIPI

3. 发明专利

JP2008034877A Manufacturing method and manufacturing system of semiconductor device 审中-公开
标题翻译：半导体器件的制造方法和制造系统
公开(公告)号：JP2008034877A
公开(公告)日：2008-02-14
申请号：JP2007264377
申请日：2007-10-10
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： IZAWA MASARU , MORI MASASHI , NEGISHI NOBUYUKI , TAJI SHINICHI
IPC分类号： H01L21/02 , H01L21/205 , H01L21/3065
摘要： PROBLEM TO BE SOLVED: To provide a manufacturing method and a manufacturing system of semiconductor device, which actualize cost reduction of semiconductor device manufacturing and improvement of operating rate of a manufacturing apparatus by automatic generation of a process treatment condition and automation of maintenance. SOLUTION: A computer 113 in a semiconductor manufacturing apparatus automatically generates a process condition on the basis of database and a process model by input of a wafer treatment history of a film thickness, a film quality, and the like. Further, the computer 113 in the semiconductor manufacturing apparatus obtains the wafer treatment history and a measurement result from a computer 107 on a manufacturing line, to automate the input of the treatment history. Furthermore, the computer 113 in the apparatus and a computer 112 of a manufacturing apparatus maker are connected to a network, to automate offering of process conditions and scheduling of the maintenance. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：解决的问题：提供半导体器件的制造方法和制造系统，其通过自动生成处理条件和维护自动化来实现半导体器件制造的成本降低和制造装置的工作速率的提高。解决方案：半导体制造装置中的计算机113通过输入薄膜厚度，薄膜质量等的晶片处理历史，基于数据库和处理模型自动生成处理条件。此外，半导体制造装置中的计算机113从制造线上的计算机107获得晶片处理历史和测量结果，以使输入治疗历史自动化。此外，装置中的计算机113和制造装置制造商的计算机112连接到网络，以自动提供处理条件和维护的调度。版权所有（C）2008，JPO＆INPIT

4. 发明专利

JP2006279074A Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：JP2006279074A
公开(公告)日：2006-10-12
申请号：JP2006185287
申请日：2006-07-05
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： KOTO NAOYUKI , MORI MASASHI , YOKOGAWA KATANOBU , ITABASHI NAOSHI , TSUJIMOTO KAZUNORI , TAJI SHINICHI
IPC分类号： H01L21/3065
摘要： PROBLEM TO BE SOLVED: To attain a processing of high anisotropy and low gate breakdown rate in dry etching.
SOLUTION: Plasma is generated by ECR resonance of electromagnetic waves and a magnetic field generated by supplying UHF electric power to a micro-strip line 4 installed on a surface on an atmosphere side of a dielectric 2 separating the vacuum inside and the outside, and a conductive film is dry-etched with the plasma. Thereby, since the plasma of uniform and low ion current density of 1 mA/cm
2 or less is realizable even in low pressure of 0.5 Pa or less in which anisotropy processing is possible, no gate breakdown and uniform etching becomes possible.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：在干蚀刻中获得高各向异性和低门击穿速率的处理。解决方案：通过电磁波的ECR共振产生的等离子体和通过将UHF电力供应到安装在绝缘体2的外部的表面上的微带线4产生的磁场，电介质2的内部和外部的真空分离，并用等离子体干蚀刻导电膜。因此，即使在0.5Pa以下的低压下，即使可以进行各向异性处理，也能够实现1mA / cm 2以下的均匀且低离子电流密度等离子体的等离子体，不会产生栅极击穿和均匀蚀刻成为可能。版权所有（C）2007，JPO＆INPIT

5. 发明专利

JP2004080062A Dry etching system 有权
公开(公告)号：JP2004080062A
公开(公告)日：2004-03-11
申请号：JP2003401714
申请日：2003-12-01
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： KOTO NAOYUKI , MORI MASASHI , YOKOGAWA KATANOBU , ITABASHI NAOSHI , TSUJIMOTO KAZUNORI , TAJI SHINICHI
IPC分类号： C23F4/00 , H01L21/3065
摘要： PROBLEM TO BE SOLVED: To achieve high anisotrophy and machining with a low gate destruction rate in dry etching.
SOLUTION: The dry etching of a conductive film is performed by plasma generated through the ECR resonance of an electromagnetic wave and a magnetic field which are generated by supplying UHF power to a micro strip line 4 installed on the face on the atmospheric side of a dielectric 2 to separate the inside and outside of a vacuum.
COPYRIGHT: (C)2004,JPO

6. 发明专利

JP2000077388A Method and system for dry etching 审中-公开
标题翻译：干蚀刻的方法和系统
公开(公告)号：JP2000077388A
公开(公告)日：2000-03-14
申请号：JP24353798
申请日：1998-08-28
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： MORI MASASHI , KOTO NAOYUKI , TSUJIMOTO KAZUNORI , TAJI SHINICHI
IPC分类号： H05H1/46 , C23F4/00 , H01L21/302 , H01L21/3065
摘要： PROBLEM TO BE SOLVED: To reduce subtrenches at the time of fine patterning by applying a sine wave bias subjected to amplitude modulation by a saw-tooth wave to a sample setting electrode. SOLUTION: At the time of etching a sample 113 set on an electrode 112 applied with an AC bias voltage by touching the surface of the sample 113 to a plasm generated above the sample 113, the AC bias voltage is subjected to amplitude modulation by a saw-tooth wave by an amplitude modulation bias generating mechanism 116 comprising a sine wave oscillator 110 and a saw-tooth wave generator 109. For example, a sine wave (AC bias) of about 800 kHz is subjected to amplitude modulation by a triangular wave or a saw- tooth wave. Frequency of the sine wave is about 2 MHz or below, preferably 2-100 kHz, more preferably 2-400 kHz and one cycle of the waveform used for amplitude modulation is preferably set t about 10 ms or less.
摘要翻译：要解决的问题：通过将通过锯齿波进行振幅调制的正弦波偏压施加到样品设定电极，来减少精细图案化时的凹陷。解决方案：在通过将样品113的表面接触到样品113上产生的等离子体来蚀刻设置在施加有AC偏置电压的电极112上的样品113时，AC偏置电压通过锯由包括正弦波振荡器110和锯齿波发生器109的幅度调制偏置产生机构116的波形波。例如，约800kHz的正弦波（AC偏压）通过三角波或锯齿波。正弦波的频率为约2MHz或更低，优选为2-100kHz，更优选为2-400kHz，并且用于振幅调制的波形的一个周期优选设置为约10ms或更小。

7. 发明专利

JP2006245600A Plasma processing device 有权
标题翻译：等离子体加工装置
公开(公告)号：JP2006245600A
公开(公告)日：2006-09-14
申请号：JP2006110719
申请日：2006-04-13
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： YOKOGAWA KATANOBU , ITABASHI NAOSHI , TAJI SHINICHI , MORI MASASHI , SUZUKI KEIZO , ONO TETSUO
IPC分类号： H01L21/3065
摘要： PROBLEM TO BE SOLVED: To achieve high speed, high selecting ratio, high aspect processing and the stable etching characteristics for a long period in dry etching.
SOLUTION: In this plasma processing device, plasma is formed with the electromagnetic wave by an UHF-band power supply 104 by using electron cyclotron resonance phenomenon. Furthermore, the electromagnetic wave is emitted from a circular conductor plate 107 arranged at the position facing a sample to be processed 110. Furthermore, the material quality of the circular conductor plate 107 is made to be silicon or graphite. By forming the plasma using the UHF-band power supply 104, low-dissociation plasma can be formed even at the low gas pressure and high density, and the controllability of the reaction is improved. Furthermore, by the reaction with the plasma on the circular conductor plate 107, which also has the electromagnetic-wave emitting function, the effective active species can be increased.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：在干蚀刻中实现长时间的高速，高选择率，高方位处理和稳定的蚀刻特性。解决方案：在该等离子体处理装置中，通过使用电子回旋共振现象，通过UHF频带电源104利用电磁波形成等离子体。此外，电磁波从布置在待处理样品110的位置的圆形导体板107发射。此外，圆形导体板107的材料质量被制成硅或石墨。通过使用UHF频带电源104形成等离子体，即使在低气体压力和高密度下也能够形成低离解等离子体，并且提高了反应的可控性。此外，通过与也具有电磁波发射功能的圆形导体板107上的等离子体的反应，可以增加有效的活性种类。版权所有（C）2006，JPO＆NCIPI

8. 发明专利

JP2004095174A Magnetic recording and reproducing device and circuit used in the same 审中-公开
公开(公告)号：JP2004095174A
公开(公告)日：2004-03-25
申请号：JP2003346661
申请日：2003-10-06
申请人： Hitachi Advanced Digital Inc , Hitachi Ltd , 株式会社日立アドバンストデジタル , 株式会社日立製作所
发明人： SAIKI EISAKU , SUZUMURA SHINTARO , TAKASHI TERUMI , ASHIKAWA KAZUTOSHI , HIROOKA TSUGUYOSHI , MIYAZAWA SHOICHI , MORI MASASHI
IPC分类号： H04N5/781 , G11B5/09 , G11B20/10
摘要： PROBLEM TO BE SOLVED: To realize the acceleration and low power consumption of the entire device by attaining the acceleration and low power consumption of write data transmission between an R/W amplifier and an R/W signal processing circuit. SOLUTION: In the R/W signal processing circuit 3, an interleave write data generation circuit 8 converts inputted write data into write pulse signals C1 and C2 having an interleave relation to each other by alternately distributing sequential bit signals and alternately distributing "1"-bit pulses and transmits the write pulse signals C1 and C2 to the R/W amplifier 2. In the R/W amplifier 2, a synthesis circuit 16 combines the write pulse signals C1 and C2 to restore the original write pulse signal, and a half frequency dividing circuit 12 applies frequency division to the write pulse signal. A read amplifier 11 feeds recording current to an unillustrated magnetic head in accordance with an output signal K of the half frequency dividing circuit 12. This can make the write pulse signal transmit and receive between the R/W signal processing circuit 3 and the R/W amplifier 2 in a low frequency. COPYRIGHT: (C)2004,JPO

9. 发明专利

JP2003077900A Method of manufacturing semiconductor device 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：JP2003077900A
公开(公告)日：2003-03-14
申请号：JP2001269636
申请日：2001-09-06
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： MORI MASASHI , ITABASHI NAOSHI , IZAWA MASARU
IPC分类号： H01L21/28 , H01L21/302 , H01L21/3065 , H01L21/311 , H01L21/3213 , H01L29/423 , H01L29/43 , H01L29/49 , H01L29/78
CPC分类号： H01L21/28123 , H01L21/31138 , H01L21/32136 , H01L21/32137 , H01L21/32139
摘要： PROBLEM TO BE SOLVED: To provide an etching method for inexpensively working a gate electrode in the size of not more than 50 nm, which exceeds an exposure limit, with high yield. SOLUTION: The problem for thinning a resist in line with miniaturization, the problem of a lack in thinning amount due to the pull-out of a base in gate electrode thinning and the problem on the complication of a semiconductor manufacture process when special mask structure and gate structure are used are solved by using the gate electrode thinning of high resist selectivity and thinning in mask formation. Thus, the problem of foreign matters and contamination, which are main causes for dropping yield and which occur in transfers in between devices, is solved by performing a thinning process and a dry- cleaning process in a vacuum. The water absorption of halogenated hydrogen compound remaining in dry-etching is prevented. Wetting cleaning is omitted or simplified, and the problem on the drop of throughput and the increase of cleaning solution COO due to the insertion of a cleaning process is solved. Then, a dimensional inspection process or a contamination inspection process is also performed in vacuum.
摘要翻译：要解决的问题：提供一种低成本地以超过曝光极限的50nm以下的小型化的门电极的蚀刻方法。解决方案：使小型化的抗蚀剂变薄的问题，由于栅极电极变薄引起的基极的拉出缺少稀薄量的问题以及当特殊的掩模结构和半导体制造工艺的复杂化问题时使用栅极结构通过使用栅极电极薄化，掩模形成中的高抗蚀剂选择性和稀化来解决。因此，通过在真空中进行变薄处理和干式清洗处理来解决作为成品率下降的主要原因的异物和污染物的问题。防止残留在干法蚀刻中的卤化氢化合物的吸水性。润湿清洁被省略或简化，解决了由于插入清洁过程而导致的生产量下降和清洁溶液COO增加的问题。然后，还在真空中进行尺寸检查处理或污染检查处理。

10. 发明专利

JP2000077384A Manufacture of semiconductor device and plasma processor 审中-公开
标题翻译：半导体器件和等离子体处理器的制造
公开(公告)号：JP2000077384A
公开(公告)日：2000-03-14
申请号：JP24923898
申请日：1998-09-03
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： MORI MASASHI , KOTO NAOYUKI , IZAWA MASARU , YOKOGAWA KATANOBU , TSUJIMOTO KAZUNORI , TAJI SHINICHI
IPC分类号： H01L21/302 , H01L21/3065
摘要： PROBLEM TO BE SOLVED: To make compatible high plasma density and reduction of dispersion of ion current density dispersion in the radial direction of a processing sample.
SOLUTION: This is a plasma processor which performs plasma processing to a processing sample 113 by counterposing a sample installation electrode 112 whereon the processing sample 113 is placed and an electromagnetic wave radiating electrode 104 above and below and exciting the gas supplied from the outside by high frequency power such as UHF or the like and a magnetic field applied from an electromagnet 106 thereby making it into a plasma. In this case, the plasma density on the level of 1011 cm-3 and the equal distribution of 5% or under in the dispersion of ion current density are achieved within the size of the processing sample 13 by controlling the value of the ratio of the narrowest inside diameter (the inside diameter DC of a plasma density distribution control ring 115) of a discharge container 107 to the diameter DE of the electromagnetic wave radiating electrode 104 (DC/DE). Moreover, the dynamic control of the plasma density distribution is enabled by making the inside diameter DC dynamically variable.
COPYRIGHT: (C)2000,JPO
摘要翻译：要解决的问题：使处理样品的径向方向上兼容的高等离子体密度和离子电流密度分散的离散度降低。解决方案：这是一种等离子体处理器，其通过与放置处理样品113的样品安装电极112和上下方向的电磁波辐射电极104相反地对处理样品113进行等离子体处理，并且从外部提供的气体高频率功率，例如UHF等，以及从电磁体106施加的磁场，从而使其成为等离子体。在这种情况下，通过控制处理样品13的尺寸的值，可以在处理样品13的尺寸内实现1011cm-3的等离子体密度和离子电流密度的分散中等于5％或以下的等分分布放电容器107的最小内径（等离子体密度分布控制环115的内径DC）与电磁波辐射电极104的直径DE（DC / DE）成正比。此外，通过使内径DC动态变化，能够实现等离子体密度分布的动态控制。

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