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1. 发明专利

JPH06197309A FM MODULATOR 失效
公开(公告)号：JPH06197309A
公开(公告)日：1994-07-15
申请号：JP34721592
申请日：1992-12-25
申请人： HITACHI LTD , HITACHI MICOM SYST KK
发明人： YAMAMOTO MOROHISA , NAKAGAWA TADASHI , TAKEBUCHI KENJI , KANESHIRO KATSUMI
IPC分类号： H03C3/06 , H04N5/92 , H04N5/922
摘要： PURPOSE:To adjust an FM carrier frequency and a frequency transition automatically with high accuracy and excellent reproducibility by applying feedback control to a modulation input level so that a ratio of an FM carrier period and a subcarrier period of a chrominance carrier signal is a prescribed expected value. CONSTITUTION:When an FM carrier frequency in a synchronization period is higher than an object frequency fco, a 1st pulse width TW1 being a reciprocal to the FM signal is decreased and then a charged charge quantity in a capacitor Ca is decreased more than a discharged charge quantity and a level control voltage Va extracted from a terminal of the capacitor Ca is decreased. Thus, the level control voltage Va of a level variable circuit 13 is varied in response to the FM carrier frequency for a horizontal synchronizing signal period and a level of an input radio wave Tin to an FM modulation oscillator 141 is varied by the control voltage Va, then a feedback control loop to set the FM carrier frequency for the horizontal synchronizing signal period is an object frequency fsc is formed.

2. 发明专利

JPH0548355A ELECTRONIC VOLUME 失效
公开(公告)号：JPH0548355A
公开(公告)日：1993-02-26
申请号：JP22349491
申请日：1991-08-08
申请人： HITACHI LTD , HITACHI MICOM SYST KK
发明人： TAKEBUCHI KENJI , NAKAGAWA TADASHI , KANESHIRO KATSUMI , SATO TETSUO
IPC分类号： H03G3/10 , H03G3/20 , H03G3/30
摘要： PURPOSE:To control digitally the transmission quantity of the electronic volume accurately with excellent reproducibility by using a generating source for a control reference voltage at the side of an electronic volume circuit and a conversion reference voltage at the side of a D/A converter circuit generating a control voltage in common. CONSTITUTION:A control reference voltage Vref1 at the side of the electronic volume circuit 1 and a conversion reference voltage Vref2 at the side of a D/A converter circuit 2 are used in common. Thus, the frequency in the characteristics of the circuits 1,2 is interlocked with each other. Thus, the characteristic fluctuation values are canceled together. Then the transfer quantity of the electronic volume is digitally controlled accurately with excellent reproducibility. Furthermore, The circuits 1,2 are integrated and formed on one and same semiconductor substrate 100 to allow the fluctuation values of the transfer quantity due to the characteristic fluctuation of components such as transistors(TRs) and resistors or the like to be interlocked with each other thereby suppressing the fluctuation small.

3. 发明专利

JPH11164317A VIDEO SIGNAL PROCESSING UNIT 失效
公开(公告)号：JPH11164317A
公开(公告)日：1999-06-18
申请号：JP32643897
申请日：1997-11-27
申请人： HITACHI LTD , HITACHI ULSI SYS CO LTD
发明人： MAYUZUMI SHIRO , YAMAZAKI KOICHI , HIRANO TOSHIAKI , KAMEGAKI KAZUYUKI , HOSHINO KATSUMI , NAKAGAWA TADASHI , ICHIKAWA YOSHIHISA , OKADA YOSHITAKA , MORI SHUNJI , TAKAYAMA ETSUTAKA , KITAMURA YUKINORI , KOBAYASHI YUJI , TAKEBUCHI KENJI , KURIHARA TAKASHI
IPC分类号： H04N9/793
摘要： PROBLEM TO BE SOLVED: To provide the technology that suppresses a crosstalk up to a practical level and attains one chip processing of a recording and reproducing preamplifier and a luminance signal and color signal processing circuit. SOLUTION: A recording and reproducing preamplifier 2 and a luminance signal and color signal processing circuit 3 are formed on one semiconductor chip. Then a mode changeover control circuit (logic circuit section having a changeover control circuit 4) consisting of an IIL (integrated injection logic) having been included in the circuits 2, 3 is placed between the recording and reproducing preamplifier 2 and the luminance signal and color signal processing circuit 3 to surround the IIL circuit around the recording and reproducing preamplifier 2.

4. 发明专利

JPH10243338A VIDEO RECORDING SYSTEM 失效
公开(公告)号：JPH10243338A
公开(公告)日：1998-09-11
申请号：JP4226897
申请日：1997-02-26
申请人： HITACHI LTD , HITACHI CHIYOU LSI SYS KK
发明人： TAKEBUCHI KENJI , KANESHIRO KATSUMI , KURIHARA TAKASHI , ICHIKAWA YOSHIHISA
IPC分类号： H04N5/91
摘要： PROBLEM TO BE SOLVED: To inhibit normal recording of a video signal processed by a copy prevention device and to secure normal recording of a video signal not processed by the copy prevention device excluding the malfunction of copy guard by detecting a peak level only in a specific period for superposing a copy guard signal to the video signal. SOLUTION: A peak value type AGC circuit 11 detects a peak level obtained immediately after temporarily allowing the instantaneous level of a video signal Vs2 of which period pulse top is DC clamped to a reference level VCL to fall to the reference level VCL and restricts the amplitude of the video signal Vs2 so that the peak level is less than the prescribed limit level V1 of the reference level VCL. A recording circuit 23 records the video signal of which amplitude is limited by the AGC circuit 11 in a recording medium. A timing control means allows the AGC circuit 11 to detect the peak level only to a specific period for superposing a copy guard signal to the video signal Vs2.

5. 发明专利

JPS63228805A SIGNAL PROCESSING CIRCUIT 失效
公开(公告)号：JPS63228805A
公开(公告)日：1988-09-22
申请号：JP6095587
申请日：1987-03-18
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： NAKAGAWA TADASHI , TAKEBUCHI KENJI , ARAI IZUMI
IPC分类号： H03F3/34 , H03F3/45 , H03G11/00
摘要： PURPOSE:To improve the dynamic offset by using a current control circuit which drives a current mirror circuit that working as an active load to a variable gain amplifier with a control signal and a current adversely proportional to a drive current. CONSTITUTION:For a variable gain amplifier 2, the transistors TR Q3 and Q4 perform the amplifying operations and a TR Q5 controls a current Io corresponding to a control current ICONT. An output current Iout corresponding to Io/2-i is obtained from a current mirror circuit 3. At the same time, an output current Iout' corresponding to Io/2+i is obtained from a current mirror circuit 4. The TR Q12, Q13 and Q14 form a current mirror circuit 6 and suck a current of (Iout'-Iout). As a result, the DC components of reference currents IX and IY of both circuits 3 and 4 are set at an approximately fixed current value regardless of the level of the current ICONT. Then, the dynamic offset of an output signal Vout is improved.

6. 发明专利

JPH098557A FREQUENCY DISCRIMINATING CIRCUIT 失效
公开(公告)号：JPH098557A
公开(公告)日：1997-01-10
申请号：JP14924395
申请日：1995-06-15
申请人： HITACHI LTD , HITACHI MICROCOMPUTER SYST
发明人： KANESHIRO KATSUMI , NAKAGAWA TADASHI , TAKEBUCHI KENJI , HORI HIROYUKI , YAMAMOTO MOROHISA
IPC分类号： H03D13/00
摘要： PURPOSE: To unnecessitate a phase shift circuit and to discriminate the frequency of an input signal with high accuracy without receiving effect of the dispersion in elements so much by converting the frequency of the input signal to acquire a voltage regardless of phase and making it possible to discriminate the frequency. CONSTITUTION: This circuit is provided with a first pulse generation circuit 1 forming a first pulse having the width corresponding to the frequency of an input signal V1 for each fixed period and a second pulse generation circuit 2 forming a second pulse having the width corresponding to the frequency of a reference signal V2 for each fixed period. The circuit is provided with capacity C1 to be charged or discharged by constant current for a first pulse period and to be charged or discharged by constant current for a second pulse period. Namely, the constant current charge (or discharge) of the capacity C1 is performed for the first pulse period, the constant current discharge (or charge) of the capacity C1 is performed for the second pulse period and the potential of the capacity C1 is taken out as the frequency discriminating output of an input signal V1.

7. 发明专利

JPH0846986A AMPLITUDE LIMITER CIRCUIT 失效
公开(公告)号：JPH0846986A
公开(公告)日：1996-02-16
申请号：JP19489094
申请日：1994-07-27
申请人： HITACHI LTD , HITACHI VIDEO IND INF SYST INC , HITACHI MICROCOMPUTER SYST
发明人： SASAKI MASAHIRO , YAMAMOTO MOROHISA , NAKAGAWA TADASHI , TAKEBUCHI KENJI , TANABE HISANORI , ARAI IZUMI , KURIHARA TAKASHI , KASHIYA HIDEO
IPC分类号： H04N9/793 , H03G3/30 , H04N9/68
摘要： PURPOSE:To improve response to the variation of an input signal and to reduce and stabilize flickering at a transient time in processing a picture by adding linearity to a voltage signal for gain control so as to make a gain characteristic have linearity in over wide range. CONSTITUTION:After the input control voltage 4 of a smoothed color burst signal are converted into the current signals 5 and 6 of mutually opposite phases by a voltage-to-current converting circuit, the current signals 5 and 6 are converted into voltage signals 7 and 8 by a current-to-voltage converting circuit 2. The voltage signals 7 and 8 are logarithmic-compressed by respective diodes 13 and 14 and the signal 8 is made a voltage signal added with linearity by a prescribed resistor R1. The signals 7 and 8 are provided to the respective bases of balanced differential transistors Q2, Q3 and Q1, Q4, and the current signals of mutually opposite phases are provided to respective emitters 9 and 10 to obtain output current 12 and 13 which are gain-controlled. It is possible to make the gain characteristic with respect to control voltage have linearity over a wide range adding linearity to the signal 8 by the resistor R1 like this.

8. 发明专利

JPH0818919A FM MODULATION CIRCUIT 失效
公开(公告)号：JPH0818919A
公开(公告)日：1996-01-19
申请号：JP16904894
申请日：1994-06-28
申请人： HITACHI LTD , HITACHI MICROCOMPUTER SYST , VICTOR COMPANY OF JAPAN
发明人： KANESHIRO KATSUMI , YAMAMOTO MOROHISA , NAKAGAWA TADASHI , TAKEBUCHI KENJI , HORI HIROYUKI , HORI NOBUO , TANIDA YASUYUKI
IPC分类号： H04N5/922 , H03C3/09
摘要： PURPOSE:To obtain the FM modulation circuit in which an FM carrier frequency and an FM deviation are adjusted automatically with high accuracy and excellent reproduction performance, number of external terminals and external components is reduced and no-adjustment is realized. CONSTITUTION:A voltage clamping circuit 1 and an amplitude control circuit 2 make a peak level of a synchronizing signal in a video signal match with a 1st reference potential and a pedestal level match with a 2nd reference potential, and a DC current corresponding to the carrier frequency is formed by applying a reference voltage corresponding to a clamp voltage of a voltage clamp circuit 6 to a 1st resistive element. An output signal via the voltage clamping circuit 1 and the amplitude control circuit 2 is fed to a 2nd resistive element to generate an AC current corresponding to a luminance signal and the DC current and the AC current are fed to an oscillation circuit 8 via a current variable circuit 7 as a frequency control signal. Then a capacitor is charged or discharged by a 1st constant current for a 1st pulse period for an oscillation signal corresponding to a synchronizing signal period.

9. 发明专利

JPH0241013A IMPEDANCE CIRCUIT 失效
公开(公告)号：JPH0241013A
公开(公告)日：1990-02-09
申请号：JP19236988
申请日：1988-08-01
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： NAKAGAWA TADASHI , TAKEBUCHI KENJI , ARAI IZUMI , KASHIMA HIDEO
IPC分类号： H03H11/04 , H03H11/48
摘要： PURPOSE:To obtain a capacitor with a large capacitance equivalently under a comparatively low voltage by detecting a current flowing to an impedance element and applying current feedback it to the input side. CONSTITUTION:A DC bias current corresponding to a constant current io flows to transistors(TRs) Q5, Q6 to decrease its AC impedance to be negligibly small in comparison with the impedance of a capacitor C3. Thus, the current flowing to the capacitor C3 flows to the TRs Q5, Q6 superimposingly on the said bias current. Since a current mirror circuit cancels the bias current by giving it to the output between power voltages, a current flowing actually and an AC current being a multiple of (n) flows to the output terminal OUT according to the voltage applied to the capacitor C3. Thus, the capacitance is increased equivalently.

10. 发明专利

JPH01219674A PEAK DETECTING CIRCUIT 失效
公开(公告)号：JPH01219674A
公开(公告)日：1989-09-01
申请号：JP4719488
申请日：1988-02-29
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： NAKAGAWA TADASHI , TAKEBUCHI KENJI , KASHIMA HIDEO
IPC分类号： G01R19/22 , H03D1/00
摘要： PURPOSE:To reduce a ripple component sharply by a method wherein an input signal is subjected to double wave rectification, first peak detection of this double wave is executed, the polarity of a double wave signal is inverted with an output of said peak detection used as a reference, and the double wave signal and a polarity-inverted signal are added up and subjected to second peak detection. CONSTITUTION:Receiving an input signal, a double wave rectifier circuit 1 inverts the polarity on one side and forms a double wave signal. This double wave signal is sent to a first peak detection circuit 2, and when an output signal of this first peak detection circuit 2 used as a reference, the polarity of the signal is inverted in an inverter circuit 3. This polarity-inverted current Ib is converted into an extrusion current Ib' of 1/2 by a current mirror circuit comprising PNP transistors TR Q14 and Q15, and it is added up with a double wave rectified current Ia obtained from an output TR Q9 of the double wave rectifier circuit 1. A current Ia+Ib' obtained by this addition is subjected to peak detection by a second peak detection circuit 4. By the detection by this second peak detection circuit 4, a ripple component can be reduced sharply.

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