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    • 5. 发明专利
    • Receiver circuit
    • 接收电路
    • JP2012205080A
    • 2012-10-22
    • JP2011067948
    • 2011-03-25
    • Asahi Kasei Electronics Co Ltd旭化成エレクトロニクス株式会社
    • MIYASHITA KIYOSHI
    • H04L27/06H03D1/00H04B1/10
    • PROBLEM TO BE SOLVED: To realize a receiver circuit which excels in linearity and has a spurious in it sufficiently reduced.SOLUTION: The output of an analog unit comprising a low noise amplifier 120 which amplifies an input signal from an antenna 110, a track-and-hold circuit 130 which tracks peaks of a signal from the low noise amplifier 120 and holds a tracked value, an averaging circuit 140 which averages out a signal from the track-and-hold circuit 130, and a sample-and-hold circuit 150 which samples a signal from the averaging circuit 140 and holds a sampled signal, is demodulated by a digital unit composed of a demodulator 160. This makes it possible to configure a receiver circuit without incorporating a mixer which can become the source of a spurious.
    • 要解决的问题:为了实现线性度优异并且充分减少的寄生的接收机电路。 解决方案:包括放大来自天线110的输入信号的低噪声放大器120的模拟单元的输出,跟踪和保持电路130,跟踪和保持电路130跟踪来自低噪声放大器120的信号的峰值并保持 对来自跟踪保持电路130的信号进行平均的平均电路140以及对来自平均电路140的信号进行采样并保持采样信号的采样保持电路150进行解调, 数字单元由解调器160组成。这使得可以配置接收器电路而不包括可能成为假信号源的混频器。 版权所有(C)2013,JPO&INPIT