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1. 发明公开

EP3627706A3 CIRCUIT AND METHOD OF FREQUENCY DETECTION 有权
公开(公告)号：EP3627706A3
公开(公告)日：2020-07-15
申请号：EP19194481.8
申请日：2019-08-29
申请人： Samsung Display Co., Ltd.
发明人： ABRAMZON, Valentin
IPC分类号： H03L7/089 , H03L7/091 , H03L7/093 , H03L7/107 , H03L7/113
摘要： A frequency detector circuit comprising: a transition detector configured to receive a data input and provide a first edge output based on transitions in the data input; a first circuit configured to generate a second edge output; a second circuit configured to generate a third edge output; and combinational logic configured to: output an UP output when at least two of the first edge output, the second edge output, and the third edge output have a first state; and output a DOWN output when the first edge output, the second edge output, and the third edge output all have a second state.

2. 发明授权

EP1737174B1 Transmitter circuit, receiver circuit, data transmitting method and system 有权
标题翻译：发射器电路，接待电路数据传输方法和系统
公开(公告)号：EP1737174B1
公开(公告)日：2015-05-27
申请号：EP05730375.2
申请日：2005-04-12
申请人： Thine Electronics, Inc.
发明人： OZAWA, Seiichi, Thine Electronics, Inc. , OKAMURA, Jun-ichi, Thine Electronics, Inc. , ISHIONE, Yohei, Thine Electronics, Inc. , MIURA, Satoshi, Thine Electronics, Inc.
IPC分类号： H04L25/49 , H03L7/087 , H03L7/091 , H03L7/113 , H04L7/033 , H04L25/45
CPC分类号： H04L7/033 , H03K7/10 , H03L7/087 , H03L7/091 , H03L7/113 , H04L25/45 , H04L25/4902

3. 发明公开

EP2235824A2 HIGH-FREQUENCY COUNTER 有权
标题翻译：高频计数器
公开(公告)号：EP2235824A2
公开(公告)日：2010-10-06
申请号：EP08737764.4
申请日：2008-04-08
申请人： NXP B.V.
发明人： VAN DE BEEK, Remco, C.H.
IPC分类号： H03K5/135 , H03L7/091 , H03L7/113 , H03K23/58
CPC分类号： H03K5/135 , H03K23/588 , H03L7/113 , H03L7/18 , H03L2207/50
摘要： The present invention relates to a counter circuit and method of controlling such a counter circuit, wherein a first counting section counts in accordance witha state- cycle, and a second counting section is clocked by the first counting section. At least one invalid counting state is introduced by controlling the second counting section to change its state before the first counting section has completed the state-cycle; and the at least one invalid counting state is then detected and corrected. Thereby, some redundancy is introduced in the counter, which can be used to detect and correct incomplete switching of counter states.
摘要翻译：计数器电路和控制这种计数器电路的方法技术领域本发明涉及计数器电路和控制这种计数器电路的方法，其中第一计数部分根据状态周期进行计数，并且第二计数部分由第一计数部分计时。在第一计数部分完成状态循环之前，通过控制第二计数部分改变其状态来引入至少一个无效计数状态; 然后检测并校正至少一个无效计数状态。因此，计数器中引入了一些冗余，可用于检测和纠正计数器状态的不完整切换。

4. 发明公开

EP1645034A1 SELF-CALIBRATING CONTROLLABLE OSCILLATOR IN A PHASE LOCKED LOOP 审中-公开
标题翻译：自校准应税振荡器在相LOOP
公开(公告)号：EP1645034A1
公开(公告)日：2006-04-12
申请号：EP04740959.4
申请日：2004-07-13
申请人： Ericsson Technology Licensing AB
发明人： BENGTSSON, Erik , NORD, Lars
IPC分类号： H03L7/113 , H03L7/18
CPC分类号： H03L7/1806 , H03L7/0891 , H03L7/113
摘要： The controllable oscillator in a phase-locked loop (PLL) can self-calibrate by tapping the PLL's feedback path with a suitable circuit or logic block. The logic block may include a counter. This enables the self -calibration/trimming to be handled completely within a product, such as a radio telephone, and no external instruments or software are needed for trimming.

5. 发明公开

EP1168627A3 Frequency synthesizer 有权
标题翻译：频率合成器
公开(公告)号：EP1168627A3
公开(公告)日：2003-10-15
申请号：EP01113077.0
申请日：2001-05-29
申请人： Matsushita Electric Industrial Co., Ltd.
发明人： Hirano, Shunsuke , Yamada, Ryoichi , Miyahara, Yasunori , Hiraoka, Yukio , Adachi, Hisashi
IPC分类号： H03L7/18 , H03L7/099 , H03L7/10 , H03L7/089 , H04Q7/30 , H04Q7/32 , H03L7/113
CPC分类号： H03L7/0898 , H03L7/087 , H03L7/099 , H03L7/107 , H03L7/113 , H03L7/199
摘要： A frequency synthesizer is provided with a prescaler 2 and a counter 3, which output a signal having a frequency generated by frequency-dividing an output signal of a VCO 1; a reference frequency divider 5 for frequency-dividing a frequency of a reference signal of a reference signal source 4; a frequency adjusting meas 9 operated in such that a frequency error between the output signal of the counter 5 and the output signal of the reference frequency divider 5 is detected, and in response to this detection result, such a signal is outputted by which either a capacitor value or an inductor value employed in a resonant circuit of the VCO 1 is switched; and also a bias control means for applying an arbitrary voltage V1 to a control voltage terminal of the VCO 1 so as to bring an output signal of a charge pump 7 into a high impedance state when the frequency adjusting means 9 is operated. Since the resonant frequency of the resonant circuit is changed in response to an actual oscillation frequency of the VCO 1, the frequency synthesizer can be phase-locked at a desirable frequency. Also, since the VCO can be manufactured in the IC form, the compact VCO can be made in low cost.

6. 发明授权

EP0868030B1 Boucle à verrouillage de phase avec circuit d'assistance au verrouillage 失效
标题翻译：具有相位控制辅助电路的锁相环
公开(公告)号：EP0868030B1
公开(公告)日：2003-05-14
申请号：EP98410031.3
申请日：1998-03-24
申请人： STMicroelectronics S.A.
发明人： Dufossez, Vincent
IPC分类号： H03L7/113
CPC分类号： H03L7/113 , H03D3/241

7. 发明授权

EP0763825B1 Data detection apparatus 失效
标题翻译：设备进行数据采集
公开(公告)号：EP0763825B1
公开(公告)日：2003-01-29
申请号：EP96114812.9
申请日：1996-09-16
申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
发明人： Horibe, Ryusuke , Ishibashi, Hiromiti , Shimada, Toshiyuki , Miyachi, Hiroyuki
IPC分类号： G11B20/14 , H03L7/113 , H03L7/087
CPC分类号： H03L7/081 , G11B19/12 , G11B20/1403 , G11B27/3027 , H03L7/0891 , H03L7/113

8. 发明公开

EP1221221A1 TAKT- UND DATENREGENERATOR FÜR UNTERSCHIEDLICHE DATENRATEN 有权
标题翻译：时钟和数据再生不同的数据速率
公开(公告)号：EP1221221A1
公开(公告)日：2002-07-10
申请号：EP00987020.5
申请日：2000-10-24
申请人： SIEMENS AKTIENGESELLSCHAFT
发明人： STILLING, Bernd , SOMMER, Jörg
IPC分类号： H04L7/033 , H04L25/02 , H03L7/113 , H03L7/087 , H03L7/14
CPC分类号： H03L7/113 , H03L7/087 , H03L7/197 , H04L7/0331 , H04L25/0262
摘要： Figure 1 shows the main block diagram of the inventive regenerator, which has a frequency control unit and a phase control unit. The phase control circuit (PLL) consists of a phase discriminator (PD), a loop filter, a controllable oscillator (5) and a frequency divider (6). Said frequency divider forms a clock pulse signal (TS) which is coupled back to a second input of the phase discriminator (PD). The data signal (DSF) is used as a reference signal. The aim of the invention is to provide a clock pulse and data regenerator that functions reliably and contiguously with different data signal bit rates. The regenerator should also be improved in such a way that differently coded data signals can be processed.

9. 发明授权

EP0881773B1 Frequency difference detector for use with an NRZ signal 失效
标题翻译： Frequenzdifferenzdetektor毛皮NRZ信号
公开(公告)号：EP0881773B1
公开(公告)日：2002-04-17
申请号：EP98304150.0
申请日：1998-05-26
申请人： Sun Microsystems, Inc.
发明人： Drost, Robert J. , Bosnyak, Robert J.
IPC分类号： H03L7/087 , H03L7/113
CPC分类号： H03L7/085 , H04L7/033

10. 发明授权

EP0645891B1 Frequency tuning for a phase locked loop 失效
标题翻译：频率调谐的锁相环
公开(公告)号：EP0645891B1
公开(公告)日：2001-12-19
申请号：EP94306134.1
申请日：1994-08-19
申请人： STMicroelectronics Limited
发明人： Horsfall, Wayne Leslie , Shipton, Gary
IPC分类号： H03L7/113 , H03D3/24
CPC分类号： H03L7/113 , H03D3/244

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