会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 6. 发明公开
    • MICROCONTROLLER CIRCUIT, CORRESPONDING DEVICE, SYSTEM AND METHOD OF OPERATION
    • EP4057574A1
    • 2022-09-14
    • EP22157917.0
    • 2022-02-22
    • STMicroelectronics Application GmbHSTMicroelectronics Design and Application s.r.o.
    • RENNIG, FredDVORAK, Vaclav
    • H04L12/40H03K7/08
    • A circuit (106) comprises a first (24a) and a second (24b) memory, a processing unit (21) and a timer (22). The processing unit generates a sequence of bits encoding a CAN frame and processes the sequence of bits to detect a sequence of PWM periods. Each PWM period has a dominant portion and a recessive portion, and a total duration. The processing unit stores values of a first parameter of the PWM periods into the first memory, and values of a second parameter of the PWM periods into the second memory, wherein the first and second parameter define a shape of the PWM periods. The timer comprises a first register (220) which reads from the first memory a value of the first parameter of a current PWM period. The timer comprises a counter (221) which increases a count number and resets the count number as a function of the value of the first register. A value of the first parameter of a subsequent PWM period is stored into the first register as a function of the value of the first register. The timer comprises a second register (222) which reads from the second memory a value of the second parameter of the current PWM period, and compares the count number of the counter circuit to such value. The second register drives an output pin (230) to a dominant (resp., recessive) value as a function of said comparing the count number of the counter circuit to the value of the second register. A value of the second parameter of a subsequent PWM period is stored into the second register in response to the count number reaching the value stored in the first or second register.
    • 8. 发明公开
    • PULSE WIDTH MODULATION DECODER CIRCUIT, CORRESPONDING DEVICE AND METHODS OF OPERATION
    • EP4020815A1
    • 2022-06-29
    • EP21214636.9
    • 2021-12-15
    • STMicroelectronics S.r.l.
    • Poletto, VanniFloriani, Ivan
    • H03M1/50H03K7/08H03K9/08
    • A circuit (20A) for decoding a pulse width modulated signal ( PWM ) comprises an input node (200) configured to receive the pulse width modulated signal ( PWM ) , and an output node (202) configured to provide an output signal ( DATA ) switching between a first output value and a second output value as a function of the duty-cycle of the input pulse width modulated signal ( PWM ) . A current generating circuitry (22) is coupled between a supply voltage node ( V dd ) and a ground voltage node (GND) . The current generating circuitry is coupled to the input node (200) to receive the input pulse width modulated signal ( PWM ) and is coupled to an intermediate node (204) of the circuit to inject a current ( I H ) therein or to sink a current ( I L ) therefrom as a function of the value of the input pulse width modulated signal ( PWM ) . A capacitance (C) has a first terminal coupled to the intermediate node (204), and it is alternatively charged and discharged by the currents ( I H , I L ) generated by the current generating circuitry (22). A comparator circuit (24) is coupled between the intermediate node (204) and the output node (202). The comparator circuit (24) is configured to sense a voltage signal (Vc) at the intermediate node (204), compare the sensed voltage signal (Vc) to a reference voltage signal ( V ref ), and drive the output node (202) to the first output value or to the second output value as a function of the comparison, thereby generating the output signal ( DATA ) .