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1. 发明公开

EP1543338A1 INTEGRIERTE TESTSCHALTUNGSANORDNUNG UND TESTVERFAHREN 审中-公开
标题翻译：集成电路测试和测试程序
公开(公告)号：EP1543338A1
公开(公告)日：2005-06-22
申请号：EP03757676.6
申请日：2003-09-19
申请人： Infineon Technologies AG
发明人： FISCHER, Armin , VON GLASOW, Alexander
IPC分类号： G01R31/26 , G01R31/316 , H01L21/66
CPC分类号： G01R31/2877 , G01R31/2648 , G01R31/2856 , G01R31/2879 , H01L22/34 , H01L23/345 , H01L2924/0002 , H01L2924/00
摘要： The invention relates to, inter alia, a test circuit arrangement (10) comprising integrated test structures (T1 to T5), an integrated heating element, an integrated feed unit (40), and an integrated detection unit (42). Said circuit arrangement (10) is used to test a plurality of test structures (T1 to T5) in a simple manner.

2. 发明公开

EP0631149A1 Method and apparatus for testing of integrated circuit chips 失效
标题翻译： Verfahren und Apparat zum Testen von integrierte Schaltungchips。
公开(公告)号：EP0631149A1
公开(公告)日：1994-12-28
申请号：EP94107216.7
申请日：1994-05-09
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Anschel, Morris , Ingraham, Anthony Paul , Lamb, Charles Robert , Lowell, Michael David , Markovich, Voya Rista , Mayr, Wolfgang , Murphy, Richard Gerald , Pierson, Mark Vincent , Powers, Tamar Alane , Reny, Timothy Shawn , Reynolds, Scott David
IPC分类号： G01R31/28
CPC分类号： G01R31/2863 , G01R31/2862 , G01R31/287 , G01R31/2877 , G01R31/2879 , G01R31/2886
摘要： A method of testing semi-conductor chips is disclosed. The individual semiconductor chips have I/O, power, and ground contacts. In the method of the invention a chip test fixture system is provided. The chip test fixture system has contacts corresponding to the contacts on the semiconductor chip. The carrier contacts have dendritic surfaces. The chip contacts are brought into electrically conductive contact with the conductor pads on the chip test fixture system. Test signal input vectors are applied to the inputs of the semiconductor chip, and output signal vectors are recovered from the semiconductor chip. After testing the chip is removed from the substrate.
摘要翻译：公开了半导体芯片的测试方法。单个半导体芯片具有I / O，电源和接地触点。在本发明的方法中，提供了一种芯片测试夹具系统。芯片测试夹具系统具有对应于半导体芯片上的触点的触点。载体触点具有树枝状表面。芯片触点与芯片测试夹具系统上的导体焊盘导电接触。测试信号输入矢量被施加到半导体芯片的输入，并从半导体芯片恢复输出信号矢量。测试后，将芯片从基板上取下。

3. 发明公开

EP0069592A1 Device for testing semiconductor devices at a high temperature 失效
标题翻译： Vorrichtung zumPrüfenvon Halbleitereinheiten bei einer hohen Temperatur。
公开(公告)号：EP0069592A1
公开(公告)日：1983-01-12
申请号：EP82303546.4
申请日：1982-07-06
申请人： FUJITSU LIMITED
发明人： Horiuchi, Akinori , Binnaka, Toshio , Maruyama, Shigeyuki
IPC分类号： G01R1/073 , G01R31/28
CPC分类号： G01R31/2877 , G01R1/0458
摘要： A device for testing semiconductor devices (5) at high temperatures comprises a heating portion where the semiconductor device (5) to be tested is heated to a predetermined temperature; a testing station; a chuck (6) for holding the semiconductor device (5) and means for moving the chuck (6) to convey the semiconductor device (5) held by the chuck (6) to the testing station. The chuck (6) includes a heating means (2) for heating the semiconductor device (5) and a temperature sensor (3). The device also includes temperature control means for controlling the temperature of the heating means (2) in response to the output of the temperature sensor (3).
摘要翻译：用于在高温下测试半导体器件（5）的器件包括加热部分，其中待测试的半导体器件（5）被加热到预定温度; 一个测试站; 用于保持半导体器件（5）的卡盘（6）和用于移动卡盘（6）以将由卡盘（6）保持的半导体器件（5）传送到测试台的装置。卡盘（6）包括用于加热半导体器件（5）和温度传感器（3）的加热装置（2）。该装置还包括用于响应于温度传感器（3）的输出来控制加热装置（2）的温度的温度控制装置。

4. 发明公开

EP1940213A2 Cooling assembly with direct cooling of active electronic components 审中-公开
标题翻译： KühlvorrichtungmitDirektkühlungaktiver elektronischer Komponenten
公开(公告)号：EP1940213A2
公开(公告)日：2008-07-02
申请号：EP08004223.7
申请日：2002-12-23
申请人： FormFactor, Inc.
发明人： Miller, Charles A.
IPC分类号： H05K7/20 , G01R31/28
CPC分类号： G01R31/2875 , G01R1/06733 , G01R1/07385 , G01R31/2863 , G01R31/2877 , G01R31/2886 , G01R31/2891 , H05K7/20218
摘要： The invention relates to a probe card assembly (300) comprising spring probe elements (305); and a package (400) coupled to the probe elements (305), wherein the package includes at least one die (430a-c) with active electronic components, the die (430a-c) electrically connected to the package by a plurality of first compliant interconnects (432a-c), wherein each of the first compliant interconnects is a structural element that is structurally distinct from each of the probe elements (305), and at least one coolant port (442, 444) that allows a coolant to enter the package (400) and directly cool the active electronic components of each die (430a-c) during a testing operation. Therein the probe elements (305) are directly connected to the package (400).
摘要翻译：本发明涉及一种包括弹簧探针元件（305）的探针卡组件（300）。以及耦合到所述探针元件（305）的封装（400），其中所述封装包括具有有源电子部件的至少一个管芯（430a-c），所述管芯（430a-c）通过多个第一（432a-c），其中每个第一顺应性互连是在结构上与每个探针元件（305）不同的结构元件，以及允许冷却剂进入的至少一个冷却剂端口（442,444）所述封装（400）并且在测试操作期间直接冷却每个管芯（430a-c）的有源电子部件。其中探针元件（305）直接连接到包装（400）。

5. 发明公开

EP1894027A1 APPARATUS FOR TESTING ELECTRONIC DEVICES 审中-公开
标题翻译：设备用于测试电子器件
公开(公告)号：EP1894027A1
公开(公告)日：2008-03-05
申请号：EP06752021.3
申请日：2006-04-27
申请人： AEHR TEST SYSTEMS, INC.
发明人： RICHMOND, Donald, P., II , DEBOE, Kenneth, W. , UHER, Frank, O. , JOVANOVIC, Jovan , LINDSEY, Scott, E , MAENNER, Thomas, T. , SHEPHERD, Patrick, M. , TYSON, Jeffrey, L. , CARBONE, Mark, C. , BURKE, Paul, W. , CAO, Doan, D. , TOMIC, James, F. , VU, Long, V.
IPC分类号： G01R31/28 , G01R1/073
CPC分类号： G01R31/287 , G01R31/003 , G01R31/26 , G01R31/2642 , G01R31/2851 , G01R31/2855 , G01R31/2863 , G01R31/2868 , G01R31/2872 , G01R31/2877 , G01R31/2886 , G01R31/2889 , G01R31/2891 , G01R31/31924 , G06F8/30
摘要： An apparatus is described for burn-in and/or functional testing of microelectronic circuits of unsingulated wafers. A large number of power, ground, and signal connections can be made to a large number of contacts on a wafer. The apparatus has a cartridge that allows for fanning-in of electric paths. A distribution board has a plurality of interfaces that are strategically positioned to provide a dense configuration. The interfaces are connected through flexible attachments to an array of first connector modules. Each one of the first connector modules can be independently connected to a respective one of a plurality of second connector modules, thereby reducing stresses on a frame of the apparatus. Further features include for example a piston that allows for tight control of forces exerted by terminals onto contacts of a wafer.

6. 发明授权

EP0069592B1 Device for testing semiconductor devices at a high temperature 失效
标题翻译：用于在高温下测试半导体器件的器件
公开(公告)号：EP0069592B1
公开(公告)日：1985-04-24
申请号：EP82303546.4
申请日：1982-07-06
申请人： FUJITSU LIMITED
发明人： Horiuchi, Akinori , Binnaka, Toshio , Maruyama, Shigeyuki
IPC分类号： G01R1/073 , G01R31/28
CPC分类号： G01R31/2877 , G01R1/0458

7. 发明公开

EP4364197A1 TEMPERATURE CONTROL SYSTEM INCLUDING CONTACTOR ASSEMBLY 审中-实审
公开(公告)号：EP4364197A1
公开(公告)日：2024-05-08
申请号：EP22834174.9
申请日：2022-06-29
申请人： Delta Design, Inc.
发明人： TUSTANIWSKYJ, Jerry Ihor , WETZEL, Steve
IPC分类号： H01L23/367 , F25B45/00 , G01R31/26 , G05D23/30 , H01L23/38
CPC分类号： G01R31/2875 , G01R31/2877

8. 发明公开

EP1940213A3 Cooling assembly with direct cooling of active electronic components 审中-公开
标题翻译：冷却器与有源电子部件的直接冷却
公开(公告)号：EP1940213A3
公开(公告)日：2009-12-16
申请号：EP08004223.7
申请日：2002-12-23
申请人： FormFactor, Inc.
发明人： Miller, Charles A.
IPC分类号： G01R31/28
CPC分类号： G01R31/2875 , G01R1/06733 , G01R1/07385 , G01R31/2863 , G01R31/2877 , G01R31/2886 , G01R31/2891 , H05K7/20218
摘要： The invention relates to a probe card assembly (300) comprising spring probe elements (305); and a package (400) coupled to the probe elements (305), wherein the package includes at least one die (430a-c) with active electronic components, the die (430a-c) electrically connected to the package by a plurality of first compliant interconnects (432a-c), wherein each of the first compliant interconnects is a structural element that is structurally distinct from each of the probe elements (305), and at least one coolant port (442, 444) that allows a coolant to enter the package (400) and directly cool the active electronic components of each die (430a-c) during a testing operation. Therein the probe elements (305) are directly connected to the package (400).

9. 发明公开

EP1546745A1 METHOD AND SYSTEM FOR ESTABLISHING A RELATION BETWEEN JOULE HEATING AND A CURRENT DENSITY IN A CONDUCTOR 审中-公开
标题翻译：方法和系统成型JOULISCHE热能和电能密度之间的关系在执行材料
公开(公告)号：EP1546745A1
公开(公告)日：2005-06-29
申请号：EP03749590.0
申请日：2003-09-10
申请人： ADVANCED MICRO DEVICES INC.
发明人： YAO, Huade, Walter , MARATHE, Amit, P. , PHAM, Van-Hung
IPC分类号： G01R31/316
CPC分类号： G01R31/2877 , G01R31/2856 , G01R31/2879
摘要： According to one exemplary embodiment, a method for establishing a relationship between Joule heating in a conductor and a current density in the conductor is implemented by performing wafer level measurements (500). According to this exemplary embodiment, wafer level measurements are performed to arrive at a temperature coefficient of resistance in the conductor (118, 502). The method also includes determining a thermal resistance of the conductor (510). The thermal resistance is then utilized to establish a relationship between Joule heating in the conductor and the current density in the conductor (512). The relationship so obtained is then utilized to determine design rules, mean time to fail, and other information to aid in the design of reliable semiconductor devices (514). According to another exemplary embodiment, a wafer level measurement system (100) is utilized to establish a relationship between Joule heating in a conductor and a current density in the conductor.

10. 发明授权

EP0523735B1 Burn-in apparatus and method 失效
标题翻译：装置和烘焙法。
公开(公告)号：EP0523735B1
公开(公告)日：1995-04-05
申请号：EP92112264.4
申请日：1992-07-17
申请人： SUMITOMO ELECTRIC INDUSTRIES, LIMITED
发明人： Hashinaga, Tatsuya, c/o Yokohama Works of Sumitomo , Nishiguchi, Masanori, c/o Yokohama Works of Sumit.
IPC分类号： H01L21/00 , G01R31/28
CPC分类号： G01R31/2877 , G01R31/2849 , G01R31/2856 , G01R31/2862 , G01R31/2863 , G01R31/2884 , G01R31/309

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