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1. 发明授权

EP1555693B1 Method to produce a nonvolatile semiconductor memory device 有权转让
标题翻译：一种用于制造非易失性半导体存储器件的方法
公开(公告)号：EP1555693B1
公开(公告)日：2008-08-06
申请号：EP05250075.8
申请日：2005-01-10
申请人： Sharp Kabushiki Kaisha
发明人： Kawazoe, Hidechika , Tamai, Yukio , Shimaoka, Atsushi , Hagiwara, Naoto , Masuda, Hidetoshi , Suzuki, Toshimasa
IPC分类号： H01L27/24
CPC分类号： H01L27/2436 , G11C13/0007 , G11C13/003 , G11C2213/31 , G11C2213/78 , G11C2213/79 , H01L45/04 , H01L45/1233 , H01L45/147 , H01L45/1625 , H01L45/1641

2. 发明公开

EP1555700A2 Method for manufacturing a nonvolatile memory device with a variable resistor 审中-公开
标题翻译：一种用于制造非易失性存储器件具有的可变电阻器的方法
公开(公告)号：EP1555700A2
公开(公告)日：2005-07-20
申请号：EP05000519.8
申请日：2005-01-12
申请人： Sharp Kabushiki Kaisha
发明人： Kawazoe, Hidechika , Tamai, Yukio , Shimaoka, Atsushi , Hagiwara, Naoto , Matsushita, Yuji , Nishi, Yuji
IPC分类号： H01L45/00 , H01L29/68 , H01L21/8246 , H01L27/112
CPC分类号： H01L45/1675 , G11C13/0007 , G11C13/003 , G11C2213/31 , G11C2213/78 , G11C2213/79 , H01L27/2436 , H01L45/04 , H01L45/1233 , H01L45/147 , H01L45/1625
摘要： In a manufacturing method of a nonvolatile semiconductor memory device including a variable resistive element having a variable resistor (8) made of a perovskite-type metal oxide film, the variable resistor (8) is formed at a temperature which is lower than the melting point of a metal wire layer (11) that has been formed before formation of the variable resistor (8). More preferably, the variable resistor (8) is formed by a praseodymium calcium manganese oxide, which is represented by a general formula, Pr 1-x Ca x MnO 3 , carried out at a film forming temperature in a range from 350°C to 500°C according to a sputtering method.
摘要翻译：在非易失性半导体存储器件，其包括具有可变电阻器的可变电阻元件的制造方法（8）制成的钙钛矿型金属氧化物的电影，上述可变电阻（8）是在所有的温度比熔点低FORMED 的金属线层（11）已经形成的形成上述可变电阻（8）的前一样。更优选地，可变电阻器（8）由镨钙锰氧化物，其是由通式FORMED，镨1-X的Ca X MnO 3的，在成膜温度的范围为350℃至进行 500℃至gemäß溅射法。

3. 发明授权

EP1489620B1 Nonvolatile semiconductor memory device, and programming method and erasing method thereof 有权转让
标题翻译：非易失性存储器及其编程和擦除方法
公开(公告)号：EP1489620B1
公开(公告)日：2007-01-31
申请号：EP04253628.4
申请日：2004-06-17
申请人： SHARP KABUSHIKI KAISHA
发明人： Tamai, Yukio , Inoue, Kohji , Morita, Teruaki
IPC分类号： G11C11/15 , G11C16/28
CPC分类号： G11C13/0007 , G11C13/0069 , G11C16/3427 , G11C2013/009 , G11C2213/31 , G11C2213/77

4. 发明授权

EP1560221B1 Semiconductor memory device 有权
标题翻译：半导体存储装置
公开(公告)号：EP1560221B1
公开(公告)日：2008-09-03
申请号：EP05250434.7
申请日：2005-01-27
申请人： Sharp Kabushiki Kaisha
发明人： Inoue, Koji , Morikawa, Yoshinao , Shimaoka, Atsushi , Tamai, Yukio
IPC分类号： G11C7/06 , G11C7/12
CPC分类号： G11C7/062 , G11C7/06 , G11C7/12 , G11C7/14 , G11C8/08

5. 发明公开

EP1612805A1 Writing method of variable resistance memory device 审中-公开
标题翻译： Schreibverfahrenfüreinen Speicher mitveränderlichemWiderstand
公开(公告)号：EP1612805A1
公开(公告)日：2006-01-04
申请号：EP05254028.3
申请日：2005-06-28
申请人： SHARP KABUSHIKI KAISHA
发明人： Hosoi, Yasunari , Tamai, Yukio , Ishihara, Kazuya , Kobayashi, Shinji , Awaya, Nobuyoshi
IPC分类号： G11C13/00
CPC分类号： G11C29/50 , G11C13/0007 , G11C13/0069 , G11C29/50008 , G11C2013/009 , G11C2213/31
摘要： A variable resistance element is configured to be provided with a perovskite-type oxide (2) between a first electrode (1) and a second electrode (3), of which electric resistance between the first electrode (1) and the second electrode (3) is changed by applying a voltage pulse of a predetermined polarity between the first electrode (1) and the second electrode (3), and the variable resistance element has a resistance hysteresis characteristic, in which a changing rate of a resistance value is changed from positive to negative with respect to increase of a cumulative pulse applying time in the application of the voltage pulse. The voltage pulse is applied to the variable resistance element so that the cumulative pulse applying time is not longer than a specific cumulative pulse applying time, in which the changing rate of the resistance value is changed from positive to negative with respect to increase of the cumulative pulse applying time in the resistance hysteresis characteristic.
摘要翻译：可变电阻元件被配置为在第一电极（1）和第二电极（3）之间设置有钙钛矿型氧化物（2），其中第一电极（1）和第二电极（3）之间的电阻）通过在第一电极（1）和第二电极（3）之间施加预定极性的电压脉冲而改变，并且可变电阻元件具有电阻滞后特性，其中电阻值的变化率从相对于施加电压脉冲的累积脉冲施加时间的增加而言，为正。电压脉冲被施加到可变电阻元件，使得累积脉冲施加时间不长于特定的累积脉冲施加时间，其中电阻值的变化率相对于累积的增加而从正变化到负脉冲施加时间在电阻滞后特性。

6. 发明公开

EP1555693A1 Nonvolatile semiconductor memory device 有权转让
标题翻译：哈佛大学教授赫尔斯特朗
公开(公告)号：EP1555693A1
公开(公告)日：2005-07-20
申请号：EP05250075.8
申请日：2005-01-10
申请人： Sharp Kabushiki Kaisha
发明人： Kawazoe, Hidechika , Tamai, Yukio , Shimaoka, Atsushi , Hagiwara, Naoto , Masuda, Hidetoshi , Suzuki, Toshimasa
IPC分类号： H01L27/24 , H01L45/00
CPC分类号： H01L27/2436 , G11C13/0007 , G11C13/003 , G11C2213/31 , G11C2213/78 , G11C2213/79 , H01L45/04 , H01L45/1233 , H01L45/147 , H01L45/1625 , H01L45/1641
摘要： A nonvolatile memory element (10) is formed by layering a lower electrode (7), a variable resistor (8) and an upper electrode (9) in sequence. The variable resistor (8) is formed in which crystallinity and amorphism are mixed. Thus, the nonvolatile memory element (10) is formed. More preferably, the variable resistor (8) is a praseodymium-calcium-manganese oxide represented by a general formula, Pr 1-x Ca x MnO 3 , that has been formed at a film forming temperature from 350°C to 500°C. Alternatively, the variable resistor (8) is formed as a film at a film forming temperature that allows the variable resistor to become of an amorphous state or a state where crystallinity and amorphism are mixed and, then, is subjected to an annealing process at a temperature higher than the film forming temperature, in a temperature range where the variable resistor (8) can maintain the state where crystallinity and amorphism are mixed.
摘要翻译：通过依次层叠下电极（7），可变电阻（8）和上电极（9）来形成非易失性存储元件（10）。形成结晶性和非晶态混合的可变电阻（8）。因此，形成非易失性存储元件（10）。更优选地，可变电阻器（8）是在350℃至500℃的成膜温度下形成的由通式Pr1-xCaxMnO3表示的镨 - 钙 - 锰氧化物。或者，可变电阻器（8）形成为成膜温度为允许可变电阻变为非晶态的膜或结晶性和非晶态混合的状态，然后在高于膜的温度下进行退火处理在可变电阻器（8）可以保持混合结晶性和非晶态的状态的温度范围内形成温度。

7. 发明公开

EP1555700A3 Method for manufacturing a nonvolatile memory device with a variable resistor 审中-公开
标题翻译：一种用于制造非易失性存储器件具有的可变电阻器的方法
公开(公告)号：EP1555700A3
公开(公告)日：2007-10-03
申请号：EP05000519.8
申请日：2005-01-12
申请人： Sharp Kabushiki Kaisha
发明人： Kawazoe, Hidechika , Tamai, Yukio , Shimaoka, Atsushi , Hagiwara, Naoto , Matsushita, Yuji , Nishi, Yuji
IPC分类号： H01L45/00 , H01L29/68 , H01L21/8246 , H01L27/112 , H01L27/06
CPC分类号： H01L45/1675 , G11C13/0007 , G11C13/003 , G11C2213/31 , G11C2213/78 , G11C2213/79 , H01L27/2436 , H01L45/04 , H01L45/1233 , H01L45/147 , H01L45/1625
摘要： In a manufacturing method of a nonvolatile semiconductor memory device including a variable resistive element having a variable resistor (8) made of a perovskite-type metal oxide film, the variable resistor (8) is formed at a temperature which is lower than the melting point of a metal wire layer (11) that has been formed before formation of the variable resistor (8). More preferably, the variable resistor (8) is formed by a praseodymium calcium manganese oxide, which is represented by a general formula, Pr 1-x Ca x MnO 3 , carried out at a film forming temperature in a range from 350°C to 500°C according to a sputtering method.

8. 发明公开

EP1622163A1 Nonvolatile semiconductor memory device and read method 有权转让
标题翻译： NichtflüchtigeHalbleiterspeicheranordnung und Leseverfahren
公开(公告)号：EP1622163A1
公开(公告)日：2006-02-01
申请号：EP05254692.6
申请日：2005-07-27
申请人： SHARP KABUSHIKI KAISHA
发明人： Kawazoe, Hidechika , Tamai, Yukio , Shimaoka, Atsushi , Morimoto, Hidenori , Awaya, Nobuyoshi
IPC分类号： G11C13/00 , G11C16/02
CPC分类号： G11C13/0007 , G11C13/004 , G11C2213/31 , G11C2213/77 , G11C2213/79
摘要： A nonvolatile semiconductor memory device according to the present invention comprises a memory cell selecting circuit for selecting the memory cell from the memory cell array in units of row, column or memory cell; a read voltage application circuit for applying a read voltage to the variable resistor element of the selected memory cells selected by the memory cell selecting circuit; and a read circuit for detecting the amount of the read current flowing in accordance with the resistance value of the variable resistor element with respect to the memory cell to be read of the selected memory cells and reading the information stored in the memory cell to be read; and the read voltage application circuit applies a dummy read voltage having reversed polarity from the read voltage to the variable resistor element of the selected memory cell.
摘要翻译：根据本发明的非易失性半导体存储器件包括存储单元选择电路，用于以行，列或存储单元为单位从存储单元阵列中选择存储单元; 读取电压施加电路，用于对由存储单元选择电路选择的所选存储单元的可变电阻元件施加读取电压; 以及读取电路，用于根据可变电阻器元件的电阻值相对于要选择的存储器单元读取的存储单元检测流过的读取电流的量并读取存储在要读取的存储器单元中的信息 ; 并且读取电压施加电路将具有与读取电压相反的极性的虚拟读取电压施加到所选存储单元的可变电阻器元件。

9. 发明公开

EP1560221A3 Semiconductor memory device 有权
标题翻译：半导体存储器件
公开(公告)号：EP1560221A3
公开(公告)日：2006-01-18
申请号：EP05250434.7
申请日：2005-01-27
申请人： SHARP KABUSHIKI KAISHA
发明人： Inoue, Koji , Morikawa, Yoshinao , Shimaoka, Atsushi , Tamai, Yukio
IPC分类号： G11C7/06 , G11C7/12
CPC分类号： G11C7/062 , G11C7/06 , G11C7/12 , G11C7/14 , G11C8/08
摘要： A semiconductor memory device comprises a column readout voltage supply circuit which supplies a predetermined first voltage when readout is selected and supplies a predetermined second voltage which is different from the fist voltage when the readout is not selected, to each column selection line, a row readout voltage supply circuit which supplies the second voltage to each row selection line at the time of readout, a sense circuit which detects a current flowing in the selected row selection line separately from a current flowing in the non-selected row selection lines to detect an electric resistance state of the selected memory cell at the time of readout, and a column voltage displacement prevention circuit which prevents displacement of a supplied voltage level for each of the non-selected column selection lines at the time of readout.
摘要翻译：一种半导体存储器件包括：列读出电压供给电路，当选择读出时提供预定的第一电压，并且当读出未被选择时将与第一电压不同的预定的第二电压提供给每个列选择线;行读出在读出时向各行选择线提供第二电压的电压供给电路，与在未选择的行选择线中流动的电流分开地检测在所选择的行选择线中流动的电流的检测电路，在读出时所选择的存储单元的电阻状态以及防止读出时每个非选择列选择线的供给电压电平的位移的列电压位移防止电路。

10. 发明公开

EP1489620A3 Nonvolatile semiconductor memory device, and programming method and erasing method thereof 有权转让
标题翻译：非易失性存储器及其编程和擦除方法
公开(公告)号：EP1489620A3
公开(公告)日：2005-02-09
申请号：EP04253628.4
申请日：2004-06-17
申请人： SHARP KABUSHIKI KAISHA
发明人： Tamai, Yukio , Inoue, Kohji , Morita, Teruaki
IPC分类号： G11C11/15 , G11C16/28
CPC分类号： G11C13/0007 , G11C13/0069 , G11C16/3427 , G11C2013/009 , G11C2213/31 , G11C2213/77
摘要： One end of each variable resistive element (22), which forms a memory array (1), in the same row is connected to the same word line (20) and the other end of each variable resistive element (22) in the same column is connected to the same bit line (21). A first word line voltage is selected and applied to the selected word line, a second word line voltage is selected and applied to the unselected word lines, a first bit line voltage is selected and applied to the selected bit line, and a second bit line voltage is selected and applied to the unselected bit lines. The voltage difference between the first word line voltage and the first bit line voltage is set at a value that is no less than the first voltage difference that changes the resistance value of a variable resistive element, and the voltage difference between the first word line voltage and the second bit line voltage, the voltage difference between the second word line voltage and the first bit line voltage and the voltage difference between the second word line voltage and the second bit line voltage are respectively set at a value that is no greater than the second voltage difference that does not change the resistance value of a variable resistive element.

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