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    • 1. 发明公开
    • ESD protection thyristor with trigger diode
    • 带触发二极管的ESD保护晶闸管
    • EP0982776A3
    • 2000-11-02
    • EP99306769.3
    • 1999-08-25
    • SHARP KABUSHIKI KAISHA
    • Kawazoe, HidechikaAoki, EijiHsu, Sheng TengFujii, Katsumasa
    • H01L27/02H01L29/74
    • H01L27/0262H01L27/0248H01L27/0259H01L29/7412
    • An electrostatic discharge protection device according to the present invention is provided at an input or an output of a semiconductor integrated circuit for protecting an internal circuit of the semiconductor integrated circuit from an electrostatic surge flowing into or out of the semiconductor integrated circuit. The electrostatic discharge protection device includes: a thyristor; and a trigger diode (A) for triggering the thyristor with a low voltage. The trigger diode includes: an n-type cathode high impurity concentration region (9); a p-type anode high impurity concentration region (10); and an insulator section (12,13,14) for electrically insulating a silicide layer formed on a surface of the n-type cathode high impurity concentration region from another silicide layer formed on a surface of the p-type anode high impurity concentration region.
    • 根据本发明的静电放电保护装置设置在半导体集成电路的输入端或输出端,用于保护半导体集成电路的内部电路免受流入或流出半导体集成电路的静电冲击。 该静电放电保护装置包括:晶闸管; 和触发二极管(A),用于触发具有低电压的晶闸管。 触发二极管包括:n型阴极高浓度杂质区域(9); p型阳极高杂质浓度区域(10); 以及绝缘体部分(12,13,14),用于使在n型阴极高杂质浓度区域的表面上形成的硅化物层与在p型阳极高杂质浓度区域的表面上形成的另一硅化物层电绝缘。
    • 5. 发明公开
    • ESD protection thyristor with trigger diode
    • ESD-Schutz晶闸管触发二极管
    • EP0982776A2
    • 2000-03-01
    • EP99306769.3
    • 1999-08-25
    • SHARP KABUSHIKI KAISHA
    • Kawazoe, HidechikaAoki, EijiHsu, Sheng TengFujii, Katsumasa
    • H01L27/02H01L29/74
    • H01L27/0262H01L27/0248H01L27/0259H01L29/7412
    • An electrostatic discharge protection device according to the present invention is provided at an input or an output of a semiconductor integrated circuit for protecting an internal circuit of the semiconductor integrated circuit from an electrostatic surge flowing into or out of the semiconductor integrated circuit. The electrostatic discharge protection device includes: a thyristor; and a trigger diode for triggering the thyristor with a low voltage. The trigger diode includes: an n-type cathode high impurity concentration region; a p-type anode high impurity concentration region; and an insulator section for electrically insulating a silicide layer formed on a surface of the n-type cathode high impurity concentration region from another silicide layer formed on a surface of the p-type anode high impurity concentration region.
    • 根据本发明的静电放电保护装置设置在半导体集成电路的输入或输出端,用于保护半导体集成电路的内部电路免受流入或流出半导体集成电路的静电浪涌。 静电放电保护装置包括:晶闸管; 以及用于以低电压触发晶闸管的触发二极管。 触发二极管包括:n型阴极高杂质浓度区域; p型阳极杂质浓度高的区域; 以及绝缘体部分,用于将形成在n型阴极高杂质浓度区域的表面上的硅化物层与形成在p型阳极高杂质浓度区域的表面上的另一硅化物层电绝缘。
    • 9. 发明公开
    • Nonvolatile semiconductor memory device and read method
    • NichtflüchtigeHalbleiterspeicheranordnung und Leseverfahren
    • EP1622163A1
    • 2006-02-01
    • EP05254692.6
    • 2005-07-27
    • SHARP KABUSHIKI KAISHA
    • Kawazoe, HidechikaTamai, YukioShimaoka, AtsushiMorimoto, HidenoriAwaya, Nobuyoshi
    • G11C13/00G11C16/02
    • G11C13/0007G11C13/004G11C2213/31G11C2213/77G11C2213/79
    • A nonvolatile semiconductor memory device according to the present invention comprises a memory cell selecting circuit for selecting the memory cell from the memory cell array in units of row, column or memory cell; a read voltage application circuit for applying a read voltage to the variable resistor element of the selected memory cells selected by the memory cell selecting circuit; and a read circuit for detecting the amount of the read current flowing in accordance with the resistance value of the variable resistor element with respect to the memory cell to be read of the selected memory cells and reading the information stored in the memory cell to be read; and the read voltage application circuit applies a dummy read voltage having reversed polarity from the read voltage to the variable resistor element of the selected memory cell.
    • 根据本发明的非易失性半导体存储器件包括存储单元选择电路,用于以行,列或存储单元为单位从存储单元阵列中选择存储单元; 读取电压施加电路,用于对由存储单元选择电路选择的所选存储单元的可变电阻元件施加读取电压; 以及读取电路,用于根据可变电阻器元件的电阻值相对于要选择的存储器单元读取的存储单元检测流过的读取电流的量并读取存储在要读取的存储器单元中的信息 ; 并且读取电压施加电路将具有与读取电压相反的极性的虚拟读取电压施加到所选存储单元的可变电阻器元件。