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1. 发明公开

EP0982776A3 ESD protection thyristor with trigger diode 有权
标题翻译：带触发二极管的ESD保护晶闸管
公开(公告)号：EP0982776A3
公开(公告)日：2000-11-02
申请号：EP99306769.3
申请日：1999-08-25
申请人： SHARP KABUSHIKI KAISHA
发明人： Kawazoe, Hidechika , Aoki, Eiji , Hsu, Sheng Teng , Fujii, Katsumasa
IPC分类号： H01L27/02 , H01L29/74
CPC分类号： H01L27/0262 , H01L27/0248 , H01L27/0259 , H01L29/7412
摘要： An electrostatic discharge protection device according to the present invention is provided at an input or an output of a semiconductor integrated circuit for protecting an internal circuit of the semiconductor integrated circuit from an electrostatic surge flowing into or out of the semiconductor integrated circuit. The electrostatic discharge protection device includes: a thyristor; and a trigger diode (A) for triggering the thyristor with a low voltage. The trigger diode includes: an n-type cathode high impurity concentration region (9); a p-type anode high impurity concentration region (10); and an insulator section (12,13,14) for electrically insulating a silicide layer formed on a surface of the n-type cathode high impurity concentration region from another silicide layer formed on a surface of the p-type anode high impurity concentration region.
摘要翻译：根据本发明的静电放电保护装置设置在半导体集成电路的输入端或输出端，用于保护半导体集成电路的内部电路免受流入或流出半导体集成电路的静电冲击。该静电放电保护装置包括：晶闸管; 和触发二极管（A），用于触发具有低电压的晶闸管。触发二极管包括：n型阴极高浓度杂质区域（9）; p型阳极高杂质浓度区域（10）; 以及绝缘体部分（12,13,14），用于使在n型阴极高杂质浓度区域的表面上形成的硅化物层与在p型阳极高杂质浓度区域的表面上形成的另一硅化物层电绝缘。

2. 发明授权

EP1622163B1 Nonvolatile semiconductor memory device and read method 有权转让
标题翻译：非易失性半导体存储装置及读出方法
公开(公告)号：EP1622163B1
公开(公告)日：2008-12-31
申请号：EP05254692.6
申请日：2005-07-27
申请人： Sharp Kabushiki Kaisha
发明人： Kawazoe, Hidechika , Tamai, Yukio , Shimaoka, Atsushi , Morimoto, Hidenori , Awaya, Nobuyoshi
IPC分类号： G11C13/00 , G11C16/02
CPC分类号： G11C13/0007 , G11C13/004 , G11C2213/31 , G11C2213/77 , G11C2213/79

3. 发明公开

EP1555693A1 Nonvolatile semiconductor memory device 有权转让
标题翻译：哈佛大学教授赫尔斯特朗
公开(公告)号：EP1555693A1
公开(公告)日：2005-07-20
申请号：EP05250075.8
申请日：2005-01-10
申请人： Sharp Kabushiki Kaisha
发明人： Kawazoe, Hidechika , Tamai, Yukio , Shimaoka, Atsushi , Hagiwara, Naoto , Masuda, Hidetoshi , Suzuki, Toshimasa
IPC分类号： H01L27/24 , H01L45/00
CPC分类号： H01L27/2436 , G11C13/0007 , G11C13/003 , G11C2213/31 , G11C2213/78 , G11C2213/79 , H01L45/04 , H01L45/1233 , H01L45/147 , H01L45/1625 , H01L45/1641
摘要： A nonvolatile memory element (10) is formed by layering a lower electrode (7), a variable resistor (8) and an upper electrode (9) in sequence. The variable resistor (8) is formed in which crystallinity and amorphism are mixed. Thus, the nonvolatile memory element (10) is formed. More preferably, the variable resistor (8) is a praseodymium-calcium-manganese oxide represented by a general formula, Pr 1-x Ca x MnO 3 , that has been formed at a film forming temperature from 350°C to 500°C. Alternatively, the variable resistor (8) is formed as a film at a film forming temperature that allows the variable resistor to become of an amorphous state or a state where crystallinity and amorphism are mixed and, then, is subjected to an annealing process at a temperature higher than the film forming temperature, in a temperature range where the variable resistor (8) can maintain the state where crystallinity and amorphism are mixed.
摘要翻译：通过依次层叠下电极（7），可变电阻（8）和上电极（9）来形成非易失性存储元件（10）。形成结晶性和非晶态混合的可变电阻（8）。因此，形成非易失性存储元件（10）。更优选地，可变电阻器（8）是在350℃至500℃的成膜温度下形成的由通式Pr1-xCaxMnO3表示的镨 - 钙 - 锰氧化物。或者，可变电阻器（8）形成为成膜温度为允许可变电阻变为非晶态的膜或结晶性和非晶态混合的状态，然后在高于膜的温度下进行退火处理在可变电阻器（8）可以保持混合结晶性和非晶态的状态的温度范围内形成温度。

4. 发明授权

EP1555693B1 Method to produce a nonvolatile semiconductor memory device 有权转让
标题翻译：一种用于制造非易失性半导体存储器件的方法
公开(公告)号：EP1555693B1
公开(公告)日：2008-08-06
申请号：EP05250075.8
申请日：2005-01-10
申请人： Sharp Kabushiki Kaisha
发明人： Kawazoe, Hidechika , Tamai, Yukio , Shimaoka, Atsushi , Hagiwara, Naoto , Masuda, Hidetoshi , Suzuki, Toshimasa
IPC分类号： H01L27/24
CPC分类号： H01L27/2436 , G11C13/0007 , G11C13/003 , G11C2213/31 , G11C2213/78 , G11C2213/79 , H01L45/04 , H01L45/1233 , H01L45/147 , H01L45/1625 , H01L45/1641

5. 发明公开

EP1555700A2 Method for manufacturing a nonvolatile memory device with a variable resistor 审中-公开
标题翻译：一种用于制造非易失性存储器件具有的可变电阻器的方法
公开(公告)号：EP1555700A2
公开(公告)日：2005-07-20
申请号：EP05000519.8
申请日：2005-01-12
申请人： Sharp Kabushiki Kaisha
发明人： Kawazoe, Hidechika , Tamai, Yukio , Shimaoka, Atsushi , Hagiwara, Naoto , Matsushita, Yuji , Nishi, Yuji
IPC分类号： H01L45/00 , H01L29/68 , H01L21/8246 , H01L27/112
CPC分类号： H01L45/1675 , G11C13/0007 , G11C13/003 , G11C2213/31 , G11C2213/78 , G11C2213/79 , H01L27/2436 , H01L45/04 , H01L45/1233 , H01L45/147 , H01L45/1625
摘要： In a manufacturing method of a nonvolatile semiconductor memory device including a variable resistive element having a variable resistor (8) made of a perovskite-type metal oxide film, the variable resistor (8) is formed at a temperature which is lower than the melting point of a metal wire layer (11) that has been formed before formation of the variable resistor (8). More preferably, the variable resistor (8) is formed by a praseodymium calcium manganese oxide, which is represented by a general formula, Pr 1-x Ca x MnO 3 , carried out at a film forming temperature in a range from 350°C to 500°C according to a sputtering method.
摘要翻译：在非易失性半导体存储器件，其包括具有可变电阻器的可变电阻元件的制造方法（8）制成的钙钛矿型金属氧化物的电影，上述可变电阻（8）是在所有的温度比熔点低FORMED 的金属线层（11）已经形成的形成上述可变电阻（8）的前一样。更优选地，可变电阻器（8）由镨钙锰氧化物，其是由通式FORMED，镨1-X的Ca X MnO 3的，在成膜温度的范围为350℃至进行 500℃至gemäß溅射法。

6. 发明公开

EP0982776A2 ESD protection thyristor with trigger diode 有权
标题翻译： ESD-Schutz晶闸管触发二极管
公开(公告)号：EP0982776A2
公开(公告)日：2000-03-01
申请号：EP99306769.3
申请日：1999-08-25
申请人： SHARP KABUSHIKI KAISHA
发明人： Kawazoe, Hidechika , Aoki, Eiji , Hsu, Sheng Teng , Fujii, Katsumasa
IPC分类号： H01L27/02 , H01L29/74
CPC分类号： H01L27/0262 , H01L27/0248 , H01L27/0259 , H01L29/7412
摘要： An electrostatic discharge protection device according to the present invention is provided at an input or an output of a semiconductor integrated circuit for protecting an internal circuit of the semiconductor integrated circuit from an electrostatic surge flowing into or out of the semiconductor integrated circuit. The electrostatic discharge protection device includes: a thyristor; and a trigger diode for triggering the thyristor with a low voltage. The trigger diode includes: an n-type cathode high impurity concentration region; a p-type anode high impurity concentration region; and an insulator section for electrically insulating a silicide layer formed on a surface of the n-type cathode high impurity concentration region from another silicide layer formed on a surface of the p-type anode high impurity concentration region.
摘要翻译：根据本发明的静电放电保护装置设置在半导体集成电路的输入或输出端，用于保护半导体集成电路的内部电路免受流入或流出半导体集成电路的静电浪涌。静电放电保护装置包括：晶闸管; 以及用于以低电压触发晶闸管的触发二极管。触发二极管包括：n型阴极高杂质浓度区域; p型阳极杂质浓度高的区域; 以及绝缘体部分，用于将形成在n型阴极高杂质浓度区域的表面上的硅化物层与形成在p型阳极高杂质浓度区域的表面上的另一硅化物层电绝缘。

7. 发明授权

EP0982776B1 ESD protection thyristor with trigger diode 有权
标题翻译： ESD与触发二极管保护晶闸管
公开(公告)号：EP0982776B1
公开(公告)日：2008-04-16
申请号：EP99306769.3
申请日：1999-08-25
申请人： Sharp Kabushiki Kaisha
发明人： Kawazoe, Hidechika , Aoki, Eiji , Hsu, Sheng Teng , Fujii, Katsumasa
IPC分类号： H01L27/02 , H01L29/74
CPC分类号： H01L27/0262 , H01L27/0248 , H01L27/0259 , H01L29/7412

8. 发明公开

EP1555700A3 Method for manufacturing a nonvolatile memory device with a variable resistor 审中-公开
标题翻译：一种用于制造非易失性存储器件具有的可变电阻器的方法
公开(公告)号：EP1555700A3
公开(公告)日：2007-10-03
申请号：EP05000519.8
申请日：2005-01-12
申请人： Sharp Kabushiki Kaisha
发明人： Kawazoe, Hidechika , Tamai, Yukio , Shimaoka, Atsushi , Hagiwara, Naoto , Matsushita, Yuji , Nishi, Yuji
IPC分类号： H01L45/00 , H01L29/68 , H01L21/8246 , H01L27/112 , H01L27/06
CPC分类号： H01L45/1675 , G11C13/0007 , G11C13/003 , G11C2213/31 , G11C2213/78 , G11C2213/79 , H01L27/2436 , H01L45/04 , H01L45/1233 , H01L45/147 , H01L45/1625
摘要： In a manufacturing method of a nonvolatile semiconductor memory device including a variable resistive element having a variable resistor (8) made of a perovskite-type metal oxide film, the variable resistor (8) is formed at a temperature which is lower than the melting point of a metal wire layer (11) that has been formed before formation of the variable resistor (8). More preferably, the variable resistor (8) is formed by a praseodymium calcium manganese oxide, which is represented by a general formula, Pr 1-x Ca x MnO 3 , carried out at a film forming temperature in a range from 350°C to 500°C according to a sputtering method.

9. 发明公开

EP1622163A1 Nonvolatile semiconductor memory device and read method 有权转让
标题翻译： NichtflüchtigeHalbleiterspeicheranordnung und Leseverfahren
公开(公告)号：EP1622163A1
公开(公告)日：2006-02-01
申请号：EP05254692.6
申请日：2005-07-27
申请人： SHARP KABUSHIKI KAISHA
发明人： Kawazoe, Hidechika , Tamai, Yukio , Shimaoka, Atsushi , Morimoto, Hidenori , Awaya, Nobuyoshi
IPC分类号： G11C13/00 , G11C16/02
CPC分类号： G11C13/0007 , G11C13/004 , G11C2213/31 , G11C2213/77 , G11C2213/79
摘要： A nonvolatile semiconductor memory device according to the present invention comprises a memory cell selecting circuit for selecting the memory cell from the memory cell array in units of row, column or memory cell; a read voltage application circuit for applying a read voltage to the variable resistor element of the selected memory cells selected by the memory cell selecting circuit; and a read circuit for detecting the amount of the read current flowing in accordance with the resistance value of the variable resistor element with respect to the memory cell to be read of the selected memory cells and reading the information stored in the memory cell to be read; and the read voltage application circuit applies a dummy read voltage having reversed polarity from the read voltage to the variable resistor element of the selected memory cell.
摘要翻译：根据本发明的非易失性半导体存储器件包括存储单元选择电路，用于以行，列或存储单元为单位从存储单元阵列中选择存储单元; 读取电压施加电路，用于对由存储单元选择电路选择的所选存储单元的可变电阻元件施加读取电压; 以及读取电路，用于根据可变电阻器元件的电阻值相对于要选择的存储器单元读取的存储单元检测流过的读取电流的量并读取存储在要读取的存储器单元中的信息 ; 并且读取电压施加电路将具有与读取电压相反的极性的虚拟读取电压施加到所选存储单元的可变电阻器元件。

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