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    • 1. 发明授权
    • Metalorganic vapor phase epitaxial growth of group II-VI semiconductor
materials
    • II-VI族半导体材料的金属有机气相外延生长
    • US4568397A
    • 1986-02-04
    • US649650
    • 1984-09-12
    • William E. HokeRichard TraczewskiPeter J. Lemonias
    • William E. HokeRichard TraczewskiPeter J. Lemonias
    • C30B25/02H01L21/365H01L31/00
    • H01L21/02395C30B25/02C30B29/48H01L21/02398H01L21/02411H01L21/0248H01L21/02562H01L21/0262Y10S148/063Y10S148/064Y10S148/08Y10S148/11
    • A method for growing a Group II-VI epitaxial layer on a substrate, said epitaxial layer having an electron mobility greater than 1.5.times.10.sup.5 cm.sup.2 /V-sec at 77.degree. K. and a carrier concentration less than 4.times.10.sup.15 (cm.sup.-3) is described. The method includes the steps of directing a plurality of vapor flows towards the substrate including a Group II metalorganic vapor having a mole fraction in the range of 3.0.times.10.sup.-4 to 4.5.times.10.sup.-4, a Group VI metalorganic vapor having a mole fraction in the range of 2.9.times.10.sup.-3 to 3.5.times.10.sup.-3 and a Group II elemental metal vapor having a mole fraction in the range of 2.6.times.10.sup.-2 to 3.2.times.10.sup.-2. The source of Group II metal is heated to at least 240.degree. C. while radiant energy is directed toward the reactor vessel to warm the zone of the reactor vessel between the Group II metal source and the substrate to at least 240.degree. C. The directed flows of Group II metalorganic vapor, Group VI metalorganic vapor and Group II metal vapor then chemically react to form the epitaxial layer.
    • 一种用于在衬底上生长II-VI族外延层的方法,所述外延层在77°K具有大于1.5×10 5 cm 2 / V·sec的电子迁移率,并且载流子浓度小于4×10 15(cm -3)) 。 该方法包括以下步骤:将多个蒸气流引向基材,包括摩尔分数在3.0×10 -4至4.5×10 -4范围内的第II族金属有机蒸汽,第VI族金属有机蒸气的摩尔分数在 范围为2.9×10 -3至3.5×10 -3,以及摩尔分数在2.6×10 -2至3.2×10 -2范围内的II族元素金属蒸气。 将II族金属的来源加热至至少240℃,同时将辐射能量指向反应器容器以将第II族金属源和基底之间的反应器容器区域加热至至少240℃。定向 第II族金属有机蒸气,第VI族金属有机蒸气和第II族金属蒸气的流动然后化学反应形成外延层。
    • 2. 发明授权
    • High electron mobility transistor
    • 高电子迁移率晶体管
    • US06489639B1
    • 2002-12-03
    • US09577508
    • 2000-05-24
    • William E. HokePeter J. LemoniasTheodore D. Kennedy
    • William E. HokePeter J. LemoniasTheodore D. Kennedy
    • H01L310328
    • H01L29/66462H01L21/28587H01L29/205H01L29/7785
    • A semiconductor structure, e.g., a high electron mobility transistor structure, is formed by using metamorphic growth and strain compensation. The structure includes a substrate, a graded layer over the substrate, a first donor/barrier layer over the graded layer, and a channel layer over the first donor/barrier layer. The substrate has a substrate lattice constant, and the graded layer has a graded lattice constant. The graded layer has a first lattice constant near a bottom of the graded layer substantially equal to the substrate lattice constant and a second lattice constant near a top of the graded layer different than the first lattice constant. The first donor/barrier layer has a third lattice constant, and the channel layer has a fourth lattice constant. The second lattice constant is intermediate the third and fourth lattice constants.
    • 通过使用变质生长和应变补偿形成半导体结构,例如高电子迁移率晶体管结构。 该结构包括衬底,衬底上的渐变层,梯度层上的第一施主/势垒层,以及在第一施主/阻挡层上的沟道层。 衬底具有衬底晶格常数,并且渐变层具有梯度晶格常数。 渐变层在梯度层的底部附近具有基本上等于衬底晶格常数的第一晶格常数,并且在渐变层的顶部附近的第二晶格常数不同于第一晶格常数。 第一施主/势垒层具有第三晶格常数,沟道层具有第四晶格常数。 第二晶格常数在第三和第四晶格常数之间。
    • 3. 发明授权
    • Gallium nitride devices having low ohmic contact resistance
    • 具有低欧姆接触电阻的氮化镓器件
    • US08772786B2
    • 2014-07-08
    • US13548305
    • 2012-07-13
    • Kamal TabatabaieWilliam E. HokeEduardo M. ChumbesKevin McCarthy
    • Kamal TabatabaieWilliam E. HokeEduardo M. ChumbesKevin McCarthy
    • H01L29/15H01L31/0256
    • H01L29/66462H01L29/0657H01L29/0843H01L29/2003H01L29/201H01L29/7787H01L29/7789
    • A semiconductor structure having mesa structure comprising: a lower semiconductor layer; an upper semiconductor layer having a higher band gap than, and in direct contact with, the lower semiconductor layer to form a two-dimension electron gas (2DEG) region between the upper semiconductor layer. The 2DEG region has outer edges terminating at sidewalls of the mesa. An additional electron donor layer has a band gap higher than the band gap of the lower layer disposed on sidewall portions of the mesa structure and on the region of the 2DEG region terminating at sidewalls of the mesa. An ohmic contact material is disposed on the electron donor layer. In effect, a sideway HEMT is formed with the electron donor layer, the 2DEG region and the ohmic contact material increasing the concentration of electrons (i.e., lowering ohmic contact résistance) all along the contact between the lower semiconductor layer and the electron donor layer.
    • 一种具有台面结构的半导体结构,包括:下半导体层; 上半导体层具有比下半导体层更高的带隙并且与下半导体层直接接触以在上半导体层之间形成二维电子气(2DEG)区。 2DEG区域具有终止于台面侧壁的外边缘。 另外的电子供体层具有高于设置在台面结构的侧壁部分上的下层的带隙和在台面的侧壁处终止的2DEG区域的区域的带隙。 欧姆接触材料设置在电子供体层上。 实际上,沿着下半导体层和电子供体层之间的接触,电子供体层,2DEG区和欧姆接触材料形成侧向HEMT增加电子的浓度(即降低欧姆接触电阻)。
    • 8. 发明申请
    • Gallium Nitride for Liquid Crystal Electrodes
    • 液晶电极用氮化镓
    • US20120299012A1
    • 2012-11-29
    • US13572157
    • 2012-08-10
    • Daniel P. ReslerWilliam E. Hoke
    • Daniel P. ReslerWilliam E. Hoke
    • H01L29/20H01L29/205
    • G02F1/13439H01L29/2003H01L29/7787
    • Described herein is a liquid crystal (LC) device having Gallium Nitride HEMT electrodes. The Gallium Nitride HEMT electrodes can be grown on a variety of substrates, including but not limited to sapphire, silicon carbide, silicon, fused silica (using a calcium flouride buffer layer), and spinel. Also described is a structure provided from GaN HEMT grown on large area silicon substrates and transferred to another substrate with appropriate properties for OPA devices. Such substrates include, but are not limited to sapphire, silicon carbide, silicon, fused silica (using a calcium fluoride buffer layer), and spinel. The GaN HEMT structure includes an AlN interlayer for improving the mobility of the structure.
    • 这里描述的是具有氮化镓HEMT电极的液晶(LC)器件。 氮化镓HEMT电极可以在各种基板上生长,包括但不限于蓝宝石,碳化硅,硅,熔融二氧化硅(使用硅酸钙缓冲层)和尖晶石。 还描述了由在大面积硅衬底上生长的GaN HEMT提供的结构,并将其转移到具有用于OPA器件的适当性质的另一衬底。 这样的基底包括但不限于蓝宝石,碳化硅,硅,熔融二氧化硅(使用氟化钙缓冲层)和尖晶石。 GaN HEMT结构包括用于改善结构的迁移率的AlN夹层。
    • 10. 发明授权
    • Split-channel high electron mobility transistor (HEMT) device
    • 分流通道高电子迁移率晶体管(HEMT)器件
    • US06835969B1
    • 2004-12-28
    • US10606820
    • 2003-06-26
    • Philbert F. MarshColin S. WhelanWilliam E. Hoke
    • Philbert F. MarshColin S. WhelanWilliam E. Hoke
    • H01L29/778
    • H01L29/7784
    • A transistor structure having an gallium arsenide (GaAs) semiconductor substrate; a lattice match layer; an indium aluminum arsenide (InAlAs) barrier layer disposed over the lattice match layer; an InyGa1-yAs lower channel layer disposed on the barrier layer, where y is the mole fraction of In content in the lower channel layer; an InxGa1-xAs upper channel layer disposed on the lower channel layer, where x is the mole fraction of In content in the upper channel layer and where x is different from y; and an InAlAs Schottky layer on the InxGa1-xAs upper channel layer. The lower channel layer has a bandgap greater that the bandgap of the upper channel layer. The lower channel layer has a bulk electron mobility lower than the bulk electron mobility of the upper channel layer where.
    • 具有砷化镓(GaAs)半导体衬底的晶体管结构; 一个格子匹配层; 设置在晶格匹配层上的铟铝砷化物(InAlAs)阻挡层; 设置在阻挡层上的InyGa1-yAs下通道层,其中y是下通道层中In含量的摩尔分数; 设置在下沟道层上的In x Ga 1-x As上沟道层,其中x是上沟道层中In含量的摩尔分数,其中x不同于y; 以及In x Ga 1-x As上沟道层上的InAlAs肖特基层。 下通道层的带隙大于上通道层的带隙。 下沟道层的体电子迁移率低于上沟道层的体电子迁移率。