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1. 发明授权

US07851297B2 Dual workfunction semiconductor device 有权
标题翻译：双功能半导体器件
公开(公告)号：US07851297B2
公开(公告)日：2010-12-14
申请号：US12145413
申请日：2008-06-24
申请人： Stefan Jakschik , Jorge Adrian Kittl , Marcus Johannes Henricus van Dal , Anne Lauwers , Masaaki Niwa
发明人： Stefan Jakschik , Jorge Adrian Kittl , Marcus Johannes Henricus van Dal , Anne Lauwers , Masaaki Niwa
IPC分类号： H01L21/8238
CPC分类号： H01L21/823835 , H01L21/823842 , H01L21/823871
摘要： A dual workfunction semiconductor device which comprises a first and second control electrode comprising a metal-semiconductor compound, e.g. a silicide or a germanide, and a dual workfunction semiconductor device thus obtained are disclosed. In one aspect, the method comprises forming a blocking region for preventing diffusion of metal from the metal-semiconductor compound of the first control electrode to the metal-semiconductor compound of the second control electrode, the blocking region being formed at a location where an interface between the first and second control electrodes is to be formed or is formed. By preventing metal to diffuse from the one to the other control electrode the constitution of the metal-semiconductor compounds of the first and second control electrodes may remain substantially unchanged during e.g. thermal steps in further processing of the device.
摘要翻译：一种双功能半导体器件，其包括第一和第二控制电极，所述第一和第二控制电极包括金属 - 半导体化合物，例如，硅化物或锗化物，以及由此获得的双功能半导体器件。一方面，该方法包括形成用于防止金属从第一控制电极的金属半导体化合物扩散到第二控制电极的金属半导体化合物的阻挡区域，该阻挡区域形成在界面在第一和第二控制电极之间形成或形成。通过防止金属从一个控制电极扩散到另一个控制电极，第一和第二控制电极的金属 - 半导体化合物的结构在例如电极中保持基本不变。进一步处理设备的热步骤。

2. 发明申请

US20090020821A1 DUAL WORKFUNCTION SEMICONDUCTOR DEVICE 有权
标题翻译：双功能半导体器件
公开(公告)号：US20090020821A1
公开(公告)日：2009-01-22
申请号：US12145413
申请日：2008-06-24
申请人： Stefan Jakschik , Jorge Adrian Kittl , Marcus Johannes Henricus van Dal , Anne Lauwers , Masaaki Niwa
发明人： Stefan Jakschik , Jorge Adrian Kittl , Marcus Johannes Henricus van Dal , Anne Lauwers , Masaaki Niwa
IPC分类号： H01L21/8238 , H01L27/092
CPC分类号： H01L21/823835 , H01L21/823842 , H01L21/823871
摘要： A dual workfunction semiconductor device which comprises a first and second control electrode comprising a metal-semiconductor compound, e.g. a silicide or a germanide, and a dual workfunction semiconductor device thus obtained are disclosed. In one aspect, the method comprises forming a blocking region for preventing diffusion of metal from the metal-semiconductor compound of the first control electrode to the metal-semiconductor compound of the second control electrode, the blocking region being formed at a location where an interface between the first and second control electrodes is to be formed or is formed. By preventing metal to diffuse from the one to the other control electrode the constitution of the metal-semiconductor compounds of the first and second control electrodes may remain substantially unchanged during e.g. thermal steps in further processing of the device.
摘要翻译：一种双功能半导体器件，其包括第一和第二控制电极，所述第一和第二控制电极包括金属 - 半导体化合物，例如，硅化物或锗化物，以及由此获得的双功能半导体器件。一方面，该方法包括形成用于防止金属从第一控制电极的金属半导体化合物扩散到第二控制电极的金属半导体化合物的阻挡区域，该阻挡区域形成在界面在第一和第二控制电极之间形成或形成。通过防止金属从一个控制电极扩散到另一个控制电极，第一和第二控制电极的金属 - 半导体化合物的结构在例如电极中保持基本不变。进一步处理设备的热步骤。

3. 发明申请

US20070111547A1 Method for producing a semiconductor structure 审中-公开
标题翻译：半导体结构的制造方法
公开(公告)号：US20070111547A1
公开(公告)日：2007-05-17
申请号：US11582656
申请日：2006-10-18
申请人： Thomas Hecht , Stefan Jakschik , Christian Kapteyn
发明人： Thomas Hecht , Stefan Jakschik , Christian Kapteyn
IPC分类号： H01L21/31
CPC分类号： H01L21/31111 , H01L21/28202 , H01L21/823857 , H01L28/40 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/66181 , H01L29/78
摘要： In a method for producing a semiconductor structure a substrate is provided, a dielectric layer comprising at least one metal oxide is formed on the substrate, and a nitrided layer is formed from the dielectric layer. The nitrided layer comprises either at least one metal nitride corresponding to the metal oxide or a metal oxynitride. The nitrided layer is removed selectively with respect to the dielectric layer in a predetermined etching medium.
摘要翻译：在制造半导体结构体的方法中，提供了基板，在基板上形成包含至少一种金属氧化物的电介质层，并且从电介质层形成氮化层。氮化层包括至少一种对应于金属氧化物的金属氮化物或金属氮氧化物。在预定的蚀刻介质中相对于电介质层选择性地去除氮化层。

4. 发明申请

US20070059893A1 Stacked capacitor and method for producing stacked capacitors for dynamic memory cells 失效
标题翻译：叠层电容器和用于制造用于动态存储单元的叠层电容器的方法
公开(公告)号：US20070059893A1
公开(公告)日：2007-03-15
申请号：US11518504
申请日：2006-09-07
申请人： Stephan Kudelka , Peter Moll , Stefan Jakschik , Odo Wunnicke
发明人： Stephan Kudelka , Peter Moll , Stefan Jakschik , Odo Wunnicke
IPC分类号： H01L21/336
CPC分类号： H01L28/90 , H01L27/10814 , H01L27/10852
摘要： A method produces stacked capacitors for dynamic memory cells, in which a number of trenches (48) are formed in the masking layer (40), each trench (48) being arranged above a respective contact plug (26) and extending from the top (42) of the masking layer (40) to the contact plugs (26). A conductive layer (50) covers the side walls (49) of the trenches (48) and the contact plugs (26) in order to form a first electrode (60) of a stacked capacitor (12). In an upper region (63), which is remote from the contact stack (26), the conductive layer (50) is replaced by an insulating layer, so that it is not possible for a short circuit to arise in the event of any adhesion between adjacent electrodes.
摘要翻译：一种方法产生用于动态存储单元的堆叠电容器，其中在掩模层（40）中形成有多个沟槽（48），每个沟槽（48）布置在相应的接触插塞（26）的上方并从顶部屏蔽层（40）的至少部分（42）连接到接触插塞（26）。为了形成叠层电容器（12）的第一电极（60），导电层（50）覆盖沟槽（48）的侧壁（49）和接触插塞（26）。在远离接触堆叠（26）的上部区域（63）中，导电层（50）由绝缘层代替，使得在任何粘附的情况下不可能出现短路在相邻电极之间。

5. 发明授权

US07176514B2 Method and configuration for reinforcement of a dielectric layer at defects by self-aligning and self-limiting electrochemical conversion of a substrate material 有权
标题翻译：通过衬底材料的自对准和自限制电化学转换来加强缺陷处的介电层的方法和结构
公开(公告)号：US07176514B2
公开(公告)日：2007-02-13
申请号：US10413812
申请日：2003-04-15
申请人： Thomas Hecht , Albert Birner , Harald Seidl , Uwe Schröder , Stefan Jakschik , Martin Gutsche
发明人： Thomas Hecht , Albert Birner , Harald Seidl , Uwe Schröder , Stefan Jakschik , Martin Gutsche
IPC分类号： H01L27/108 , H01L21/76
CPC分类号： H01L21/02238 , C25D11/02 , C25D11/32 , H01L21/02258 , H01L21/31675 , H01L21/31687 , H01L27/1085
摘要： A method for producing a dielectric layer on a substrate made of a conductive substrate material includes reducing a leakage current that flows through defects of the dielectric layer at least by a self-aligning and self-limiting electrochemical conversion of the conductive substrate material into a nonconductive substrate follow-up material in sections of the substrate that are adjacent to the defects. Also provided is a configuration including a dielectric layer with defects, a substrate made of a conductive substrate material, and reinforcement regions made of the nonconductive substrate follow-up material in sections adjacent to the defects.
摘要翻译：用于在由导电基板材料制成的基板上制造介电层的方法包括至少通过导电基板材料的自对准和自限制电化学转换为不导电的方式减少流过电介质层的缺陷的漏电流衬底跟随材料在与缺陷相邻的衬底的部分中。还提供了包括具有缺陷的电介质层，由导电基板材料制成的基板以及由与该缺陷相邻的部分中的非导电性基板追随材料制成的加强区域的结构。

6. 发明申请

US20060234463A1 Method for fabricating an electrical component 有权
标题翻译：电气部件的制造方法
公开(公告)号：US20060234463A1
公开(公告)日：2006-10-19
申请号：US11399811
申请日：2006-04-07
申请人： Alejandro Avellan , Thomas Hecht , Stefan Jakschik , Uwe Schroeder
发明人： Alejandro Avellan , Thomas Hecht , Stefan Jakschik , Uwe Schroeder
IPC分类号： H01L21/20 , H01L21/8242 , H01L21/31 , H01L21/469
CPC分类号： H01L28/65 , H01L27/1087 , H01L29/66181
摘要： An electrical component, such as a DRAM semiconductor memory or a field-effect transistor is fabricated. At least one capacitor having a dielectric (130) and at least one connection electrode (120, 140) are fabricated. To enable the capacitors fabricated to have optimum storage properties even for very small capacitor structures, the dielectric (130) or the connection electrode (120, 140) are formed in such a manner that transient polarization effects are prevented or at least reduced.
摘要翻译：制造诸如DRAM半导体存储器或场效应晶体管的电气部件。制造具有电介质（130）和至少一个连接电极（120,140）的至少一个电容器。为了使得制造的电容器即使对于非常小的电容器结构也具有最佳的存储特性，电介质（130）或连接电极（120,140）形成为使得瞬态极化效应被防止或至少减小。

7. 发明授权

US08344438B2 Electrode of an integrated circuit 有权
标题翻译：集成电路的电极
公开(公告)号：US08344438B2
公开(公告)日：2013-01-01
申请号：US12023321
申请日：2008-01-31
申请人： Uwe Schroeder , Stefan Jakschik , Johannes Heitmann , Tim Boescke , Annette Saenger
发明人： Uwe Schroeder , Stefan Jakschik , Johannes Heitmann , Tim Boescke , Annette Saenger
IPC分类号： H01L27/108 , H01L29/94 , H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L28/65
摘要： The present invention refers to an electrode comprising a first metallic layer and a compound comprising at least one of a nitride, oxide, and oxynitride of a second metallic material.
摘要翻译：本发明涉及包含第一金属层和包含第二金属材料的氮化物，氧化物和氧氮化物中的至少一种的化合物的电极。

8. 发明授权

US08138538B2 Interconnect structure for semiconductor devices 有权
标题翻译：半导体器件的互连结构
公开(公告)号：US08138538B2
公开(公告)日：2012-03-20
申请号：US12249060
申请日：2008-10-10
申请人： Hans-Peter Moll , Gouri Sankar Kar , Martin Popp , Lars Heineck , Peter Lahnor , Arnd Scholz , Stefan Jakschik , Wolfgang Roesner , Gerhard Enders , Werner Graf , Peter Baars , Klaus Muemmler , Bernd Hintze , Andrei Josiek
发明人： Hans-Peter Moll , Gouri Sankar Kar , Martin Popp , Lars Heineck , Peter Lahnor , Arnd Scholz , Stefan Jakschik , Wolfgang Roesner , Gerhard Enders , Werner Graf , Peter Baars , Klaus Muemmler , Bernd Hintze , Andrei Josiek
IPC分类号： H01L27/108
CPC分类号： H01L27/10891 , H01L27/10823 , H01L27/10876 , H01L27/10885
摘要： One embodiment relates to an integrated circuit formed on a semiconductor body having interconnect between source/drain regions of a first and second transistor. The interconnect includes a metal body arranged underneath the surface of the semiconductor body. A contact element establishes electrical contact between the metal body and the source/drain regions of the first and second transistor. The contact element extends along a connecting path between the source/drain regions of the first and second transistors. Other methods, devices, and systems are also disclosed.
摘要翻译：一个实施例涉及形成在半导体主体上的集成电路，其具有在第一和第二晶体管的源/漏区之间的互连。互连件包括布置在半导体本体表面下方的金属体。接触元件建立金属体与第一和第二晶体管的源/漏区之间的电接触。接触元件沿着第一和第二晶体管的源极/漏极区域之间的连接路径延伸。还公开了其它方法，装置和系统。

9. 发明申请

US20080197428A1 Gate Electrode Structure, MOS Field Effect Transistors and Methods of Manufacturing the Same 有权
标题翻译：栅电极结构，MOS场效应晶体管及其制造方法
公开(公告)号：US20080197428A1
公开(公告)日：2008-08-21
申请号：US11675460
申请日：2007-02-15
申请人： Stefan Jakschik , Thomas Hecht
发明人： Stefan Jakschik , Thomas Hecht
IPC分类号： H01L29/78 , H01L21/4763
CPC分类号： H01L21/28026 , H01L21/28061 , H01L21/823842 , H01L29/42372 , H01L29/4925 , H01L29/517 , H01L29/7833 , H01L29/7845
摘要： A gate electrode structure comprises at least one bi-layer, wherein each bi-layer comprises a plating film and a stress amplifier film. The plating film includes a poly-crystalline material. The stress amplifier film determines the crystallization result of the poly-crystalline material, wherein a mechanical stress induced through the plating layer is amplified. Tensile or compressive strain may be induced in a crystalline substrate. Electron or hole mobility may be increased and on-resistance characteristics of a MOS field effect transistor may be improved.
摘要翻译：栅电极结构包括至少一个双层，其中每个双层包括镀膜和应力放大膜。镀膜包括多晶材料。应力放大器膜确定多晶材料的结晶结果，其中通过镀层诱导的机械应力被放大。可能在结晶底物中诱导拉伸或压缩应变。可以增加电子或空穴迁移率，并可提高MOS场效应晶体管的导通电阻特性。

10. 发明授权

US07268037B2 Method for fabricating microchips using metal oxide masks 有权
标题翻译：使用金属氧化物掩模制造微芯片的方法
公开(公告)号：US07268037B2
公开(公告)日：2007-09-11
申请号：US11040091
申请日：2005-01-24
申请人： Stefan Jakschik , Thomas Hecht , Uwe Schröder , Matthias Goldbach
发明人： Stefan Jakschik , Thomas Hecht , Uwe Schröder , Matthias Goldbach
IPC分类号： H01L21/8242
CPC分类号： H01L27/1087 , H01L21/31111 , H01L21/3141 , H01L21/31616 , H01L29/66181
摘要： A process for modifying sections of a semiconductor includes covering the sections to remain free of doping with a metal oxide, e.g., aluminum oxide. Then, the semiconductor is doped, for example, from the gas phase, in those sections that are not covered by the aluminum oxide. Finally, the aluminum oxide is selectively removed again, for example using hot phosphoric acid. Sections of the semiconductor surface which are formed from silicon, silicon oxide or silicon nitride remain in place on the wafer.
摘要翻译：用于修改半导体部分的方法包括覆盖这些部分以保持不掺杂金属氧化物，例如氧化铝。然后，在未被氧化铝覆盖的那些部分中，例如从气相掺杂半导体。最后，再次选择性地除去氧化铝，例如使用热磷酸。由硅，氧化硅或氮化硅形成的半导体表面的部分保留在晶片上。

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