专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07851297B2 Dual workfunction semiconductor device 有权
标题翻译：双功能半导体器件
公开(公告)号：US07851297B2
公开(公告)日：2010-12-14
申请号：US12145413
申请日：2008-06-24
申请人： Stefan Jakschik , Jorge Adrian Kittl , Marcus Johannes Henricus van Dal , Anne Lauwers , Masaaki Niwa
发明人： Stefan Jakschik , Jorge Adrian Kittl , Marcus Johannes Henricus van Dal , Anne Lauwers , Masaaki Niwa
IPC分类号： H01L21/8238
CPC分类号： H01L21/823835 , H01L21/823842 , H01L21/823871
摘要： A dual workfunction semiconductor device which comprises a first and second control electrode comprising a metal-semiconductor compound, e.g. a silicide or a germanide, and a dual workfunction semiconductor device thus obtained are disclosed. In one aspect, the method comprises forming a blocking region for preventing diffusion of metal from the metal-semiconductor compound of the first control electrode to the metal-semiconductor compound of the second control electrode, the blocking region being formed at a location where an interface between the first and second control electrodes is to be formed or is formed. By preventing metal to diffuse from the one to the other control electrode the constitution of the metal-semiconductor compounds of the first and second control electrodes may remain substantially unchanged during e.g. thermal steps in further processing of the device.
摘要翻译：一种双功能半导体器件，其包括第一和第二控制电极，所述第一和第二控制电极包括金属 - 半导体化合物，例如，硅化物或锗化物，以及由此获得的双功能半导体器件。一方面，该方法包括形成用于防止金属从第一控制电极的金属半导体化合物扩散到第二控制电极的金属半导体化合物的阻挡区域，该阻挡区域形成在界面在第一和第二控制电极之间形成或形成。通过防止金属从一个控制电极扩散到另一个控制电极，第一和第二控制电极的金属 - 半导体化合物的结构在例如电极中保持基本不变。进一步处理设备的热步骤。

2. 发明申请

US20090020821A1 DUAL WORKFUNCTION SEMICONDUCTOR DEVICE 有权
标题翻译：双功能半导体器件
公开(公告)号：US20090020821A1
公开(公告)日：2009-01-22
申请号：US12145413
申请日：2008-06-24
申请人： Stefan Jakschik , Jorge Adrian Kittl , Marcus Johannes Henricus van Dal , Anne Lauwers , Masaaki Niwa
发明人： Stefan Jakschik , Jorge Adrian Kittl , Marcus Johannes Henricus van Dal , Anne Lauwers , Masaaki Niwa
IPC分类号： H01L21/8238 , H01L27/092
CPC分类号： H01L21/823835 , H01L21/823842 , H01L21/823871
摘要： A dual workfunction semiconductor device which comprises a first and second control electrode comprising a metal-semiconductor compound, e.g. a silicide or a germanide, and a dual workfunction semiconductor device thus obtained are disclosed. In one aspect, the method comprises forming a blocking region for preventing diffusion of metal from the metal-semiconductor compound of the first control electrode to the metal-semiconductor compound of the second control electrode, the blocking region being formed at a location where an interface between the first and second control electrodes is to be formed or is formed. By preventing metal to diffuse from the one to the other control electrode the constitution of the metal-semiconductor compounds of the first and second control electrodes may remain substantially unchanged during e.g. thermal steps in further processing of the device.
摘要翻译：一种双功能半导体器件，其包括第一和第二控制电极，所述第一和第二控制电极包括金属 - 半导体化合物，例如，硅化物或锗化物，以及由此获得的双功能半导体器件。一方面，该方法包括形成用于防止金属从第一控制电极的金属半导体化合物扩散到第二控制电极的金属半导体化合物的阻挡区域，该阻挡区域形成在界面在第一和第二控制电极之间形成或形成。通过防止金属从一个控制电极扩散到另一个控制电极，第一和第二控制电极的金属 - 半导体化合物的结构在例如电极中保持基本不变。进一步处理设备的热步骤。

3. 发明授权

US07491635B2 Method for forming a fully silicided gate and devices obtained thereof 有权
标题翻译：用于形成全硅化物栅的方法及其获得的器件
公开(公告)号：US07491635B2
公开(公告)日：2009-02-17
申请号：US11484439
申请日：2006-07-11
申请人： Jorge Adrian Kittl , Anne Lauwers , Anabela Veloso , Anil Kottantharyil , Marcus Johannes Henricus Van Dal
发明人： Jorge Adrian Kittl , Anne Lauwers , Anabela Veloso , Anil Kottantharyil , Marcus Johannes Henricus Van Dal
IPC分类号： H01L21/3205
CPC分类号： H01L21/28097 , H01L29/4908 , H01L29/4975 , H01L29/66545 , H01L29/78
摘要： A method for manufacturing a MOSFET device with a fully silicided (FUSI) gate is described. This method may be used to prevent formation of shorts between the FUSI gate and a contact to a source and/or a drain region. In particular, the method discloses the formation of an expansion volume above a gate dielectric. The volume is designed to substantially contain the fully silicided gate.
摘要翻译：描述了一种用于制造具有完全硅化（FUSI）栅极的MOSFET器件的方法。该方法可以用于防止在FUSI栅极和与源极和/或漏极区域的接触之间形成短路。特别地，该方法公开了在栅极电介质上形成膨胀体积。体积被设计为基本上包含完全硅化的栅极。

4. 发明授权

US07759748B2 Semiconductor device with reduced diffusion of workfunction modulating element 有权
标题翻译：减少功函调制元件扩散的半导体器件
公开(公告)号：US07759748B2
公开(公告)日：2010-07-20
申请号：US11977079
申请日：2007-10-23
申请人： HongYu Yu , Shou-Zen Chang , Jorge Adrian Kittl , Anne Lauwers , Anabela Veloso
发明人： HongYu Yu , Shou-Zen Chang , Jorge Adrian Kittl , Anne Lauwers , Anabela Veloso
IPC分类号： H01L29/58
CPC分类号： H01L21/28052 , H01L21/28194 , H01L21/31155 , H01L21/32155 , H01L29/4975 , H01L29/513 , H01L29/517 , H01L29/665 , H01L29/785
摘要： A semiconductor device is disclosed that comprises a fully silicided electrode formed of an alloy of a semiconductor material and a metal, a workfunction modulating element for modulating a workfunction of the alloy, and a dielectric in contact with the fully silicided electrode. At least a part of the dielectric which is in direct contact with the fully silicided electrode comprises a stopping material for substantially preventing the workfunction modulating element from implantation into and/or diffusing towards the dielectric. A method for forming such a semiconductor device is also disclosed.
摘要翻译：公开了一种半导体器件，其包括由半导体材料和金属的合金形成的完全硅化电极，用于调节合金的功函数的功函数调制元件和与完全硅化物电极接触的电介质。与完全硅化电极直接接触的电介质的至少一部分包括用于基本上防止功函数调制元件注入和/或扩散到电介质的止动材料。还公开了一种用于形成这种半导体器件的方法。

5. 发明申请

US20080136030A1 Semiconductor device comprising a doped metal comprising main electrode 审中-公开
标题翻译：半导体器件包括包含主电极的掺杂金属
公开(公告)号：US20080136030A1
公开(公告)日：2008-06-12
申请号：US11977027
申请日：2007-10-23
申请人： Shou-Zen Chang , Jorge Adrian Kittl , HongYu Yu , Anne Lauwers , Anabela Veloso
发明人： Shou-Zen Chang , Jorge Adrian Kittl , HongYu Yu , Anne Lauwers , Anabela Veloso
IPC分类号： H01L23/48 , H01L21/425
CPC分类号： H01L21/28097 , H01L21/265 , H01L21/26506 , H01L21/2807 , H01L21/32155 , H01L21/823835 , H01L21/823842 , H01L29/4975 , H01L29/517 , H01L29/518 , H01L29/665 , H01L29/66545 , H01L29/785 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device is provided comprising a main electrode (4) and a dielectric (3) in contact with the main electrode (4), the main electrode (4) comprising a material having a work function and a work function modulating element (6) for modulating the work function of the material of the main electrode (4) towards a predetermined value. The main electrode (4) furthermore comprises a diffusion preventing dopant element (5) for preventing diffusion of the work function modulating element (6) towards and/or into the dielectric (3). Methods for forming such a semiconductor device are also described.
摘要翻译：提供一种半导体器件，包括与主电极（4）接触的主电极（4）和电介质（3），主电极（4）包括具有功函数的材料和功函数调制元件（6）用于将主电极（4）的材料的功函数调节到预定值。主电极（4）还包括用于防止功函数调制元件（6）向电介质（3）和/或电介质（3）扩散的防扩散掺杂剂元件（5）。还描述了形成这种半导体器件的方法。

6. 发明授权

US08183137B2 Use of dopants to provide low defect gate full silicidation 有权
标题翻译：使用掺杂剂提供低缺陷门全硅化
公开(公告)号：US08183137B2
公开(公告)日：2012-05-22
申请号：US11752424
申请日：2007-05-23
申请人： Mark Visokay , Jorge Adrian Kittl
发明人： Mark Visokay , Jorge Adrian Kittl
IPC分类号： H01L21/22 , H01L21/38
CPC分类号： H01L21/823835 , H01L21/28097 , H01L21/823864 , H01L29/4975 , H01L29/517 , H01L29/66545 , H01L29/6656 , H01L29/6659 , H01L29/7833
摘要： The disclosure provides a semiconductor device and method of manufacture therefore. The method for manufacturing the semiconductor device, in one embodiment, includes forming a layer of gate electrode material over a layer of gate dielectric material, wherein the layer of gate dielectric material is positioned over a substrate (210). This method further includes patterning the layer of gate electrode material and the layer of gate dielectric material into an NMOS gate structure (230), wherein the NMOS gate structure (230) includes an NMOS gate dielectric (240) and an NMOS gate electrode (250). This method further includes forming n-type source/drain regions (710) within the substrate (210) proximate the NMOS gate structure (230), and siliciding the NMOS gate electrode (250) to form a silicided gate electrode (1110, 1210). This method additionally includes placing a p-type dopant within the layer of gate electrode material or the NMOS gate electrode (250) prior to or concurrently with siliciding.
摘要翻译：因此，本公开提供了一种半导体器件及其制造方法。在一个实施例中，用于制造半导体器件的方法包括在栅极电介质材料层上形成栅电极层，其中栅极电介质材料层位于衬底（210）上方。该方法还包括将栅电极材料层和栅介电材料层图案化成NMOS栅极结构（230），其中NMOS栅极结构（230）包括NMOS栅极电介质（240）和NMOS栅电极（250））。该方法还包括在靠近NMOS栅极结构（230）的基底（210）内形成n型源极/漏极区（710），以及硅化NMOS栅电极（250）以形成硅化栅电极（1110,1210）。该方法还包括在硅化之前或同时将p型掺杂剂放置在栅电极材料或NMOS栅电极（250）的层内。

7. 发明授权

US07989344B2 Method for forming a nickelsilicide FUSI gate 有权
标题翻译：形成镍硅化物FUSI浇口的方法
公开(公告)号：US07989344B2
公开(公告)日：2011-08-02
申请号：US12037486
申请日：2008-02-26
申请人： Jorge Adrian Kittl
发明人： Jorge Adrian Kittl
IPC分类号： H01L21/44
CPC分类号： H01L21/28097 , H01L29/4975 , H01L29/517 , H01L29/665 , H01L29/66507 , H01L29/6659 , H01L29/7833
摘要： Ni3Si2 FUSI gates can be formed inter alia by further reaction of NiSi/Ni2Si gate stacks. Ni3Si2 behaves similarly to NiSi in terms of work function values, and of modulation with dopants on SiO2, in contrast to Ni-rich silicides which have significantly higher work function values on HfSixOy and negligible work function shifts with dopants on SiO2. Formation of Ni3Si2 can applied for applications targeting NiSi FUSI gates, thereby expanding the process window without changing the electrical properties of the FUSI gate.
摘要翻译：可以通过NiSi / Ni2Si栅极堆叠的进一步反应而形成Ni 3 Si 2 FUSI栅极。 Ni3Si2在工作函数值方面与NiSi相似，与SiO 2上掺杂剂的调制方式相似，与在HfSixOy上具有显着更高的功函数的富Ni硅化物相比，SiO 2上的掺杂剂可忽略不计。 Ni3Si2的形成可以应用于NiSi FUSI栅极的应用，从而扩大工艺窗口而不改变FUSI栅极的电性能。

8. 发明授权

US08344460B2 Method for forming a nickelsilicide FUSI gate 有权
标题翻译：形成镍硅FUSI浇口的方法
公开(公告)号：US08344460B2
公开(公告)日：2013-01-01
申请号：US13194539
申请日：2011-07-29
申请人： Jorge Adrian Kittl
发明人： Jorge Adrian Kittl
IPC分类号： H01L29/78
CPC分类号： H01L21/28097 , H01L29/4975 , H01L29/517 , H01L29/665 , H01L29/66507 , H01L29/6659 , H01L29/7833
摘要： Ni3Si2 FUSI gates can be formed inter alia by further reaction of NiSi/Ni2Si gate stacks. Ni3Si2 behaves similarly to NiSi in terms of work function values, and of modulation with dopants on SiO2, in contrast to Ni-rich silicides which have significantly higher work function values on HfSixOy and negligible work function shifts with dopants on SiO2. Formation of Ni3Si2 can applied for applications targeting NiSi FUSI gates, thereby expanding the process window without changing the electrical properties of the FUSI gate.
摘要翻译：可以通过NiSi / Ni2Si栅极堆叠的进一步反应而形成Ni 3 Si 2 FUSI栅极。 Ni3Si2在工作函数值方面与NiSi相似，与SiO 2上掺杂剂的调制方式相似，与在HfSixOy上具有显着更高的功函数的富Ni硅化物相比，SiO 2上的掺杂剂可忽略不计。 Ni3Si2的形成可以应用于NiSi FUSI栅极的应用，从而扩大工艺窗口而不改变FUSI栅极的电性能。

9. 发明授权

US06777300B2 Method to improve silicide formation on polysilicon 有权
标题翻译：改善多晶硅硅化物形成的方法
公开(公告)号：US06777300B2
公开(公告)日：2004-08-17
申请号：US10023825
申请日：2001-12-19
申请人： Jorge Adrian Kittl , Qi-Zhong Hong
发明人： Jorge Adrian Kittl , Qi-Zhong Hong
IPC分类号： H01L21336
CPC分类号： H01L29/6659 , H01L21/2652 , H01L21/32139
摘要： A polysilicon layer of a gate structure is covered by an implant blocking layer (e.g., silicon nitride). The implant blocking layer blocks introduction of implanted dopants while implanting an initial dose of first conductivity type dopant (e.g., for drain extension regions). The implant blocking layer is then removed and an additional dose of first conductivity type dopant in implanted to form the main source/drain regions. Then, metal is deposited and reacted to form a conductive silicide.
摘要翻译：栅极结构的多晶硅层被注入阻挡层（例如，氮化硅）覆盖。注入阻挡层在植入初始剂量的第一导电类型掺杂剂（例如，用于漏极延伸区域）的同时阻止注入的掺杂剂的引入。然后移除注入阻挡层，并且在注入中附加剂量的第一导电型掺杂剂以形成主源/漏区。然后，沉积金属并反应以形成导电硅化物。

10. 发明申请

US20120018784A1 Method for Forming a Nickelsilicide FUSI Gate 有权
标题翻译：形成硅化镓FUSI门的方法
公开(公告)号：US20120018784A1
公开(公告)日：2012-01-26
申请号：US13194539
申请日：2011-07-29
申请人： Jorge Adrian Kittl
发明人： Jorge Adrian Kittl
IPC分类号： H01L29/78
CPC分类号： H01L21/28097 , H01L29/4975 , H01L29/517 , H01L29/665 , H01L29/66507 , H01L29/6659 , H01L29/7833
摘要： Ni3Si2 FUSI gates can be formed inter alia by further reaction of NiSi/Ni2Si gate stacks. Ni3Si2 behaves similarly to NiSi in terms of work function values, and of modulation with dopants on SiO2, in contrast to Ni-rich silicides which have significantly higher work function values on HfSixOy and negligible work function shifts with dopants on SiO2. Formation of Ni3Si2 can applied for applications targeting NiSi FUSI gates, thereby expanding the process window without changing the electrical properties of the FUSI gate.
摘要翻译：可以通过NiSi / Ni2Si栅极堆叠的进一步反应而形成Ni 3 Si 2 FUSI栅极。 Ni3Si2在工作函数值方面与NiSi相似，与SiO 2上掺杂剂的调制方式相似，与在HfSixOy上具有显着更高的功函数的富Ni硅化物相比，SiO 2上的掺杂剂可忽略不计。 Ni3Si2的形成可以应用于NiSi FUSI栅极的应用，从而扩大工艺窗口而不改变FUSI栅极的电性能。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式