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    • 2. 发明授权
    • Method of forming dual damascene interconnection using low-k dielectric material
    • 使用低k介电材料形成双镶嵌互连的方法
    • US07022600B2
    • 2006-04-04
    • US10437806
    • 2003-05-14
    • Jae-Hak KimSoo-Geun LeeKi-Kwan ParkKyoung-Woo Lee
    • Jae-Hak KimSoo-Geun LeeKi-Kwan ParkKyoung-Woo Lee
    • H01L21/475
    • H01L21/76811H01L21/76808H01L21/76813
    • In order to avoid a faulty pattern resulting from a photoresist tail being formed due to a step difference of an upper hard mask layer when a dual hard mask layer is used, a planarization layer is formed following patterning of the upper hard mask layer. In this manner, a photoresist pattern is formed without the creation of a photoresist tail. Alternatively, a single hard mask layer and a planarization layer are substituted for the dual lower hard mask layer and an upper hard mask layer, respectively. In this manner, it is therefore possible to form a photoresist pattern without a photoresist tail being formed during photolithographic processes. In order to prevent formation of a facet, the planarization layer is thickly formed or, alternatively, the hard mask layer is etched using the photoresist pattern.
    • 为了避免当使用双硬掩模层时由于上部硬掩模层的阶差而形成的光致抗蚀剂尾部产生的故障图案,在上部硬掩模层的图案化之后形成平坦化层。 以这种方式,形成光致抗蚀剂图案而不产生光致抗蚀剂尾部。 或者,单个硬掩模层和平坦化层分别代替双下硬掩模层和上硬掩模层。 以这种方式,因此可以在光刻工艺期间形成光致抗蚀剂图案而不形成光致抗蚀剂尾部。 为了防止小面的形成,平坦化层被厚地形成,或者使用光致抗蚀剂图案蚀刻硬掩模层。
    • 3. 发明授权
    • Method for forming a dual damascene wiring pattern in a semiconductor device
    • 在半导体器件中形成双镶嵌布线图案的方法
    • US06855629B2
    • 2005-02-15
    • US10437529
    • 2003-05-14
    • Jae-Hak KimSoo-Geun LeeWan-Jae ParkKyoung-Woo Lee
    • Jae-Hak KimSoo-Geun LeeWan-Jae ParkKyoung-Woo Lee
    • H01L21/28H01L21/768H01L21/4763
    • H01L21/76808
    • In a method for forming a dual damascene wiring pattern, an etch stop film and an interlayer dielectric film comprising an SiOC:H group material are formed on a substrate having an electrical connection layer formed thereon. An anti-reflection layer is formed on the interlayer dielectric film. A primary opening is formed by etching the anti-reflection layer and the interlayer dielectric film to expose a surface of the etch stop film. A sacrificial film is formed comprising a low dielectric constant material in the primary opening and on the anti-reflection layer. A trench photoresist pattern having a width larger than that of the primary opening is formed on the sacrificial film after plasma-processing the sacrificial film. The sacrificial film, the anti-reflection layer and the interlayer dielectric film are sequentially etched using the trench photoresist pattern as an etch mask so as to form a secondary opening of a trench shape, and the trench photoresist pattern is removed, said secondary opening extending from an upper portion of the primary opening. The sacrificial film remaining is removed, the exposed etch stop film and anti-reflection layer are removed, the primary and secondary openings are filled with metal so as to be electrically coupled with the electrical connection layer. In this manner, damage to the etch stop layer is mitigated or eliminated during processing.
    • 在形成双镶嵌布线图案的方法中,在其上形成有电连接层的基板上形成蚀刻停止膜和包含SiOC:H基材料的层间电介质膜。 在层间电介质膜上形成防反射层。 通过蚀刻抗反射层和层间电介质膜形成初级开口以暴露蚀刻停止膜的表面。 在初级开口和抗反射层中形成包括低介电常数材料的牺牲膜。 在等离子体处理牺牲膜之后,在牺牲膜上形成具有大于初级开口的宽度的沟槽光致抗蚀剂图案。 使用沟槽光致抗蚀剂图案作为蚀刻掩模,依次蚀刻牺牲膜,抗反射层和层间电介质膜,以形成沟槽形状的次级开口,并移除沟槽光致抗蚀剂图案,所述次级开口延伸 从主开口的上部。 去除残留的牺牲膜,去除暴露的蚀刻停止膜和抗反射层,用金属填充初级和次级开口以与电连接层电耦合。 以这种方式,在处理期间减轻或消除对蚀刻停止层的损伤。
    • 4. 发明授权
    • Inter-metal dielectric patterns and method of forming the same
    • 金属间电介质图案及其形成方法
    • US06849536B2
    • 2005-02-01
    • US10404210
    • 2003-04-01
    • Soo-Geun LeeJu-Hyuk ChungIl-Goo KimKyoung-Woo LeeWan-Jae ParkJae-Hak Kim
    • Soo-Geun LeeJu-Hyuk ChungIl-Goo KimKyoung-Woo LeeWan-Jae ParkJae-Hak Kim
    • H01L21/28H01L21/316H01L21/768H01L21/4762
    • H01L21/76831H01L21/316H01L21/31612H01L21/31629H01L21/31633H01L21/31695H01L21/76808H01L21/76835H01L2221/1036
    • Provided are an inter-metal dielectric pattern and a method of forming the same. The pattern includes a lower interconnection disposed on a semiconductor substrate, a lower dielectric layer having a via hole exposing the lower interconnection and covering the semiconductor substrate where the lower interconnection is disposed, and an upper dielectric pattern and a lower capping pattern, which include a trench line exposing the via hole and sequentially stacked on the lower dielectric layer. The lower dielectric layer and the upper dielectric pattern are low k-dielectric layers formed of materials such as SiO2, SiOF, SiOC, and porous dielectric. The method includes forming an inter-metal dielectric layer including a lower dielectric layer and upper dielectric layer, which are sequentially stacked, on a lower interconnection formed on a semiconductor substrate. The inter-metal dielectric layer is patterned to form a via hole, which exposes the upper side of the lower interconnection. Then, an upper capping layer is formed on the entire surface of the semiconductor substrate including the via hole. The upper capping layer and the upper dielectric layer are successively patterned to form a trench line exposing the upper side of the via hole. The upper capping layer is formed of at least one material selected from the group consisting of a silicon oxide layer, a silicon carbide layer, a silicon nitride layer, and a silicon oxynitride layer, by using PECVD.
    • 提供了金属间介电图案及其形成方法。 该图案包括布置在半导体衬底上的下部互连,具有通孔暴露下部互连并覆盖半导体衬底的下部电介质图案和下部封盖图案的下部电介质层, 沟槽线暴露通孔并依次堆叠在下介电层上。 下电介质层和上电介质图案是由诸如SiO 2,SiOF,SiOC和多孔电介质的材料形成的低K电介质层。 该方法包括在形成在半导体衬底上的下互连件上依次层叠包括下电介质层和上电介质层的金属间电介质层。 图案化金属间电介质层以形成通孔,其暴露下部互连的上侧。 然后,在包括通孔的半导体衬底的整个表面上形成上覆盖层。 上覆盖层和上电介质层被连续地图案化以形成暴露通孔上侧的沟槽线。 通过使用PECVD,上覆盖层由选自氧化硅层,碳化硅层,氮化硅层和氮氧化硅层的至少一种材料形成。
    • 9. 发明授权
    • Structure of a CMOS image sensor and method for fabricating the same
    • CMOS图像传感器的结构及其制造方法
    • US07400003B2
    • 2008-07-15
    • US10998803
    • 2004-11-30
    • Soo-Geun LeeKi-Chul ParkKyoung-Woo Lee
    • Soo-Geun LeeKi-Chul ParkKyoung-Woo Lee
    • H01L31/062
    • H01L23/53238G01R31/2829H01L21/76805H01L27/14603H01L27/14623H01L27/14627H01L27/14636H01L27/14687H01L31/022408H01L2924/0002H04N17/002H01L2924/00
    • An image sensor device and method for forming the same include a photodiode formed in a substrate, at least one electrical interconnection line electrically associated with the photodiode, a light passageway having a light inlet, the light passageway being positioned in alignment with the photodiode, a color filter positioned over the light inlet of the light passageway and a lens positioned over the color filter in alignment with the light passageway wherein the at least one electrical interconnection line includes a copper interconnection formation having a plurality of interlayer dielectric layers in a stacked configuration with a diffusion barrier layer between adjacent interlayer dielectric layers, and a barrier metal layer between the copper interconnection formation and the plurality of interlayer dielectric layers and intervening diffusion barrier layers. An image sensor device may employ copper interconnections if a barrier metal layer is removed from above a photodiode.
    • 图像传感器装置及其形成方法包括形成在基板中的光电二极管,与光电二极管电连接的至少一个电互连线,具有光入口的光通路,光通路与光电二极管对准, 位于光通道的光入口之上的滤色器和位于滤光器上的透镜与光通路对准,其中至少一个电互连线包括铜互连结构,铜互连结构具有层叠形式的多个层间电介质层, 相邻的层间电介质层之间的扩散阻挡层和铜互连结构与多个层间电介质层之间的阻挡金属层以及介于其间的扩散阻挡层。 如果从光电二极管上方去除阻挡金属层,则图像传感器装置可以采用铜互连。