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1. 发明专利

JP2011253402A Merchandise value output device, merchandise value output method and program 有权
标题翻译：商品价值输出设备，商品价值输出方法和程序
公开(公告)号：JP2011253402A
公开(公告)日：2011-12-15
申请号：JP2010127546
申请日：2010-06-03
申请人： Kozo Keikaku Engineering Inc , Makoto Mizuno , 株式会社構造計画研究所 , 誠水野
发明人： SERA KOTA , BABA TAKANORI , SUGIURA TEPPEI , ODA MIZUO , MIZUNO MAKOTO
IPC分类号： G06Q10/00 , G06Q30/02 , G06Q50/00
摘要： PROBLEM TO BE SOLVED: To solve the problem that the load of answering is large, and the result is unstable.SOLUTION: This merchandise value output device is configured to store two or more merchandise information having two or more function information as the set of a function identifier for identifying each function, the presence/absence of the function, and price information indicating the price of the function in such configurations that the sequence of the selection of the function is identifiable, and to calculate the utility values of each of the two or more merchandise information, and to calculate one or more parameters including the utility values of each of two or more functions so that such likelihood that merchandise specified by the temporally last merchandise information is selected or such likelihood that merchandise specified by the temporally later merchandise information is selected can be made maximum by using the two or more utility values, and to calculate the value of one or more functions among two or more functions by using one or more parameters. Thus, it is possible to reduce the load of answering of a user, and to output a stable result.
摘要翻译：要解决的问题：解决应答负载大的问题，结果不稳定。该商品值输出装置被配置为存储具有两个或更多个功能信息的两个或多个商品信息作为用于识别每个功能的功能标识符的集合，功能的存在/不存在以及指示该功能的价格信息功能的价格在功能的选择顺序是可识别的，并且计算两个或多个商品信息中的每一个的效用值，并且计算一个或多个参数，包括两者中的每一个的效用值或更多的功能，使得通过使用两个或多个效用值可以使由时间上最后的商品信息指定的商品被选择或这样的可能性使得由时间上稍后的商品信息指定的商品被最大化，并且计算该值通过使用一个或多个参数在两个或更多个功能中的一个或多个功能。因此，可以减少用户的应答负担，并输出稳定的结果。版权所有（C）2012，JPO＆INPIT

2. 发明授权

US08476138B2 Semiconductor memory device and a method of manufacturing the same, a method of manufacturing a vertical MISFET and a vertical MISFET, and a method of manufacturing a semiconductor device and a semiconductor device 失效
公开(公告)号：US08476138B2
公开(公告)日：2013-07-02
申请号：US13150768
申请日：2011-06-01
申请人： Hiraku Chakihara , Kousuke Okuyama , Masahiro Moniwa , Makoto Mizuno , Keiji Okamoto , Mitsuhiro Noguchi , Tadanori Yoshida , Yasuhiko Takahshi , Akio Nishida
发明人： Hiraku Chakihara , Kousuke Okuyama , Masahiro Moniwa , Makoto Mizuno , Keiji Okamoto , Mitsuhiro Noguchi , Tadanori Yoshida , Yasuhiko Takahshi , Akio Nishida
IPC分类号： H01L21/336 , H01L21/8244 , H01L21/8239
CPC分类号： H01L29/6675 , H01L21/823885 , H01L27/105 , H01L27/11 , H01L27/1104 , H01L27/1116 , H01L29/7833 , H01L29/78642
摘要： Vertical MISFETs are formed over drive MISFETs and transfer MISFETs. The vertical MISFETs comprise rectangular pillar laminated bodies each formed by laminating a lower semiconductor layer (drain), an intermediate semiconductor layer, and an upper semiconductor layer (source), and gate electrodes formed on corresponding side walls of the laminated bodies with gate insulating films interposed therebetween. In each vertical MISFET, the lower semiconductor layer constitutes a drain, the intermediate semiconductor layer constitutes a substrate (channel region), and the upper semiconductor layer constitutes a source. The lower semiconductor layer, the intermediate semiconductor layer and the upper semiconductor layer are each comprised of a silicon film. The lower semiconductor layer and the upper semiconductor layer are doped with a p type and constituted of a p type silicon film.

3. 发明授权

US08174901B2 Semiconductor integrated circuit device 有权
标题翻译：半导体集成电路器件
公开(公告)号：US08174901B2
公开(公告)日：2012-05-08
申请号：US12721553
申请日：2010-03-10
申请人： Ken Matsubara , Hideo Kasai , Kenji Kawada , Makoto Mizuno
发明人： Ken Matsubara , Hideo Kasai , Kenji Kawada , Makoto Mizuno
IPC分类号： G11C11/34
CPC分类号： G11C7/02 , G11C16/06 , G11C16/32 , G11C16/3418
摘要： This invention is to reduce the number of memory gate drivers, while lessening the number of times of disturb occurrence in a memory array configuration that implements writing in small byte units. A memory array comprises a plurality of sub-arrays, MG transfers, SL drivers, and CG drivers. Each sub-array includes a plurality of memory gate lines, control gate lines, source lines, and bit lines. Memory cells are arranged in positions of intersections of these lines. The control gate lines, CG drivers, source lines, and SL drivers are common to the sub-arrays, whereas the memory gate lines and MG buffer circuits are provided for each sub-array. Thereby, the units in which data is written are decreased and adverse effects of disturb are reduced without increasing the circuit size of the memory array.
摘要翻译：本发明是减少存储器栅极驱动器的数量，同时减少以小字节为单位实现写入的存储器阵列配置中的干扰发生次数。存储器阵列包括多个子阵列，MG传输，SL驱动器和CG驱动器。每个子阵列包括多个存储器栅极线，控制栅极线，源极线和位线。存储单元布置在这些线的相交位置。控制栅极线，CG驱动器，源极线和SL驱动器对于子阵列是共同的，而为每个子阵列提供存储器栅极线和MG缓冲电路。因此，数据写入的单元减少，并且不增加存储器阵列的电路尺寸的同时降低了干扰的不利影响。

4. 发明申请

US20110208904A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20110208904A1
公开(公告)日：2011-08-25
申请号：US13099720
申请日：2011-05-03
申请人： Masamichi Fujito , Makoto Mizuno , Takahiro Yokoyama , Kenji Kawada , Takashi Iwase , Yasunobu Aoki , Takashi Kurafuji , Tomohiro Uchiyama , Shuichi Sato , Yuji Uji
发明人： Masamichi Fujito , Makoto Mizuno , Takahiro Yokoyama , Kenji Kawada , Takashi Iwase , Yasunobu Aoki , Takashi Kurafuji , Tomohiro Uchiyama , Shuichi Sato , Yuji Uji
IPC分类号： G06F12/00
CPC分类号： G11C7/04 , G11C16/0441 , G11C16/10 , G11C16/28
摘要： The semiconductor device includes a nonvolatile memory, having a memory array containing 1-bit twin cells, each composed of electrically rewritable first and second storage devices, the first and second storage devices holding binary data according to difference of their threshold voltages, and having different retention characteristics depending on difference of the binary data thereof; a read circuit for differentially amplifying complementary data output from the first and second storage devices of the twin cell selected for read, and judging information stored in the twin cell; and a control circuit. Two memory cells constituting a twin cell are arranged to hold different data. Therefore, even when the retention performance of one memory cell deteriorates, the difference between data held by the two memory cells can be maintained. Hence, differential amplification of such difference enables acquisition of proper stored information. Thus, retention performance of an electrically rewritable nonvolatile memory cell is improved.
摘要翻译：半导体器件包括非易失性存储器，具有包含1比特双胞格的存储器阵列，每个存储器阵列由电可重写的第一和第二存储器件组成，第一和第二存储器件根据其阈值电压的差异保持二进制数据，并且具有不同的保留特性取决于其二进制数据的差异; 用于差分放大从被选择读取的双胞胎的第一和第二存储装置输出的互补数据的读取电路，以及判断存储在双胞胎中的信息; 和控制电路。布置构成双胞胎的两个存储单元以保存不同的数据。因此，即使一个存储单元的保持性能劣化，也能够维持由两个存储单元保持的数据之间的差异。因此，这种差异的差分放大使得能够获得正确的存储信息。因此，提高了电可重写非易失性存储单元的保持性能。

5. 发明申请

US20100202205A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20100202205A1
公开(公告)日：2010-08-12
申请号：US12764090
申请日：2010-04-20
申请人： Fumitoshi Ito , Yoshiyuki Kawashima , Takeshi Sakai , Yasushi Ishii , Yasuhiro Kanamaru , Takashi Hashimoto , Makoto Mizuno , Kousuke Okuyama , Yukiko Manabe
发明人： Fumitoshi Ito , Yoshiyuki Kawashima , Takeshi Sakai , Yasushi Ishii , Yasuhiro Kanamaru , Takashi Hashimoto , Makoto Mizuno , Kousuke Okuyama , Yukiko Manabe
IPC分类号： G11C16/04 , H01L29/792
CPC分类号： H01L27/11568 , G11C16/0466 , H01L21/28282 , H01L27/115 , H01L29/42344 , H01L29/66833 , H01L29/792
摘要： The degree of integration and the number of rewriting of a semiconductor device having a nonvolatile memory element are improved. A first MONOS nonvolatile-memory-element and a second MONOS nonvolatile-memory-element having a large gate width compared with the first MONOS nonvolatile-memory-element are mounted together on the same substrate, and the first MONOS nonvolatile-memory-element is used for storing program data which is scarcely rewritten, and the second MONOS nonvolatile-memory-element is used for storing processed data which is frequently rewritten.
摘要翻译：改善了具有非易失性存储元件的半导体器件的积分度和重写次数。与第一MONOS非易失性存储元件相比，具有大门宽度的第一MONOS非易失性存储元件和第二MONOS非易失性存储元件一起安装在同一衬底上，并且第一MONOS非易失性存储元件是用于存储几乎不被重写的程序数据，并且第二MONOS非易失性存储元件用于存储频繁重写的处理数据。

6. 发明申请

US20090021847A1 OPTICAL ELEMENT POSITIONING APPARATUS, PROJECTION OPTICAL SYSTEM AND EXPOSURE APPARATUS 有权
标题翻译：光学元件定位装置，投影光学系统和曝光装置
公开(公告)号：US20090021847A1
公开(公告)日：2009-01-22
申请号：US12171644
申请日：2008-07-11
申请人： Ryo Nawata , Makoto Mizuno , Shigeyuki Uzawa
发明人： Ryo Nawata , Makoto Mizuno , Shigeyuki Uzawa
IPC分类号： G02B7/00
CPC分类号： G02B7/005 , G02B7/1827 , G03F7/70258 , G03F7/70825
摘要： The apparatus includes a holder holding an optical element, a back plate supporting the optical element via the holder, a mechanism moving the optical element in a six-degree-of-freedom, a base plate supporting the back plate via the mechanism, and six displacement sensors disposed on the base plate and measuring displacement amounts of different points on the optical element. The displacement sensors includes three ones measuring them in a first direction, one measuring it in a second direction, and two ones measuring them in a third direction. The apparatus further includes a transformation processor transforming the six measured displacement amounts into displacement amounts of the optical element in the six-degree-of-freedom, a calibration processor calibrating the transformed displacement amounts, and a controller outputting command values to the displacing mechanism based on differences between the calibrated displacement amounts and target displacement amounts of the optical element.
摘要翻译：该装置包括保持光学元件的保持器，经由保持器支撑光学元件的背板，以六自由度移动光学元件的机构，经由机构支撑背板的基板，以及六个位移传感器设置在基板上并测量光学元件上的不同点的位移量。位移传感器包括在第一方向上测量它们的三个位移传感器，一个在第二方向上测量它们，并且在第三方向上测量它们的两个。该装置还包括变换处理器，将六个测量的位移量变换为六自由度中的光学元件的位移量，校准经变换的位移量的校准处理器，以及基于位移机构输出命令值的控制器在校准位移量和光学元件的目标位移量之间的差异。

7. 发明申请

US20080176909A1 Methods for prevention and treatment of arteriosclerosis, hypertension and restenosis 审中-公开
标题翻译：预防和治疗动脉硬化，高血压和再狭窄的方法
公开(公告)号：US20080176909A1
公开(公告)日：2008-07-24
申请号：US12074778
申请日：2008-03-06
申请人： Masatsugu Horiuchi , Masaru Iwai , Toshio Sada , Makoto Mizuno
发明人： Masatsugu Horiuchi , Masaru Iwai , Toshio Sada , Makoto Mizuno
IPC分类号： A61K31/4422 , A61P9/12 , A61P9/10
CPC分类号： A61K31/4178 , A61K31/4422 , A61K31/455 , A61K45/06 , A61K2300/00
摘要： Methods for the prophylaxis and/or treatment of arteriosclerosis, hypertension, restenosis, heart diseases, renal diseases and cerebrovascular diseases by administering a pharmaceutical composition comprising the following active ingredients: (A) an angiotensin II receptor antagonist selected from the group consisting of a compound having a formula (I), a pharmacologically acceptable ester thereof and a pharmacologically acceptable salt thereof (for example, olmesartan medoxomil), the compound having the following formula: and (B) a calcium channel blocker selected from the group consisting of a 1,4-dihydropyridine compound and a pharmacologically acceptable salt thereof (for example, azelnidipine), wherein the composition does not include the combination of olmesartan medoxomil and amlodipine or amlodipine besylate.
摘要翻译：通过施用包含以下活性成分的药物组合物来预防和/或治疗动脉硬化，高血压，再狭窄，心脏病，肾脏疾病和脑血管疾病的方法：（A）选自下列化合物的血管紧张素II受体拮抗剂具有式（I），其药理学上可接受的酯和其可药用盐（例如奥美沙坦酯），具有下式的化合物和（B）选自以下的钙通道阻断剂：1， 4-二氢吡啶化合物及其药理学上可接受的盐（例如，氮卓尼地平），其中该组合物不包括奥美沙坦酯和氨氯地平或苯磺酸氨氯地平的组合。

8. 发明授权

US07110089B2 Drive mechanism, exposure device, optical equipment, and device manufacturing method 有权
标题翻译：驱动机构，曝光装置，光学设备和装置制造方法
公开(公告)号：US07110089B2
公开(公告)日：2006-09-19
申请号：US10799424
申请日：2004-03-11
申请人： Makoto Mizuno
发明人： Makoto Mizuno
IPC分类号： G03B27/42
CPC分类号： G03F7/70825 , G02B7/023 , G02B7/182 , G02B7/1824 , Y10T74/20006 , Y10T74/20564
摘要： The present invention provides a drive mechanism having a high rigidity and capable of performing fine adjustment in 6-axis directions of an optical element such as a mirror or a lens, or a support member for supporting the optical element, in optical equipment such as an exposure device. The drive mechanism has such a feature that three monolithic planar 3-joint or 4-joint link mechanisms are each arranged between a movable portion and a stationary portion through the intermediation of a bearing having at least one degree of freedom of rotation.
摘要翻译：本发明提供一种驱动机构，其具有高刚性并且能够在诸如反射镜或透镜的光学元件或用于支撑光学元件的支撑构件的6轴方向上进行微调，曝光装置驱动机构具有这样的特征，即通过具有至少一个旋转自由度的轴承，可以在可动部分和固定部分之间设置三个整体平面3关节或4关节连杆机构。

9. 发明授权

US06525350B1 Semiconductor integrated circuit basic cell semiconductor integrated circuit using the same 有权
标题翻译：半导体集成电路基本单元半导体集成电路采用相同的方式
公开(公告)号：US06525350B1
公开(公告)日：2003-02-25
申请号：US09613769
申请日：2000-07-11
申请人： Eita Kinoshita , Makoto Mizuno
发明人： Eita Kinoshita , Makoto Mizuno
IPC分类号： H01L2710
CPC分类号： H01L27/118 , H01L27/0207
摘要： A basic cell is disclosed, which is small in area and has sufficient connection flexibility. for achieving a semiconductor integrated circuit with a higher density and a reduced manufacturing cost. In a basic cell, a terminal wire, which is connected to a transistor terminal with a contact, is placed in a first metal wiring layer, and a plurality of terminal wire connection points, which can be connected to a second metal wire through a first via, are provided on the terminal wire. Further, in a semiconductor integrated circuit, a circuit wire in a second metal wiring layer is placed along grid points with a fixed pitch, and is connected to a terminal connection point of a transistor terminal, which is displaced from the grid points, through a terminal wire provided in the first metal wiring layer.
摘要翻译：公开了一种面积小且具有足够的连接灵活性的基本单元。用于实现具有更高密度和降低制造成本的半导体集成电路。在基本单元中，连接到具有触点的晶体管端子的端子线被放置在第一金属布线层中，并且多个端子线连接点可以通过第一金属线连接到第二金属线通孔，设置在端子线上。此外，在半导体集成电路中，第二金属布线层中的电路布线沿着网格点以固定的间距放置，并且连接到从网格点移位的晶体管端子的端子连接点端子线设置在第一金属布线层中。

10. 发明授权

US4011993A Apparatus for paint application 失效
标题翻译：涂料应用设备
公开(公告)号：US4011993A
公开(公告)日：1977-03-15
申请号：US580613
申请日：1975-05-27
申请人： Makoto Mizuno , Yoshio Nishiumi , Yukio Nagasaka
发明人： Makoto Mizuno , Yoshio Nishiumi , Yukio Nagasaka
IPC分类号： B05C5/00 , B05B3/02 , E01C23/16 , E01C23/20 , E01C23/22 , E01C23/24
CPC分类号： B05B3/02 , E01C23/22
摘要： An apparatus which is used for paint application to a road surface comprises a paint supply means provided with a valve means rotatably fitted in a bore-like space which is formed longitudinally in the body of the supply means, a plurality of orifices in two rows in an opposite relation on a lower portion of said paint supply means for paint discharging, a pair of rollers each provided on the external periphery thereof and in the axial direction of the roller with a vast plurality of projecting teeth and grooves formed side by side with the projecting teeth, said rollers being attached to said paint supply means to rotate inwardly and disposed adjacent said orifices, and a pair of cover members each adapted to cover one of the rollers. With the arrangement mentioned above, the paint having a high viscosity can be discharged sufficiently and effectively to draw or produce lines which have a fixed width and thickness of paint on the road surface without regard to the rise and fall of the road surface.
摘要翻译：用于油漆施用于路面的装置包括涂料供给装置，其具有可旋转地装配在纵向形成在供给装置的主体中的孔状空间中的阀装置，多个在两排中的孔在所述涂料供给装置的下部的涂料排出的下部具有相反的关系，一对辊设置在所述辊的外周和所述辊的轴向上，所述辊具有大量多个突出的齿和槽，突出的齿，所述辊被附着到所述油漆供应装置上以向内旋转并且邻近所述孔设置，以及一对盖构件，每个盖构件适于覆盖其中一个辊。通过上述布置，可以充分有效地排出具有高粘度的涂料，而不用考虑道路表面的上升和下降来绘制或生产具有固定的路面宽度和厚度的线条。

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