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1. 发明授权

US08479385B2 Method of producing wiring substrate 有权
标题翻译：制造布线基板的方法
公开(公告)号：US08479385B2
公开(公告)日：2013-07-09
申请号：US13233076
申请日：2011-09-15
申请人： Hiroyuki Miyazawa
发明人： Hiroyuki Miyazawa
IPC分类号： H01R9/00
CPC分类号： H01L23/49822 , H01L21/4853 , H01L21/4857 , H01L21/6835 , H01L23/3121 , H01L23/49811 , H01L2221/68345 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2224/16227 , H01L2224/73204 , H01L2924/00014 , H01L2924/19105 , H05K1/0271 , H05K3/0061 , Y10T29/49126 , Y10T29/4913 , Y10T29/49144 , Y10T29/49147 , Y10T29/49155 , Y10T29/49165 , H01L2224/05599
摘要： A method of producing a wiring substrate includes producing a substrate body including a first primary surface on which a semiconductor chip mounting area is provided and a second primary surface opposed to the first primary surface; attaching a stiffener member on the first primary surface, the stiffener member including an opening which the semiconductor chip mounting area is exposed from; and connecting lead pins to corresponding connection pads provided on the second primary surface by way of electrically conductive members.
摘要翻译：一种制造布线基板的方法包括制造包括设置半导体芯片安装区域的第一主表面和与第一主表面相对的第二主表面的基板主体; 在第一主表面上附加加强件，加强件包括半导体芯片安装区域露出的开口; 以及通过导电构件将引线引脚连接到设置在第二主表面上的相应的连接焊盘。

2. 发明申请

US20090283205A1 METHOD OF MANUFACTURING A THIN-FILM MAGNETIC HEAD 审中-公开
标题翻译：制造薄膜磁头的方法
公开(公告)号：US20090283205A1
公开(公告)日：2009-11-19
申请号：US12354519
申请日：2009-01-15
申请人： Hiroyuki Miyazawa , Masaya Kato , Masanori Tachibana
发明人： Hiroyuki Miyazawa , Masaya Kato , Masanori Tachibana
IPC分类号： B32B37/02
CPC分类号： G11B5/3163 , G11B5/1278 , G11B5/3116 , G11B5/3146 , G11B5/315
摘要： A method of manufacturing a thin-film magnetic head is capable of planarizing and forming the upper surface of a main magnetic pole with high precision, of forming a trailing gap with a precise form, and of efficiently and precisely forming side shields and a trailing shield. A stopper layer is formed so as to cover a magnetic pole and so that a thickness thereof at positions on both sides of the magnetic pole is a predetermined side shield gap width. After a resist layer has been formed so that a thickness thereof at positions on both sides of the magnetic pole is a predetermined side shield width, an insulating layer is formed thereupon and then lapping according to a CMP process is carried out until the stopper layer becomes exposed. After this, the stopper layer is removed by dry etching until the upper surface of the magnetic pole becomes exposed, and then the upper surface of the magnetic pole is lapped by a CMP process until the surface is planarized. Next, the resist layer is removed and the stopper layer that becomes exposed due to such removal is also removed to form the trailing shield and the side shields.
摘要翻译：制造薄膜磁头的方法能够以高精度平面化和形成主磁极的上表面，以精确的形式形成后跟间隙，并且有效和精确地形成侧屏蔽和后屏蔽。形成阻挡层以覆盖磁极，并且使得其在磁极两侧的位置处的厚度为预定的侧屏蔽间隙宽度。在形成抗蚀剂层之后，使其在磁极两侧的位置处的厚度为预定的侧屏蔽宽度，在其上形成绝缘层，然后进行根据CMP工艺的研磨，直到阻挡层变为裸露。之后，通过干蚀刻去除阻挡层，直到磁极的上表面露出，然后通过CMP工艺研磨磁极的上表面，直到表面平坦化。接下来，除去抗蚀剂层，并且除去由于这种去除而变得露出的阻挡层以形成后屏蔽和侧屏蔽。

3. 发明申请

US20090152119A1 METHOD FOR MANUFACTURING MAGNETIC HEAD 审中-公开
标题翻译：制造磁头的方法
公开(公告)号：US20090152119A1
公开(公告)日：2009-06-18
申请号：US12331079
申请日：2008-12-09
申请人： Masanori Tachibana , Masaya Kato , Takashi Ito , Hiroyuki Miyazawa
发明人： Masanori Tachibana , Masaya Kato , Takashi Ito , Hiroyuki Miyazawa
IPC分类号： C25D5/02 , C25D5/52
CPC分类号： C25D5/52 , C23C28/023 , C25D5/022 , C25D5/12 , G11B5/1278 , G11B5/315 , G11B5/3163
摘要： According to an aspect of an embodiment, a method for manufacturing a magnetic head includes: providing a substrate; forming a first magnetic layer having a pattern for forming a magnetic pole on the substrate; forming a stopper layer of non-magnetic material on the top and the sides of the first magnetic layer; reducing the thickness of the stopper layer on the top of the first magnetic layer; and forming a second magnetic layer on the stopper layer. The method further includes: polishing the second magnetic layer to expose the stopper layer on the top of the first magnetic layer; and removing the stopper layer on the top of the first magnetic layer, so as to expose the top of the first magnetic layer.
摘要翻译：根据实施例的一个方面，一种用于制造磁头的方法包括：提供基板; 形成具有用于在所述基板上形成磁极的图案的第一磁性层; 在第一磁性层的顶部和侧面形成非磁性材料的阻挡层; 减小第一磁性层顶部上的阻挡层的厚度; 以及在所述阻挡层上形成第二磁性层。该方法还包括：抛光第二磁性层以暴露第一磁性层顶部的阻挡层; 并且去除第一磁性层的顶部上的阻挡层，以暴露第一磁性层的顶部。

4. 发明授权

US06280522B1 Quartz glass crucible for pulling silicon single crystal and production process for such crucible 有权
标题翻译：用于拉硅单晶的石英玻璃坩埚和这种坩埚的生产工艺
公开(公告)号：US06280522B1
公开(公告)日：2001-08-28
申请号：US09508695
申请日：2000-03-29
申请人： Hiroyuki Watanabe , Hiroyuki Miyazawa , Tatsuhiro Sato , Satoshi Soeta , Tetsuya Igarashi
发明人： Hiroyuki Watanabe , Hiroyuki Miyazawa , Tatsuhiro Sato , Satoshi Soeta , Tetsuya Igarashi
IPC分类号： C30B1322
CPC分类号： C03B19/095 , C03B2201/23 , C03B2201/24 , C30B15/10 , C30B35/002 , Y10S65/08
摘要： There is provided a quartz glass crucible for pulling a silicon single crystal and a production process for the crucible, wherein an inner surface of the crucible is crystallized without addition of impurities during pulling a silicon single crystal, thereby impurities serving as causes of crystal defects being not incorporated into the silicon single crystal, so that deterioration of its inner surface is suppressed to improve a crystallization ratio, and accordingly productivity of the quartz glass crucible as well as a quality of the silicon single crystal is improved, and the quartz glass crucible for pulling a silicon single crystal comprises a crucible base body (3) made of a translucent quartz glass layer and a synthetic quartz glass layer (4) formed on an inner wall surface of the crucible base body (3), wherein a portion encircled by a brown ring on an inner surface of the quartz glass crucible is uniformly crystallized during pulling the silicon single crystal.
摘要翻译：提供了一种用于拉制硅单晶的石英玻璃坩埚和用于坩埚的制造方法，其中在拉取硅单晶时坩埚的内表面结晶而不添加杂质，从而导致晶体缺陷的原因是不掺入到硅单晶中，从而抑制其内表面的劣化以提高结晶化率，从而提高了石英玻璃坩埚的生产率以及硅单晶的质量，并且提高了石英玻璃坩埚拉硅单晶包括由半透明石英玻璃层制成的坩埚基体（3）和形成在坩埚基体（3）的内壁表面上的合成石英玻璃层（4），其中包围由石英玻璃坩埚的内表面上的棕色环在拉制硅单晶时均匀结晶。

5. 发明授权

US5968259A High-purity quartz glass and method for the preparation thereof 失效
标题翻译：高纯石英玻璃及其制备方法
公开(公告)号：US5968259A
公开(公告)日：1999-10-19
申请号：US917933
申请日：1997-08-27
申请人： Katsuhiko Kemmochi , Hiroyuki Miyazawa , Hiroyuki Watanabe , Kiyotaka Maekawa , Chuzaemon Tsuji , Manabu Saitou
发明人： Katsuhiko Kemmochi , Hiroyuki Miyazawa , Hiroyuki Watanabe , Kiyotaka Maekawa , Chuzaemon Tsuji , Manabu Saitou
IPC分类号： C03C1/00 , C03C3/06 , C30B15/10 , C30B35/00 , C30B29/18
CPC分类号： C03C3/06 , C03C1/006 , C30B15/10 , C30B35/002 , C03C2201/02 , C03C2203/10 , Y10T29/40
摘要： Provided are high-purity quartz glass having a high purity, in particular, with little zirconium (Zr) and manufactured at low costs from natural quartz as the starting material and a method for the preparation thereof. High-purity quartz glass is manufactured, in a method for the preparation of natural quartz glass which is prepared by subjecting crystalline natural quartz to fusion by heating, in conducting refining of the starting material of the crystalline natural quartz by successively practicing a combination of at least one unit refining procedure, in a procedure in which a portion of the starting quartz after practicing the specified unit refining procedure is taken by sampling for analysis, the same is decomposed with hydrofluoric acid or an acid mixture of hydrofluoric acid and another inorganic acid, the decomposition solution is subjected to evaporation to dryness either as such or after addition of another inorganic acid, the residue is melted by heating with admixture of a salt or hydroxide of an alkali metal, the salt or hydroxide of the alkali metal is then dissolved in an aqueous solution of an inorganic acid or in pure water, the solution is subjected to quantitative analysis for the impurities therein to determine the contents of impurities in the crystalline natural quartz and the refined crystalline natural quartz, of which the content of impurities has been found to be lower than a specified value, is subjected to fusion by heating as a starting material to prepare high-purity quartz glass.
摘要翻译：提供了具有高纯度的高纯度石英玻璃，特别是少量锆（Zr），并以天然石英作为起始原料以低成本制造，以及其制备方法。制造高纯度石英玻璃的方法中，天然石英玻璃的制备方法是将结晶天然石英通过加热进行熔融制备，在通过连续地实施在至少一个单元精制程序，在通过取样进行分析之后，通过取样进行一部分实施了规定的单元精炼处理后的起始石英的一部分，同时用氢氟酸或氢氟酸与其它无机酸的酸混合物分解，将分解溶液按照本身或加入另一种无机酸进行蒸发干燥后，通过用碱金属的盐或氢氧化物的混合物加热将残余物熔化，然后将碱金属的盐或氢氧化物溶于无机酸的水溶液或纯水中，对该溶液进行定量分析 e杂质以确定结晶天然石英中的杂质含量和发现杂质含量低于规定值的精制结晶天然石英通过加热作为原料进行熔融以制备高纯石英玻璃。

6. 发明授权

US5576884A Base body of reflecting mirror and method for preparing the same 失效
标题翻译：反射镜的基体及其制备方法
公开(公告)号：US5576884A
公开(公告)日：1996-11-19
申请号：US458672
申请日：1995-06-02
申请人： Yoshiaki Ise , Hiroyuki Miyazawa , Hiroyuki Kimura , Shinichi Okoshi , Tatsumasa Nakamura , Toshiyuki Kato
发明人： Yoshiaki Ise , Hiroyuki Miyazawa , Hiroyuki Kimura , Shinichi Okoshi , Tatsumasa Nakamura , Toshiyuki Kato
IPC分类号： G02B5/08 , G02B5/10 , G02B7/182 , G02B7/183 , C03B23/00 , C03B23/20
CPC分类号： G02B7/183 , G02B5/08 , G02B5/10 , Y10S359/90 , Y10T428/249969 , Y10T428/249976 , Y10T428/249977
摘要： A light-weight base body of a reflecting mirror, such as those used in reflecting astronomical telescopes, is proposed which is made from fused silica glass or high-silica glass and is advantageous in respect of the excellent thermal and mechanical stability in dimensions to ensure high performance of the reflecting mirror. The base body is composed of a front plate, i.e. a surface plate to provide the optical surface, and a supporting body of porous foamed glass integrally bonded to the front plate. These two parts of the base body can be bonded together by sandwiching a layer of a finely divided silica powder therebetween and heating the assemblage at a temperature higher than the softening point of the silica powder so that the silica powder is softened or melted to firmly join the two parts sandwiching the powder layer. The base body can be further improved in respect of the mechanical stability by providing a rear plate backing the porous foamed body and a reinforcing hoop-like side layer surrounding the side surface of the porous foamed body, each made from fused quartz glass or high-silica glass and bonded to the porous foamed body by utilizing melting of a layer of silica powder therebetween.
摘要翻译：提出了一种反射镜的轻质基体，例如用于反射天文望远镜的反射镜，其由熔融石英玻璃或高硅石玻璃制成，并且在尺寸方面优良的热和机械稳定性是有利的，以确保高性能的反光镜。基体由前板，即提供光学表面的表面板和与前板一体地结合的多孔泡沫玻璃的支撑体组成。基体的这两个部分可以通过在其间夹有细碎的二氧化硅粉末层而将它们粘合在一起，并在高于二氧化硅粉末的软化点的温度下加热组合物，使得二氧化硅粉末软化或熔化以牢固地结合两部分夹在粉末层上。通过提供背面多孔泡沫体的后板和围绕多孔泡沫体的侧表面的加强箍型侧层，每个由熔融石英玻璃或高熔点石英玻璃制成，可以进一步改善基体的机械稳定性，二氧化硅玻璃，并通过利用二氧化硅粉末之间的熔融而与多孔发泡体结合。

7. 发明授权

US5264712A Semiconductor integrated circuit, method of fabricating the same and apparatus for fabricating the same 失效
标题翻译：半导体集成电路及其制造方法及其制造装置
公开(公告)号：US5264712A
公开(公告)日：1993-11-23
申请号：US881314
申请日：1992-05-07
申请人： Jun Murata , Yoshitaka Tadaki , Hiroko Kaneko , Toshihiro Sekiguchi , Hiroyuki Uchiyama , Hisashi Nakamura , Toshio Maeda , Osamu Kasahara , Hiromichi Enami , Atsushi Ogishima , Masaki Nagao , Michimasa Funabashi , Yasuo Kiguchi , Masayuki Kojima , Atsuyoshi Koike , Hiroyuki Miyazawa , Masato Sadaoka , Kazuya Kadota , Tadashi Chikahara , Kazuo Nojiri , Yutaka Kobayashi
发明人： Jun Murata , Yoshitaka Tadaki , Hiroko Kaneko , Toshihiro Sekiguchi , Hiroyuki Uchiyama , Hisashi Nakamura , Toshio Maeda , Osamu Kasahara , Hiromichi Enami , Atsushi Ogishima , Masaki Nagao , Michimasa Funabashi , Yasuo Kiguchi , Masayuki Kojima , Atsuyoshi Koike , Hiroyuki Miyazawa , Masato Sadaoka , Kazuya Kadota , Tadashi Chikahara , Kazuo Nojiri , Yutaka Kobayashi
IPC分类号： H01L21/8234 , H01L27/105 , H01L21/308 , H01L29/66
CPC分类号： H01L27/105 , H01L21/823425
摘要： A semiconductor integrated circuit comprising first n-channel MISFETs constituting the memory cells of a storage system, second n-channel MISFETs constituting the peripheral circuits of the storage system, and third n-channel MISFETs constituting the output circuit among the peripheral circuits. The respective threshold voltages of the first n-channel MISFETs, the second n-channel MISFETs and the third n-channel MISFETs are decreased in that order when the respective gate lengths of those MISFETs are substantially the same.
摘要翻译：一种半导体集成电路，包括构成存储系统的存储单元的第一n沟道MISFET，构成存储系统的外围电路的第二n沟道MISFET和构成外围电路中的输出电路的第三n沟道MISFET。当这些MISFET的各个栅极长度基本相同时，第一n沟道MISFET，第二n沟道MISFET和第三n沟道MISFET的阈值电压依次减小。

8. 发明授权

US5237187A Semiconductor memory circuit device and method for fabricating same 失效
标题翻译：半导体存储器电路器件及其制造方法
公开(公告)号：US5237187A
公开(公告)日：1993-08-17
申请号：US799541
申请日：1991-11-27
申请人： Naokatsu Suwanai , Hiroyuki Miyazawa , Atushi Ogishima , Masaki Nagao , Kyoichiro Asayama , Hiroyuki Uchiyama , Yoshiyuki Kaneko , Takashi Yoneoka , Kozo Watanabe , Kazuya Endo , Hiroki Soeda
发明人： Naokatsu Suwanai , Hiroyuki Miyazawa , Atushi Ogishima , Masaki Nagao , Kyoichiro Asayama , Hiroyuki Uchiyama , Yoshiyuki Kaneko , Takashi Yoneoka , Kozo Watanabe , Kazuya Endo , Hiroki Soeda
IPC分类号： H01L21/8242 , H01L27/108
CPC分类号： H01L27/10844 , H01L27/10805 , H01L27/10808
摘要： In a semiconductor memory circuit device wherein each memory cell is constituted by a series circuit of a memory cell selecting MISFET and an information storing capacitor of a stacked structure, there are present in a first region, which is a memory cell array region, a first MISFET having a gate electrode and source and drain regions; first and second capacitor electrodes and a dielectric film extended over a first insulating film and over the gate electrode; a second insulating film disposed on the second capacitor electrode; a third insulating film interposed between the first insulating film and first capacitor electrode; and a first wiring positioned on the second insulating film. In a second region of the device, which is a peripheral circuit region, there are present a second MISFET having a gate electrode and source and drain regions; a first insulating film on the gate electrode; a second insulating film on a third insulating film, the third insulating film being interposed between the first and second insulating films; and a second wiring on the second insulating film. The second wiring is formed by the same level conductor layer as that forming the first wiring. Similarly, the first through third insulating films of the first region are correspondingly associated with the first through third insulating films of the second region, respectively.
摘要翻译：在其中每个存储单元由存储单元选择MISFET的串联电路和层叠结构的信息存储电容器构成的半导体存储器电路器件中，存在作为存储单元阵列区域的第一区域，第一 MISFET具有栅极电极和源极和漏极区域; 第一和第二电容器电极以及在第一绝缘膜上并在栅电极上方延伸的电介质膜; 设置在所述第二电容器电极上的第二绝缘膜; 介于所述第一绝缘膜和所述第一电容器电极之间的第三绝缘膜; 以及位于第二绝缘膜上的第一布线。在作为外围电路区域的器件的第二区域中，存在具有栅极电极和源极和漏极区域的第二MISFET，栅电极上的第一绝缘膜; 在第三绝缘膜上的第二绝缘膜，所述第三绝缘膜介于所述第一和第二绝缘膜之间; 以及在第二绝缘膜上的第二布线。第二布线由与形成第一布线的层相同的导体层形成。类似地，第一区域的第一至第三绝缘膜分别与第二区域的第一至第三绝缘膜相关联。

9. 发明授权

US4612565A Semiconductor memory device 失效
标题翻译：半导体存储器件
公开(公告)号：US4612565A
公开(公告)日：1986-09-16
申请号：US783531
申请日：1985-10-03
申请人： Shinji Shimizu , Hiroyuki Miyazawa
发明人： Shinji Shimizu , Hiroyuki Miyazawa
IPC分类号： G11C11/401 , G11C11/404 , H01L21/321 , H01L21/324 , H01L21/768 , H01L21/822 , H01L21/8242 , H01L21/86 , H01L23/522 , H01L27/04 , H01L27/10 , H01L27/108 , H01L27/115 , H01L27/12 , H01L29/49 , H01L29/78 , H01L29/46 , H01L29/54 , H01L29/62
CPC分类号： H01L27/11519 , G11C11/404 , H01L21/321 , H01L21/324 , H01L21/76889 , H01L21/86 , H01L23/522 , H01L27/10805 , H01L27/115 , H01L27/12 , H01L29/4933 , H01L2924/0002
摘要： In a dynamic memory having a plurality of memory cells each of which consists of a MIS type field effect transistor and a charge storing capacitor connected thereto; a dynamic memory is disclosed wherein one electrode of the capacitor is made of a semiconductor layer which is formed on a semiconductor body through an insulating film and wherein a word line a part of which serves as a gate electrode of the MIS type field effect transistor is made of a conductor layer of multilayer structure which consists of a layer of semiconductor and a high-fusing metal layer containing the semiconductor.
摘要翻译：在具有多个存储单元的动态存储器中，每个存储单元由MIS型场效应晶体管和与其连接的电荷存储电容器组成; 公开了一种动态存储器，其中电容器的一个电极由半导体层制成，半导体层通过绝缘膜形成在半导体本体上，并且其中一部分用作MIS型场效应晶体管的栅电极的字线是由多层结构的导体层制成，其由半导体层和含有半导体的高熔点金属层组成。

10. 发明授权

US5917211A Semiconductor integrated circuit, method of fabricating the same and apparatus for fabricating the same 失效
标题翻译：半导体集成电路及其制造方法及其制造装置
公开(公告)号：US5917211A
公开(公告)日：1999-06-29
申请号：US979543
申请日：1997-11-25
申请人： Jun Murata , Yoshitaka Tadaki , Hiroko Kaneko , Toshihiro Sekiguchi , Hiroyuki Uchiyama , Hisashi Nakamura , Toshio Maeda , Osamu Kasahara , Hiromichi Enami , Atsushi Ogishima , Masaki Nagao , Michimasa Funabashi , Yasuo Kiguchi , Masayuki Kojima , Atsuyoshi Koike , Hiroyuki Miyazawa , Masato Sadaoka , Kazuya Kadota , Tadashi Chikahara , Kazuo Nojiri , Yutaka Kobayashi
发明人： Jun Murata , Yoshitaka Tadaki , Hiroko Kaneko , Toshihiro Sekiguchi , Hiroyuki Uchiyama , Hisashi Nakamura , Toshio Maeda , Osamu Kasahara , Hiromichi Enami , Atsushi Ogishima , Masaki Nagao , Michimasa Funabashi , Yasuo Kiguchi , Masayuki Kojima , Atsuyoshi Koike , Hiroyuki Miyazawa , Masato Sadaoka , Kazuya Kadota , Tadashi Chikahara , Kazuo Nojiri , Yutaka Kobayashi
IPC分类号： H01L21/8234 , H01L27/105 , H01L27/08 , H01L29/76 , H01L29/94
CPC分类号： H01L27/105 , H01L21/823425
摘要： A semiconductor integrated circuit comprising first n-channel MISFETs constituting the memory cells of a storage system, second n-channel MISFETs constituting the peripheral circuits of the storage system, and third n-channel MISFETs constituting the output circuit among the peripheral circuits. The respective threshold voltages of the first n-channel MISFETs, the second n-channel MISFETs and the third n-channel MISFETs are decreased in that order when the respective gate lengths of those MISFETs are substantially the same.
摘要翻译：一种半导体集成电路，包括构成存储系统的存储单元的第一n沟道MISFET，构成存储系统的外围电路的第二n沟道MISFET和构成外围电路中的输出电路的第三n沟道MISFET。当这些MISFET的各个栅极长度基本相同时，第一n沟道MISFET，第二n沟道MISFET和第三n沟道MISFET的阈值电压依次减小。

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