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1. 发明授权

US5631182A Method of making a semiconductor memory circuit device 失效
标题翻译：制造半导体存储器电路器件的方法
公开(公告)号：US5631182A
公开(公告)日：1997-05-20
申请号：US327861
申请日：1994-10-18
申请人： Naokatsu Suwanai , Hiroyuki Miyazawa , Atushi Ogishima , Masaki Nagao , Kyoichiro Asayama , Hiroyuki Uchiyama , Yoshiyuki Kaneko , Takashi Yoneoka , Kozo Watanabe , Kazuya Endo , Hiroki Soeda
发明人： Naokatsu Suwanai , Hiroyuki Miyazawa , Atushi Ogishima , Masaki Nagao , Kyoichiro Asayama , Hiroyuki Uchiyama , Yoshiyuki Kaneko , Takashi Yoneoka , Kozo Watanabe , Kazuya Endo , Hiroki Soeda
IPC分类号： H01L21/8242 , H01L27/108
CPC分类号： H01L27/10844 , H01L27/10805 , H01L27/10808
摘要： In a semiconductor memory circuit device wherein each memory cell is constituted by a series circuit of a memory cell selecting MISFET and an information storing capacitor of a stacked structure, there are present in a first region as a memory cell array region a first MISFET having a gate electrode and source and drain regions; first and second capacity electrodes and a dielectric film extending onto a first insulating film on the gate electrode; a second insulating film positioned on the second capacity electrode; and a first wiring positioned on the second insulating film, while in a second region as a peripheral circuit region there are present a second MISFET having a gate electrode and source and drain regions; a first insulating film on the gate electrode; a third insulating film on the first insulating film; a second insulating film on the third insulating film; and a second wiring on the second insulating film.
摘要翻译：在其中每个存储单元由存储单元选择MISFET的串联电路和层叠结构的信息存储电容器构成的半导体存储器电路器件中，在第一区域中存在作为存储单元阵列区域的第一MISFET，其具有栅极电极和源极和漏极区域; 第一和第二电容电极和延伸到栅电极上的第一绝缘膜上的电介质膜; 位于所述第二容量电极上的第二绝缘膜; 以及位于所述第二绝缘膜上的第一布线，而在作为外围电路区域的第二区域中存在具有栅极电极和源极和漏极区域的第二MISFET; 栅电极上的第一绝缘膜; 第一绝缘膜上的第三绝缘膜; 第三绝缘膜上的第二绝缘膜; 以及在第二绝缘膜上的第二布线。

2. 发明申请

US20100007024A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20100007024A1
公开(公告)日：2010-01-14
申请号：US12563588
申请日：2009-09-21
申请人： Ken UCHIKOSHI , Naokatsu Suwanai , Atsushi Tachigami , Katsuhiko Hotta , Masahi Sahara , Kazuhiko Sato
发明人： Ken UCHIKOSHI , Naokatsu Suwanai , Atsushi Tachigami , Katsuhiko Hotta , Masahi Sahara , Kazuhiko Sato
IPC分类号： H01L23/48
CPC分类号： H01L23/60 , H01L21/76801 , H01L21/76811 , H01L21/76813 , H01L21/76829 , H01L21/76832 , H01L21/76834 , H01L21/76897 , H01L23/53223 , H01L23/53238 , H01L23/53295 , H01L23/585 , H01L24/05 , H01L24/48 , H01L2224/02166 , H01L2224/04042 , H01L2224/05554 , H01L2224/05599 , H01L2224/48463 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/0102 , H01L2924/01023 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01042 , H01L2924/01046 , H01L2924/0105 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/1305 , H01L2924/1306 , H01L2924/14 , H01L2224/45099 , H01L2924/00
摘要： A semiconductor IC device which includes a circuit region and a peripheral region on a main surface of a semiconductor substrate, a first insulating film formed over the main surface, external terminals arranged in the peripheral region and formed over the first insulating film, a conductive guard ring formed over the first insulating film and provided around the external terminals, and second insulating films formed in the internal region and the peripheral region, the second insulating film in the peripheral region is formed over the first insulating film and over the guard ring and is contacting the external terminals, the second insulating films of the circuit region and that of the peripheral region are separately formed and are isolated from each other. Separate second insulating film may be formed over the wirings of one or more of existing wiring levels of the semiconductor device.
摘要翻译：一种半导体IC器件，包括在半导体衬底的主表面上的电路区域和周边区域，形成在主表面上的第一绝缘膜，布置在周边区域中并形成在第一绝缘膜上的外部端子，导电保护层环形成在第一绝缘膜上并且设置在外部端子周围，并且在内部区域和外围区域中形成的第二绝缘膜，周边区域中的第二绝缘膜形成在第一绝缘膜上并在保护环上方，并且是接触外部端子，电路区域的第二绝缘膜和外围区域的第二绝缘膜分开形成并彼此隔离。可以在半导体器件的一个或多个现有布线层的布线上形成单独的第二绝缘膜。

3. 发明授权

US07303986B2 Semiconductor device and a method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07303986B2
公开(公告)日：2007-12-04
申请号：US11602196
申请日：2006-11-21
申请人： Ken Uchikoshi , Naokatsu Suwanai , Atsushi Tachigami , Katsuhiko Hotta , Masashi Sahara , Kazuhiko Sato
发明人： Ken Uchikoshi , Naokatsu Suwanai , Atsushi Tachigami , Katsuhiko Hotta , Masashi Sahara , Kazuhiko Sato
IPC分类号： H01L21/4763
CPC分类号： H01L23/60 , H01L21/76801 , H01L21/76811 , H01L21/76813 , H01L21/76829 , H01L21/76832 , H01L21/76834 , H01L21/76897 , H01L23/53223 , H01L23/53238 , H01L23/53295 , H01L23/585 , H01L24/05 , H01L24/48 , H01L2224/02166 , H01L2224/04042 , H01L2224/05554 , H01L2224/05599 , H01L2224/48463 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/0102 , H01L2924/01023 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01042 , H01L2924/01046 , H01L2924/0105 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/1305 , H01L2924/1306 , H01L2924/14 , H01L2224/45099 , H01L2924/00
摘要： An insulating portion of the respective wiring layers for a semiconductor device is constituted of insulating films. The one insulating film is made of a material whose conductivity is higher than that of the other insulating film that is made of an ordinary silicon oxide film and is provided in contact with the wiring. An electric charge accumulated in the wiring generated in the course of manufacture of the semiconductor device is discharged through the one insulating film at a stage where a charge accumulation in the wiring is low. This permits the heat release value generated through the discharge to be suppressed to a low level, and the short-circuiting-failure between adjacent wirings to be suppressed or prevented.
摘要翻译：半导体器件的各个布线层的绝缘部分由绝缘膜构成。一个绝缘膜由导电率高于由普通氧化硅膜制成并与布线接触的另一绝缘膜的导电率的材料制成。在半导体器件的制造过程中产生的布线中累积的电荷在布线中的电荷累积低的阶段通过一个绝缘膜放电。这允许通过放电产生的放热值被抑制到低水平，并且相邻布线之间的短路故障被抑制或防止。

4. 发明授权

US07705462B2 Semiconductor device and a method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07705462B2
公开(公告)日：2010-04-27
申请号：US12563588
申请日：2009-09-21
申请人： Ken Uchikoshi , Naokatsu Suwanai , Atsushi Tachigami , Katsuhiko Hotta , Masashi Sahara , Kazuhiko Sato
发明人： Ken Uchikoshi , Naokatsu Suwanai , Atsushi Tachigami , Katsuhiko Hotta , Masashi Sahara , Kazuhiko Sato
IPC分类号： H01L29/40
CPC分类号： H01L23/60 , H01L21/76801 , H01L21/76811 , H01L21/76813 , H01L21/76829 , H01L21/76832 , H01L21/76834 , H01L21/76897 , H01L23/53223 , H01L23/53238 , H01L23/53295 , H01L23/585 , H01L24/05 , H01L24/48 , H01L2224/02166 , H01L2224/04042 , H01L2224/05554 , H01L2224/05599 , H01L2224/48463 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/0102 , H01L2924/01023 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01042 , H01L2924/01046 , H01L2924/0105 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/1305 , H01L2924/1306 , H01L2924/14 , H01L2224/45099 , H01L2924/00
摘要： A semiconductor IC device which includes a circuit region and a peripheral region on a main surface of a semiconductor substrate, a first insulating film formed over the main surface, external terminals arranged in the peripheral region and formed over the first insulating film, a conductive guard ring formed over the first insulating film and provided around the external terminals, and second insulating films formed in the internal region and the peripheral region, the second insulating film in the peripheral region is formed over the first insulating film and over the guard ring and is contacting the external terminals, the second insulating films of the circuit region and that of the peripheral region are separately formed and are isolated from each other. Separate second insulating film may be formed over the wirings of one or more of existing wiring levels of the semiconductor device.
摘要翻译：一种半导体IC器件，包括在半导体衬底的主表面上的电路区域和周边区域，形成在主表面上的第一绝缘膜，布置在周边区域中并形成在第一绝缘膜上的外部端子，导电保护层环形成在第一绝缘膜上并且设置在外部端子周围，并且在内部区域和外围区域中形成的第二绝缘膜，周边区域中的第二绝缘膜形成在第一绝缘膜上并在保护环上方并且是接触外部端子，电路区域的第二绝缘膜和外围区域的第二绝缘膜分开形成并彼此隔离。可以在半导体器件的一个或多个现有布线层的布线上形成单独的第二绝缘膜。

5. 发明申请

US20080277794A1 SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20080277794A1
公开(公告)日：2008-11-13
申请号：US12137904
申请日：2008-06-12
申请人： Ken Uchikoshi , Naokatsu Suwanai , Atsushi Tachigami , Katsuhiko Hotta , Masashi Sahara , Kazuhiko Sato
发明人： Ken Uchikoshi , Naokatsu Suwanai , Atsushi Tachigami , Katsuhiko Hotta , Masashi Sahara , Kazuhiko Sato
IPC分类号： H01L23/48
CPC分类号： H01L23/60 , H01L21/76801 , H01L21/76811 , H01L21/76813 , H01L21/76829 , H01L21/76832 , H01L21/76834 , H01L21/76897 , H01L23/53223 , H01L23/53238 , H01L23/53295 , H01L23/585 , H01L24/05 , H01L24/48 , H01L2224/02166 , H01L2224/04042 , H01L2224/05554 , H01L2224/05599 , H01L2224/48463 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/0102 , H01L2924/01023 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01042 , H01L2924/01046 , H01L2924/0105 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/1305 , H01L2924/1306 , H01L2924/14 , H01L2224/45099 , H01L2924/00
摘要： A semiconductor IC device which includes a circuit region and a peripheral region on a main surface of a semiconductor substrate, a first insulating film formed over the main surface, external terminals arranged in the peripheral region and formed over the first insulating film, a conductive guard ring formed over the first insulating film and provided around the external terminals, and second insulating films formed in the internal region and the peripheral region, the second insulating film in the peripheral region is formed over the first insulating film and over the guard ring and is contacting the external terminals, the second insulating films of the circuit region and that of the peripheral region are separately formed and are isolated from each other. Separate second insulating film may be formed over the wirings of one or more of existing wiring levels of the semiconductor device.
摘要翻译：一种半导体IC器件，包括在半导体衬底的主表面上的电路区域和周边区域，形成在主表面上的第一绝缘膜，布置在周边区域中并形成在第一绝缘膜上的外部端子，导电保护层环形成在第一绝缘膜上并且设置在外部端子周围，并且在内部区域和外围区域中形成的第二绝缘膜，周边区域中的第二绝缘膜形成在第一绝缘膜上并在保护环上方，并且是接触外部端子，电路区域的第二绝缘膜和外围区域的第二绝缘膜分开形成并彼此隔离。可以在半导体器件的一个或多个现有布线层的布线上形成单独的第二绝缘膜。

6. 发明授权

US07189637B2 Method of manufacturing a semiconductor device having a multi-layered wiring structure 有权
标题翻译：具有多层布线结构的半导体器件的制造方法
公开(公告)号：US07189637B2
公开(公告)日：2007-03-13
申请号：US10732518
申请日：2003-12-11
申请人： Ken Uchikoshi , Naokatsu Suwanai , Atsushi Tachigami , Katsuhiko Hotta , Masashi Sahara , Kazuhiko Sato
发明人： Ken Uchikoshi , Naokatsu Suwanai , Atsushi Tachigami , Katsuhiko Hotta , Masashi Sahara , Kazuhiko Sato
IPC分类号： H01L21/4763
CPC分类号： H01L23/60 , H01L21/76801 , H01L21/76811 , H01L21/76813 , H01L21/76829 , H01L21/76832 , H01L21/76834 , H01L21/76897 , H01L23/53223 , H01L23/53238 , H01L23/53295 , H01L23/585 , H01L24/05 , H01L24/48 , H01L2224/02166 , H01L2224/04042 , H01L2224/05554 , H01L2224/05599 , H01L2224/48463 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/0102 , H01L2924/01023 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01042 , H01L2924/01046 , H01L2924/0105 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/1305 , H01L2924/1306 , H01L2924/14 , H01L2224/45099 , H01L2924/00
摘要： An insulating portion of the respective wiring layers for a semiconductor device is constituted of insulating films. The one insulating film is made of a material whose conductivity is higher than that of the other insulating film that is made of an ordinary silicon oxide film and is provided in contact with the wiring. An electric charge accumulated in the wiring generated in the course of manufacture of the semiconductor device is discharged through the one insulating film at a stage where a charge accumulation in the wiring is low. This permits the heat release value generated through the discharge can be suppressed to a low level, and the short-circuiting failure between adjacent wirings can be suppressed or prevented.
摘要翻译：半导体器件的各个布线层的绝缘部分由绝缘膜构成。一个绝缘膜由导电率高于由普通氧化硅膜制成并与布线接触的另一绝缘膜的导电率的材料制成。在半导体器件的制造过程中产生的布线中累积的电荷在布线中的电荷累积低的阶段通过一个绝缘膜放电。这允许通过放电产生的放热值可以被抑制到低水平，并且可以抑制或防止相邻布线之间的短路故障。

7. 发明授权

US07400046B2 Semiconductor device with guard rings that are formed in each of the plural wiring layers 有权
标题翻译：具有形成在所述多个布线层中的每一个中的保护环的半导体装置
公开(公告)号：US07400046B2
公开(公告)日：2008-07-15
申请号：US11806444
申请日：2007-05-31
申请人： Ken Uchikoshi , Naokatsu Suwanai , Atsushi Tachigami , Katsuhiko Hotta , Masashi Sahara , Kazuhiko Sato
发明人： Ken Uchikoshi , Naokatsu Suwanai , Atsushi Tachigami , Katsuhiko Hotta , Masashi Sahara , Kazuhiko Sato
IPC分类号： H01L29/40
CPC分类号： H01L23/60 , H01L21/76801 , H01L21/76811 , H01L21/76813 , H01L21/76829 , H01L21/76832 , H01L21/76834 , H01L21/76897 , H01L23/53223 , H01L23/53238 , H01L23/53295 , H01L23/585 , H01L24/05 , H01L24/48 , H01L2224/02166 , H01L2224/04042 , H01L2224/05554 , H01L2224/05599 , H01L2224/48463 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/0102 , H01L2924/01023 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01042 , H01L2924/01046 , H01L2924/0105 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/1305 , H01L2924/1306 , H01L2924/14 , H01L2224/45099 , H01L2924/00
摘要： A semiconductor IC device which includes a circuit region and a peripheral region on a main surface of a semiconductor substrate, a first insulating film formed over the main surface, external terminals arranged in the peripheral region and formed over the first insulating film, a conductive guard ring formed over the first insulating film and provided around the external terminals, and second insulating films formed in the internal region and the peripheral region, the second insulating film in the peripheral region is formed over the first insulating film and over the guard ring and is contacting the external terminals, the second insulating films of the circuit region and that of the peripheral region are separately formed and are isolated from each other. Separate second insulating film may be formed over the wirings of one or more of existing wiring levels of the semiconductor device.
摘要翻译：一种半导体IC器件，包括在半导体衬底的主表面上的电路区域和周边区域，形成在主表面上的第一绝缘膜，布置在周边区域中并形成在第一绝缘膜上的外部端子，导电保护层环形成在第一绝缘膜上并且设置在外部端子周围，并且在内部区域和外围区域中形成的第二绝缘膜，周边区域中的第二绝缘膜形成在第一绝缘膜上并在保护环上方，并且是接触外部端子，电路区域的第二绝缘膜和外围区域的第二绝缘膜分开形成并彼此隔离。可以在半导体器件的一个或多个现有布线层的布线上形成单独的第二绝缘膜。

8. 发明申请

US20070066050A1 Semiconductor device and a method of manufacturing the same 有权
公开(公告)号：US20070066050A1
公开(公告)日：2007-03-22
申请号：US11602196
申请日：2006-11-21
申请人： Ken Uchikoshi , Naokatsu Suwanai , Atsushi Tachigami , Katsuhiko Hotta , Masashi Sahara , Kazuhiko Sato
发明人： Ken Uchikoshi , Naokatsu Suwanai , Atsushi Tachigami , Katsuhiko Hotta , Masashi Sahara , Kazuhiko Sato
IPC分类号： H01L21/4763
CPC分类号： H01L23/60 , H01L21/76801 , H01L21/76811 , H01L21/76813 , H01L21/76829 , H01L21/76832 , H01L21/76834 , H01L21/76897 , H01L23/53223 , H01L23/53238 , H01L23/53295 , H01L23/585 , H01L24/05 , H01L24/48 , H01L2224/02166 , H01L2224/04042 , H01L2224/05554 , H01L2224/05599 , H01L2224/48463 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/0102 , H01L2924/01023 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01042 , H01L2924/01046 , H01L2924/0105 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/1305 , H01L2924/1306 , H01L2924/14 , H01L2224/45099 , H01L2924/00
摘要： An insulating portion of the respective wiring layers for a semiconductor device is constituted of insulating films. The one insulating film is made of a material whose conductivity is higher than that of the other insulating film that is made of an ordinary silicon oxide film and is provided in contact with the wiring. An electric charge accumulated in the wiring generated in the course of manufacture of the semiconductor device is discharged through the one insulating film at a stage where a charge accumulation in the wiring is low. This permits the heat release value generated through the discharge to be suppressed to a low level, and the short-circuiting-failure between adjacent wirings to be suppressed or prevented.

9. 发明授权

US5237187A Semiconductor memory circuit device and method for fabricating same 失效
标题翻译：半导体存储器电路器件及其制造方法
公开(公告)号：US5237187A
公开(公告)日：1993-08-17
申请号：US799541
申请日：1991-11-27
申请人： Naokatsu Suwanai , Hiroyuki Miyazawa , Atushi Ogishima , Masaki Nagao , Kyoichiro Asayama , Hiroyuki Uchiyama , Yoshiyuki Kaneko , Takashi Yoneoka , Kozo Watanabe , Kazuya Endo , Hiroki Soeda
发明人： Naokatsu Suwanai , Hiroyuki Miyazawa , Atushi Ogishima , Masaki Nagao , Kyoichiro Asayama , Hiroyuki Uchiyama , Yoshiyuki Kaneko , Takashi Yoneoka , Kozo Watanabe , Kazuya Endo , Hiroki Soeda
IPC分类号： H01L21/8242 , H01L27/108
CPC分类号： H01L27/10844 , H01L27/10805 , H01L27/10808
摘要： In a semiconductor memory circuit device wherein each memory cell is constituted by a series circuit of a memory cell selecting MISFET and an information storing capacitor of a stacked structure, there are present in a first region, which is a memory cell array region, a first MISFET having a gate electrode and source and drain regions; first and second capacitor electrodes and a dielectric film extended over a first insulating film and over the gate electrode; a second insulating film disposed on the second capacitor electrode; a third insulating film interposed between the first insulating film and first capacitor electrode; and a first wiring positioned on the second insulating film. In a second region of the device, which is a peripheral circuit region, there are present a second MISFET having a gate electrode and source and drain regions; a first insulating film on the gate electrode; a second insulating film on a third insulating film, the third insulating film being interposed between the first and second insulating films; and a second wiring on the second insulating film. The second wiring is formed by the same level conductor layer as that forming the first wiring. Similarly, the first through third insulating films of the first region are correspondingly associated with the first through third insulating films of the second region, respectively.
摘要翻译：在其中每个存储单元由存储单元选择MISFET的串联电路和层叠结构的信息存储电容器构成的半导体存储器电路器件中，存在作为存储单元阵列区域的第一区域，第一 MISFET具有栅极电极和源极和漏极区域; 第一和第二电容器电极以及在第一绝缘膜上并在栅电极上方延伸的电介质膜; 设置在所述第二电容器电极上的第二绝缘膜; 介于所述第一绝缘膜和所述第一电容器电极之间的第三绝缘膜; 以及位于第二绝缘膜上的第一布线。在作为外围电路区域的器件的第二区域中，存在具有栅极电极和源极和漏极区域的第二MISFET，栅电极上的第一绝缘膜; 在第三绝缘膜上的第二绝缘膜，所述第三绝缘膜介于所述第一和第二绝缘膜之间; 以及在第二绝缘膜上的第二布线。第二布线由与形成第一布线的层相同的导体层形成。类似地，第一区域的第一至第三绝缘膜分别与第二区域的第一至第三绝缘膜相关联。

10. 发明授权

US5025741A Method of making semiconductor integrated circuit device with polysilicon contacts 失效
标题翻译：制造具有多晶硅接触的半导体集成电路器件的方法
公开(公告)号：US5025741A
公开(公告)日：1991-06-25
申请号：US344404
申请日：1989-04-28
申请人： Naokatsu Suwanai , Osamu Tsuchiya
发明人： Naokatsu Suwanai , Osamu Tsuchiya
IPC分类号： H01L23/52 , H01L21/20 , H01L21/28 , H01L21/285 , H01L21/31 , H01L21/3205 , H01L21/768 , H01L21/822 , H01L21/8242 , H01L23/522 , H01L23/532 , H01L27/04 , H01L27/10 , H01L27/108 , H01L29/43
CPC分类号： H01L21/28525 , H01L21/2022 , H01L21/32055 , H01L23/53271 , H01L2924/0002
摘要： A semiconductor integrated circuit device having a wiring line of aluminum film or aluminum alloy film covered with a silicon insulation film and connected to the semiconductor region formed on the principal surface of a single crystal silicon substrate, with a polycrystalline silicon film interposed, wherein said silicon film is a polycrystalline silicon film composed of large crystal grains which is formed by depositing in amorphous state and then heat-treating the deposited film, said polycrystalline silicon film reduces the amount of silicon atoms which separates out in said wiring line. Also said wiring line is provided with a shielding film which is disposed between said insulation film and at least the upper surface and lower surface of said wiring line and which prevents silicon atoms from separating out from said insulation film.A process for manufacturing a semiconductor integrated circuit device which comprises the steps of depositing an amorphous silicon film on the principal surface of said semiconductor region, and performing heat treatment on said silicon film, thereby converting the amorphous silicon film into a polycrystalline silicon film composed of large crystal grains.
摘要翻译：一种半导体集成电路器件，其具有覆盖有硅绝缘膜的铝膜或铝合金膜的布线，并且与形成在单晶硅衬底的主表面上的半导体区域连接，并插入多晶硅膜，其中所述硅膜是由非晶态沉积形成的大晶粒构成的多晶硅膜，然后对沉积膜进行热处理，所述多晶硅膜减少了在所述布线中分离的硅原子的量。所述布线还设置有屏蔽膜，所述屏蔽膜设置在所述绝缘膜和所述布线的至少所述上表面和下表面之间，并且防止硅原子与所述绝缘膜分离。一种制造半导体集成电路器件的方法，包括以下步骤：在所述半导体区域的主表面上沉积非晶硅膜，并对所述硅膜进行热处理，从而将非晶硅膜转化为由大晶粒。

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