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1. 发明申请

WO2017046447A1 METHOD AND APPARATUS FOR AMPLIFYING SIGNALS 审中-公开
标题翻译：放大信号的方法和装置
公开(公告)号：WO2017046447A1
公开(公告)日：2017-03-23
申请号：PCT/FI2016/050628
申请日：2016-09-12
申请人： NOKIA TECHNOLOGIES OY
发明人： ÖSTMAN, Kim
IPC分类号： H03F1/26 , H03F3/193 , H03F3/45 , H03F3/26
CPC分类号： H03F1/26 , H03F3/193 , H03F3/265 , H03F3/45179 , H03F2200/09 , H03F2200/18 , H03F2200/369 , H03F2200/541 , H03F2200/72 , H03F2203/45112 , H03F2203/45306 , H03F2203/45332
摘要： There are disclosed various methods and apparatuses for amplifying a signal. In some embodiments of the method a signal is provided to an input (S) of a transconducting element (T) of an amplifier. An amplified signal is formed on the basis of the input signal by the transconducting element (T). The amplified signal is provided to an output stage. A negative conductance (R neg ) in the output stage is used to adjust a gain and a noise figure of the amplifier. The amplified signal is provided via a feedback element (ßC fb ) to another input (G) of the transconducting element (T). In some embodiments the apparatus comprises means for implementing the method.
摘要翻译：公开了用于放大信号的各种方法和装置。在该方法的一些实施例中，将信号提供给放大器的跨导元件（T）的输入（S）。基于跨导元件（T）的输入信号形成放大信号。放大的信号被提供给输出级。输出级的负电导（Rneg）用于调整放大器的增益和噪声系数。放大的信号通过反馈元件（ßCfb）提供给跨导元件（T）的另一个输入（G）。在一些实施例中，装置包括用于实现该方法的装置。

2. 发明申请

WO2016146162A1 AMPLIFIER ADAPTED FOR NOISE SUPPRESSION 审中-公开
标题翻译：适用于噪声抑制的放大器
公开(公告)号：WO2016146162A1
公开(公告)日：2016-09-22
申请号：PCT/EP2015/055454
申请日：2015-03-16
申请人： TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)
发明人： MASTANTUONO, Daniele , MATTISSON, Sven
IPC分类号： H03F1/26
CPC分类号： H03F1/26 , H03F1/0205 , H03F1/3211 , H03F1/483 , H03F3/193 , H03F3/45179 , H03F3/607 , H03F2200/06 , H03F2200/294 , H03F2200/333 , H03F2200/451 , H03F2203/45306 , H03F2203/45318 , H04B1/12
摘要： An amplifier (100) adapted for noise suppression comprises a first input (102) for receiving a first input signal and a second input (104) for receiving a second input signal, the first and second input signals constituting a differential pair. A first output (106) delivers a first output signal and a second output (108) delivers a second output signal, the first and second output signals constituting a differential pair. A first transistor (M CG1 ) has a first drain (110) coupled to the first output (106) such that all signal current, except parasitic losses, flowing through the first drain (110) flows through the first output (106), and the first transistor (M CG1 ) further having a first source (112) coupled to the first input (102). A second transistor (M Cs1 ) has a second gate (116) coupled to the first input (102), a second drain (118) coupled to the second output (108) such that all signal current, except parasitic losses, flowing through the second drain (118) flows through the second output (108), and the second transistor (M Cs1 ) further having a second source (120) coupled to a first voltage rail (122). A third transistor (M Cs2 ) has a third gate (124) coupled to the second input (104), a third drain (126) coupled to the first output (106) such that all signal current, except parasitic losses, flowing through the third drain (126) flows through the first output (106), and the third transistor (M Cs2 ) further having a third source (128) coupled to the first voltage rail (122). A fourth transistor (M CG2 ) has a fourth drain (130) coupled to the second output (108) such that all signal current, except parasitic losses, flowing through the fourth drain (130) flows through the second output (108), and the fourth transistor (M CG2 ) further having a fourth source (132) coupled to the second input (104). A first load (Z L1 ) is coupled between the first output (106) and a second voltage rail (136). A second load (Z L2 ) is coupled between the second output (108) and the second voltage rail (136). A first inductive element (L 1 ) is coupled between the first input (102) and a third voltage rail (138), and a second inductive element (L 2 ) is coupled between the second input (104) and the third voltage rail (138). Transconductance of the first transistor (MCG1) is substantially equal to transconductance of the fourth transistor (M CG2 ), within ±5%, and transconductance of the second transistor (M Cs1 ) is substantially equal to transconductance of the third transistor (M Cs2 ), within ±5%.
摘要翻译：适于噪声抑制的放大器（100）包括用于接收第一输入信号的第一输入端（102）和用于接收第二输入信号的第二输入端（104），所述第一和第二输入信号构成差分对。第一输出（106）传送第一输出信号，第二输出（108）传送第二输出信号，第一和第二输出信号构成差分对。第一晶体管（MCG1）具有耦合到第一输出端（106）的第一漏极（110），使得流过第一漏极（110）的除寄生损耗之外的所有信号电流流过第一输出端（106），并且第一晶体管（MCG1）还具有耦合到第一输入端（102）的第一源极（112）。第二晶体管（MCs1）具有耦合到第一输入端（102）的第二栅极（116），耦合到第二输出端（108）的第二漏极（118），使得除寄生损耗之外的所有信号电流流过第二输入端漏极（118）流过第二输出（108），而第二晶体管（MCs1）还具有耦合到第一电压轨道（122）的第二源极（120）。第三晶体管（MCs2）具有耦合到第二输入端（104）的第三栅极（124），耦合到第一输出端（106）的第三漏极（126），使得除寄生损耗之外的所有信号电流流过第三输入端漏极（126）流过第一输出（106），而第三晶体管（MCs2）还具有耦合到第一电压轨（122）的第三源极（128）。第四晶体管（MCG2）具有耦合到第二输出（108）的第四漏极（130），使得流过第四漏极（130）的除了寄生损耗之外的所有信号电流流经第二输出（108），并且第四晶体管（MCG2）还具有耦合到第二输入端（104）的第四源极（132）。第一负载（ZL1）耦合在第一输出（106）和第二电压轨（136）之间。第二负载（ZL2）耦合在第二输出（108）和第二电压轨（136）之间。第一电感元件（L1）耦合在第一输入（102）和第三电压轨（138）之间，第二电感元件（L2）耦合在第二输入（104）和第三电压轨（138）之间，。第一晶体管（MCG1）的跨导基本上等于第四晶体管（MCG2）的跨导在±5％以内，并且第二晶体管（MCs1）的跨导基本上等于第三晶体管（MCs2）的跨导在± 5％。

3. 发明申请

WO2015146247A1 可変利得トランスインピーダンスアンプ审中-公开
标题翻译：可变增益放大器
公开(公告)号：WO2015146247A1
公开(公告)日：2015-10-01
申请号：PCT/JP2015/051459
申请日：2015-01-21
申请人：日本電信電話株式会社 , NTTエレクトロニクス株式会社
发明人：中野　慎介 , 野河　正史 , 野坂　秀之 , 福山　裕之 , 十林　正俊 , 栗田　茂弘 , 遠藤　雅広
IPC分类号： H03F3/08 , H03F3/45 , H03G3/10
CPC分类号： H03F3/08 , H03F1/3211 , H03F3/4508 , H03F2203/45306 , H03F2203/45318 , H03G1/0023
摘要：　トランスインピーダンスアンプは、エミッタが信号入力端子に接続され、コレクタが信号出力端子に接続され、ベース接地されたトランジスタ（Ｑ１）と、一端がトランジスタ（Ｑ１）のエミッタに接続され、他端が負側電源電圧に接続された定電流源（ＩＳ１）と、正側電源電圧とトランジスタ（Ｑ１）のコレクタとの間に直列に接続された負荷抵抗（ＲＬ１，ＲＬ２）と、一端が負荷抵抗（ＲＬ１，ＲＬ２）の接続点に接続され、他端がトランジスタ（Ｑ１）のエミッタに接続され、利得可変制御電圧（Ｖｃｔｌ）に応じて電流量を制御することが可能な可変電流源（ＩＳ２）とを備える。
摘要翻译：该跨阻放大器设置有：具有连接到信号输入端子的发射极，连接到信号输出端子的集电极和接地基极的晶体管（Q1）一个恒流源（IS1），其一端连接到晶体管（Q1）的发射极，另一端连接到负侧电源电压; 串联在正侧电源电压和晶体管（Q1）的集电极之间的负载电阻（RL1，RL2）; 以及可变电流源（IS2），其一端连接到负载电阻（RL1，RL2）的连接点，另一端连接到晶体管（Q1）的发射极，并且可以根据变量控制电流强度增益控制电压（Vctl）。

4. 发明申请

WO2013053661A1 A LOW-NOISE AMPLIFIER CIRCUIT 审中-公开
标题翻译：低噪声放大器电路
公开(公告)号：WO2013053661A1
公开(公告)日：2013-04-18
申请号：PCT/EP2012/069821
申请日：2012-10-08
申请人： ST-ERICSSON SA
发明人： RIVOIRARD, Frédéric
IPC分类号： H03F1/22 , H03F3/45 , H03F1/26 , H03F1/56 , H03F3/195 , H03F1/32
CPC分类号： H03F1/3205 , H03F1/26 , H03F1/3211 , H03F1/56 , H03F3/193 , H03F3/195 , H03F3/211 , H03F3/45179 , H03F3/45273 , H03F2200/06 , H03F2200/09 , H03F2200/294 , H03F2200/451 , H03F2203/45091 , H03F2203/45306 , H03F2203/45311 , H03F2203/45312 , H03F2203/45334 , H03F2203/45512 , H03F2203/45544 , H03F2203/45562 , H03F2203/45576
摘要： The low-noise amplifier circuit exhibits reduced noise.
摘要翻译：低噪声放大器电路表现出降低的噪声。

5. 发明申请

WO2012158429A1 POSITIVE FEEDBACK COMMON GATE LOW NOISE AMPLIFIER 审中-公开
标题翻译：正反馈通用门低噪声放大器
公开(公告)号：WO2012158429A1
公开(公告)日：2012-11-22
申请号：PCT/US2012/037105
申请日：2012-05-09
申请人： QUALCOMM Incorporated , KIM, Namsoo , BURKE, Joseph Patrick
发明人： KIM, Namsoo , BURKE, Joseph Patrick
IPC分类号： H03F3/45 , H03F1/38 , H03F1/26 , H03F1/42 , H03F1/56 , H03F3/193 , H03F1/22
CPC分类号： H03F3/45179 , H03F1/223 , H03F1/26 , H03F1/38 , H03F1/42 , H03F1/565 , H03F3/193 , H03F2200/294 , H03F2200/36 , H03F2203/45306 , H03F2203/45311 , H03F2203/45318 , H03F2203/45386 , H03F2203/45394 , H03F2203/45511 , H03F2203/45634 , H03F2203/45638
摘要： A Positive Feedback Common Gate Low Noise Amplifier, PFCGLNA, has positive feedback transistors (147, 149 ) and input transistors (151, 153) that are of the same conductivity type. Making the positive feedback and input transistors of the same conductivity type reduces sensitivity to process variations. Noise generated by the positive feedback transistors (147, 149 ) is used to cancel noise generated by the input transistors (151, 153). In one embodiment, the PFCGLNA) is tunable to have a substantially constant input impedance for any frequency in a wideband frequency range from 680 MHz to 980 MHz, and has a noise figure less than 2.2 dB over the entire wideband frequency range.
摘要翻译：正反馈公共门低噪声放大器PFCGLNA具有相同导电类型的正反馈晶体管（147,149）和输入晶体管（151,153）。使正反馈和相同导电类型的输入晶体管降低对工艺变化的敏感性。由正反馈晶体管（147,149）产生的噪声用于消除由输入晶体管（151,153）产生的噪声。在一个实施例中，PFCGLNA）可调谐以对于在680MHz至980MHz的宽带频率范围内的任何频率具有基本上恒定的输入阻抗，并且在整个宽带频率范围内具有小于2.2dB的噪声系数。

6. 发明申请

WO2007050961A2 OPERATIONAL AMPLIFIER WITH ZERO OFFSET 审中-公开
标题翻译：具有零偏移的运算放大器
公开(公告)号：WO2007050961A2
公开(公告)日：2007-05-03
申请号：PCT/US2006/042125
申请日：2006-10-27
申请人： INTERNATIONAL RECTIFIER CORPORATION , THIERY, Vincent
发明人： THIERY, Vincent
IPC分类号： H03F1/02
CPC分类号： H03F3/45995 , H03F3/393 , H03F3/45179 , H03F3/45475 , H03F3/45744 , H03F3/45766 , H03F3/45775 , H03F3/45968 , H03F3/45991 , H03F2200/261 , H03F2200/375 , H03F2200/453 , H03F2200/462 , H03F2200/91 , H03F2203/45044 , H03F2203/45138 , H03F2203/45212 , H03F2203/45291 , H03F2203/45292 , H03F2203/45302 , H03F2203/45306 , H03F2203/45588
摘要： A circuit for minimizing a voltage offset between inverting and non-inverting input terminals of an operational amplifier circuit is provided. The circuit includes a chopper circuit connected to the inverting and non-inverting input terminals of the operational amplifier circuit, the chopper circuit including: an amplifier having differential outputs; and a switching circuit for periodically reversing the input terminals to the amplifier and periodically reversing the outputs of the amplifier to provide an output signal having an offset adjustment signal to the operational amplifier circuit to adjust the offset of the operational amplifier circuit.
摘要翻译：提供了用于最小化运算放大器电路的反相和非反相输入端之间的电压偏移的电路。电路包括连接到运算放大器电路的反相和非反相输入端的斩波电路，斩波电路包括：具有差分输出的放大器; 以及用于周期性地将输入端子反向放大器并周期性地反转放大器的输出以向运算放大器电路提供具有偏移调整信号的输出信号以调整运算放大器电路的偏移的开关电路。

7. 发明申请

WO2017105759A1 WIDEBAND AMPLIFIER CIRCUITS AND METHODS 审中-公开
标题翻译：宽带放大器电路和方法
公开(公告)号：WO2017105759A1
公开(公告)日：2017-06-22
申请号：PCT/US2016/062588
申请日：2016-11-17
申请人： QUALCOMM INCORPORATED
发明人： GATHMAN, Timothy
IPC分类号： H03F1/08 , H03F1/26 , H03F3/19 , H03F3/45 , H03F3/72 , H03F3/24 , H03F1/42
CPC分类号： H03G3/3042 , H03F1/086 , H03F1/26 , H03F1/42 , H03F3/19 , H03F3/195 , H03F3/245 , H03F3/45179 , H03F3/45188 , H03F3/45475 , H03F3/72 , H03F2200/294 , H03F2200/336 , H03F2200/451 , H03F2200/72 , H03F2200/91 , H03F2203/45091 , H03F2203/45288 , H03F2203/45306 , H03F2203/45526
摘要： A wideband amplifier circuit such as a transimpedance amplifier achieves improved amplifier and/or system performance, such as a reduced input impedance. The transimpedance amplifier may use a complementary common gate stage that receives an input signal and generates current to a current summing stage. In one instance, an input current is received by a complimentary common gate stage that includes a first common gate transistor (301) and a second common gate transistor (302), each having different polarities, in which the first terminals of each of the transistors are configured to receive the input current (Si). Each of the transistors generates an output current to a current summing stage (310) that generates an output voltage (Vout) at an output terminal. The output voltage (Vout) may be based on the combined currents from the first common gate transistor (301) and second common gate transistor (302).
摘要翻译：诸如互阻抗放大器之类的宽带放大器电路实现了改进的放大器和/或系统性能，例如降低的输入阻抗。跨阻放大器可以使用接收输入信号并且产生电流到电流求和级的互补共栅级。在一个实例中，输入电流由互补共栅级接收，所述互补共栅级包括均具有不同极性的第一公共栅极晶体管（301）和第二公共栅极晶体管（302），其中每个晶体管的第一端子被配置为接收输入电流（Si）。每个晶体管产生输出电流到电流求和级（310），该电流求和级在输出端产生输出电压（Vout）。输出电压（Vout）可以基于来自第一公共栅极晶体管（301）和第二公共栅极晶体管（302）的组合电流。

8. 发明申请

WO2016043842A1 COMMON-GATE AMPLIFIER FOR HIGH-SPEED DC-COUPLING COMMUNICATIONS 审中-公开
标题翻译：用于高速直流耦合通信的通用放大器
公开(公告)号：WO2016043842A1
公开(公告)日：2016-03-24
申请号：PCT/US2015/041506
申请日：2015-07-22
申请人： QUALCOMM INCORPORATED
发明人： LI, Miao , SUN, Li , ZHU, Zhi
IPC分类号： H03F3/45 , H04L25/02
CPC分类号： H03F3/45071 , H03F3/183 , H03F3/45179 , H03F3/45677 , H03F3/45713 , H03F2200/129 , H03F2200/255 , H03F2200/36 , H03F2200/453 , H03F2203/45008 , H03F2203/45078 , H03F2203/45112 , H03F2203/45302 , H03F2203/45306 , H03F2203/45418 , H03F2203/45422 , H03F2203/45424 , H04B1/16 , H04L25/0272
摘要： A receiver (305) comprises a differential common-gate amplifier (310) having a differential input and a differential output, wherein the differential input comprises a first input and a second input, and the differential common-gate amplifier (310) is configured to amplify an input differential signal at the differential input into an amplified differential signal at the differential output. The receiver also comprises a common-mode voltage sensor (322) configured to sense a common-mode voltage of the input differential signal, a replica circuit configured to generate a replica voltage that tracks a direct current (DC) voltage at at least one of the first and second inputs, and a comparator configured to compare the sensed common-mode voltage with the replica voltage, and to adjust a first bias voltage input to the differential common-gate amplifier (310) based on the comparison, wherein the DC voltage depends on the first bias voltage.
摘要翻译：接收器（305）包括具有差分输入和差分输出的差分共栅放大器（310），其中所述差分输入包括第一输入和第二输入，并且所述差分共栅放大器（310）被配置为将差分输入处的输入差分信号放大到差分输出处的放大差分信号。接收器还包括被配置为感测输入差分信号的共模电压的共模电压传感器（322），复制电路被配置为产生复制电压，该副电压跟踪至少一个所述第一和第二输入以及比较器，被配置为将所检测的共模电压与所述复制电压进行比较，并且基于所述比较来调整输入到所述差分公共栅放大器的第一偏置电压，其中所述直流电压取决于第一偏置电压。

9. 发明申请

WO2012166897A3 WIDE BANDWIDTH CLASS C AMPLIFIER WITH COMMON-MODE FEEDBACK 审中-公开
标题翻译：带通用模式反馈的宽带级C放大器
公开(公告)号：WO2012166897A3
公开(公告)日：2013-04-25
申请号：PCT/US2012040178
申请日：2012-05-31
申请人： TEXAS INSTRUMENTS INC , TEXAS INSTRUMENTS JAPAN , GINSBURG BRIAN P , RENTALA VIJAY B , RAMASWAMY SRINATH , HAROUN BAHER , SEOK EUNYOUNG
发明人： GINSBURG BRIAN P , RENTALA VIJAY B , RAMASWAMY SRINATH , HAROUN BAHER , SEOK EUNYOUNG
IPC分类号： H03F3/45
CPC分类号： H03F3/45179 , H03F3/45645 , H03F2200/462 , H03F2203/45306 , H03F2203/45418 , H03F2203/45424 , H03F2203/45431 , H03F2203/45442 , H03F2203/45446 , H03F2203/45696 , H03F2203/45702
摘要： In a class C amplifier (100), a common-mode current is applied to a common-gate amplifier (100) and the common-mode current is sensed. In response to the sensed common-mode current, a control voltage is generated. A first feedback current (FBI) generated in response to the control voltage is applied to a differential ground of the common-gate amplifier (110) if the common- mode current is less than a predetermined threshold. Additionally, a second feedback current (FB2) generated in response to the control voltage is applied to input terminals (IN) of the common-gate amplifier (110) if the common-mode current is greater than the predetermined threshold.
摘要翻译：在C类放大器（100）中，共模电流被施加到共门放大器（100），并感测到共模电流。响应感测的共模电流，产生控制电压。如果共模电流小于预定阈值，则响应于控制电压产生的第一反馈电流（FBI）被施加到共栅放大器（110）的差分接地。另外，如果共模电流大于预定阈值，则响应于控制电压产生的第二反馈电流（FB2）被施加到共门放大器（110）的输入端（IN）。

10. 发明申请

WO2007050961A3 OPERATIONAL AMPLIFIER WITH ZERO OFFSET 审中-公开
标题翻译：具有零偏移的运算放大器
公开(公告)号：WO2007050961A3
公开(公告)日：2009-04-23
申请号：PCT/US2006042125
申请日：2006-10-27
申请人： INT RECTIFIER CORP , THIERY VINCENT
发明人： THIERY VINCENT
IPC分类号： H03F1/02
CPC分类号： H03F3/45995 , H03F3/393 , H03F3/45179 , H03F3/45475 , H03F3/45744 , H03F3/45766 , H03F3/45775 , H03F3/45968 , H03F3/45991 , H03F2200/261 , H03F2200/375 , H03F2200/453 , H03F2200/462 , H03F2200/91 , H03F2203/45044 , H03F2203/45138 , H03F2203/45212 , H03F2203/45291 , H03F2203/45292 , H03F2203/45302 , H03F2203/45306 , H03F2203/45588
摘要： A circuit for minimizing a voltage offset between inverting and non-inverting input terminals of an operational amplifier circuit is provided. The circuit includes a chopper circuit connected to the inverting and non-inverting input terminals of the operational amplifier circuit, the chopper circuit including: an amplifier having differential outputs; and a switching circuit for periodically reversing the input terminals to the amplifier and periodically reversing the outputs of the amplifier to provide an output signal having an offset adjustment signal to the operational amplifier circuit to adjust the offset of the operational amplifier circuit.
摘要翻译：提供了用于最小化运算放大器电路的反相和非反相输入端之间的电压偏移的电路。电路包括连接到运算放大器电路的反相和非反相输入端的斩波电路，斩波电路包括：具有差分输出的放大器; 以及用于周期性地将输入端子反向放大器并周期性地反转放大器的输出以向运算放大器电路提供具有偏移调整信号的输出信号以调整运算放大器电路的偏移的开关电路。

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