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1. 发明申请

WO2012158429A1 POSITIVE FEEDBACK COMMON GATE LOW NOISE AMPLIFIER 审中-公开
标题翻译：正反馈通用门低噪声放大器
公开(公告)号：WO2012158429A1
公开(公告)日：2012-11-22
申请号：PCT/US2012/037105
申请日：2012-05-09
申请人： QUALCOMM Incorporated , KIM, Namsoo , BURKE, Joseph Patrick
发明人： KIM, Namsoo , BURKE, Joseph Patrick
IPC分类号： H03F3/45 , H03F1/38 , H03F1/26 , H03F1/42 , H03F1/56 , H03F3/193 , H03F1/22
CPC分类号： H03F3/45179 , H03F1/223 , H03F1/26 , H03F1/38 , H03F1/42 , H03F1/565 , H03F3/193 , H03F2200/294 , H03F2200/36 , H03F2203/45306 , H03F2203/45311 , H03F2203/45318 , H03F2203/45386 , H03F2203/45394 , H03F2203/45511 , H03F2203/45634 , H03F2203/45638
摘要： A Positive Feedback Common Gate Low Noise Amplifier, PFCGLNA, has positive feedback transistors (147, 149 ) and input transistors (151, 153) that are of the same conductivity type. Making the positive feedback and input transistors of the same conductivity type reduces sensitivity to process variations. Noise generated by the positive feedback transistors (147, 149 ) is used to cancel noise generated by the input transistors (151, 153). In one embodiment, the PFCGLNA) is tunable to have a substantially constant input impedance for any frequency in a wideband frequency range from 680 MHz to 980 MHz, and has a noise figure less than 2.2 dB over the entire wideband frequency range.
摘要翻译：正反馈公共门低噪声放大器PFCGLNA具有相同导电类型的正反馈晶体管（147,149）和输入晶体管（151,153）。使正反馈和相同导电类型的输入晶体管降低对工艺变化的敏感性。由正反馈晶体管（147,149）产生的噪声用于消除由输入晶体管（151,153）产生的噪声。在一个实施例中，PFCGLNA）可调谐以对于在680MHz至980MHz的宽带频率范围内的任何频率具有基本上恒定的输入阻抗，并且在整个宽带频率范围内具有小于2.2dB的噪声系数。

2. 发明申请

WO2011036331A1 ADJUSTABLE CIRCUIT ARCHITECTURE 审中-公开
标题翻译：可调节电路架构
公开(公告)号：WO2011036331A1
公开(公告)日：2011-03-31
申请号：PCT/FI2009/050754
申请日：2009-09-22
申请人： NOKIA CORPORATION , KALTIOKALLIO, Mikko , RYYNÄNEN, Jussi
发明人： KALTIOKALLIO, Mikko , RYYNÄNEN, Jussi
IPC分类号： H03F1/32 , H03F3/19
CPC分类号： H03F1/34 , H03F1/3211 , H03F1/3241 , H03F3/19 , H03F3/191 , H03F3/45179 , H03F3/45183 , H03F2200/165 , H03F2200/168 , H03F2200/171 , H03F2200/294 , H03F2200/411 , H03F2203/45511 , H03F2203/45512 , H03F2203/45522 , H03F2203/45528 , H03F2203/45544 , H03F2203/45631 , H03F2203/45638 , H03F2203/45702
摘要： An amplifier circuitry having adjustable parameters is presented. The present amplifier circuitry includes a feedback loop, wherein the feedback loop converts (26) a signal to another frequency, filters (20) the signal in the other frequency, and restores (24) the filtered signal back to the original frequency for inputting the signal to an input of the amplifier (22). The feedback loop implements a band-stop filter (20) having an adjustable stopband causing the amplifier circuitry to have an adjustable band-pass response. A passband of the amplifier circuitry is changed from one operating frequency to another operating frequency by changing frequency conversion parameters of the feedback loop.
摘要翻译：提出了具有可调参数的放大器电路。本放大器电路包括反馈回路，其中反馈回路将信号转换（26）到另一个频率，对另一频率的信号进行滤波（20），并且将滤波后的信号恢复（24）到原始频率，以输入信号到放大器（22）的输入端。反馈环路实现具有可调节阻带的带阻滤波器（20），使得放大器电路具有可调节的带通响应。通过改变反馈回路的变频参数，将放大器电路的通带从一个工作频率改变到另一个工作频率。

3. 发明申请

WO2015066867A1 CLOCK AND DATA DRIVERS WITH ENHANCED TRANSCONDUCTANCE AND SUPPRESSED OUTPUT COMMON-MODE 审中-公开
标题翻译：具有增强的交叉和抑制输出通用模式的时钟和数据驱动器
公开(公告)号：WO2015066867A1
公开(公告)日：2015-05-14
申请号：PCT/CN2013/086674
申请日：2013-11-07
申请人： QUALCOMM INCORPORATED , SU, Wenjun , YIN, Guangming , ZHU, Quanqing
发明人： SU, Wenjun , YIN, Guangming , ZHU, Quanqing
IPC分类号： H03F3/45
CPC分类号： H03F3/45762 , H03F1/0277 , H03F3/211 , H03F3/45183 , H03F3/45609 , H03F3/72 , H03F2200/555 , H03F2200/72 , H03F2203/45288 , H03F2203/45301 , H03F2203/45511 , H03F2203/45638 , H03F2203/45644 , H03F2203/45702 , H03K5/12
摘要： Maintaining a low output common-mode voltagein a driver is desirable. To maintain the low output common-mode voltage, apparatus, method, and means are proposed as follows: a first differential amplifier stage configured to provide a differential output for the apparatus; and a second differential amplifier stage configured to drive the first differential amplifier stage, the second differential amplifier stage including a pre-driver amplifier, a pair of n-stage units, and an input skew averaging unit, the input skew averaging unit configured to suppress the output common-mode voltage by splitting each of the pair of n-stage units into two half blocks and driving the blocks with complementary digital input to cancel out a skew in a gate-to-source voltage of the pair of n-stage units. Furthermore, two feed-forward capacitors are added to enhance the transconductance and operating speed of main transistors of the first differential amplifier stage.
摘要翻译：在驱动器中维持低输出共模电压是理想的。为了保持低输出共模电压，提出了如下装置，方法和装置：第一差分放大器级，被配置为提供装置的差分输出; 以及第二差分放大器级，被配置为驱动所述第一差分放大器级，所述第二差分放大器级包括预驱动器放大器，一对n级单元和输入偏斜平均单元，所述输入偏斜平均单元被配置为抑制通过将一对n级单元中的每一个分成两个半块并且以互补的数字输入驱动该块以消除该对n级单元的栅极 - 源极电压的偏斜的输出共模电压。此外，添加两个前馈电容器以增强第一差分放大器级的主晶体管的跨导和操作速度。

4. 发明申请

WO2002103898A1 METHOD AND APPARATUS FOR VOLTAGE CLAMPING IN FEEDBACK AMPLIFIERS USING RESISTORS 审中-公开
标题翻译：在使用电阻的反馈放大器中进行电压钳位的方法和装置
公开(公告)号：WO2002103898A1
公开(公告)日：2002-12-27
申请号：PCT/US2002/018756
申请日：2002-06-14
申请人： NURLOGIC DESIGN, INC.
发明人： HOANG, Chinh, L.
IPC分类号： H03F1/32
CPC分类号： H03F1/3211 , H03F3/45085 , H03F2203/45511 , H03F2203/45552 , H03F2203/45702
摘要： A data signaling aparatus includes a differential amplifier for providing an amplified differential output on a pair of outputs inresponse to a differential signal provided on a pair of inputs, and a clamping resistor between the pair of inputs. The clamping resistor acts to effectively reduce the swing in differential inputs, thereby allowing high gain that does not result in problematic differential outputs. Further, since the resistor is operative for all voltage ranges, it is useful in small signal applications where diodes cannot be used or are too difficult to implement. A data signaling method includes receiving a differential signal on a pair of inputs, reducing the magnitude of the differential signal by a scale factor using a clamping resistor across the pair of inputs, and providing an amplified differential output on a pair of outputs in response to the scaled differential signal provided on the pair of inputs.
摘要翻译：数据信号装置包括差分放大器，用于响应于一对输入上提供的差分信号而在一对输出上提供放大的差分输出，以及在该对输入之间的钳位电阻。钳位电阻用于有效降低差分输入中的摆幅，从而允许高增益，不会导致有差异的差分输出。此外，由于电阻器可用于所有电压范围，因此在二极管不能使用或难于实现的小信号应用中是有用的。数据信号传输方法包括：接收一对输入上的差分信号，使用钳位电阻在整对输入端之间减小差分信号的幅度，并在一对输出端提供放大的差分输出，以响应于在一对输入上提供的缩放的差分信号。

5. 发明申请

WO9619865A2 AN AMPLIFYING CIRCUIT 审中-公开
标题翻译：放大电路
公开(公告)号：WO9619865A2
公开(公告)日：1996-06-27
申请号：PCT/IB9501089
申请日：1995-12-04
申请人： PHILIPS ELECTRONICS NV , PHILIPS NORDEN AB
发明人： HARKIN GERARD FRANCIS
IPC分类号： H03F1/34 , H03F3/45
CPC分类号： H03F1/342 , H03F3/45183 , H03F2203/45328 , H03F2203/45511 , H03F2203/45658
摘要： An amplifying circuit (1, 1a, 1b, 1c) has a low gain amplifier (2) having positive (2a) and negative (2b) inputs and an output (2c). A high impedance path (3) provided by, for example, a low gain unity buffer amplifier (30) feeds from the negative input (2b) to the output (2c) of the amplifier (2) a first voltage (KV ) equal to a second voltage (V ) at the positive input (2a) of the amplifier (2) multiplied by the reciprocal of the open loop gain (AOL) of the amplifier (2). This circuit simulates a unity gain buffer amplifier having a high input impedance and a high open loop gain using a low open loop gain amplifier and a feed forward arrangement. The use of a low gain amplifier (2) avoids the need for large area transistors and the resultant large parasitic capacitances and so facilitates high speed operation.
摘要翻译：放大电路（1,1a，1b，1c）具有具有正（2a）和负（2b）输入的低增益放大器（2）和输出（2c）。由例如低增益单位缓冲放大器（30）提供的高阻抗路径（3）从负输入端（2b）馈送到放大器（2）的输出端（2c），第一电压（KV + ）等于放大器（2）的正输入（2a）处的第二电压（V +）乘以放大器（2）的开环增益（AOL）的倒数。该电路使用低开环增益放大器和前馈布置来模拟具有高输入阻抗和高开环增益的单位增益缓冲放大器。使用低增益放大器（2）避免了对大面积晶体管的需要，并且由此产生的大的寄生电容因此有利于高速运行。

6. 发明申请

WO2015067172A1 CLOCK AND DATA DRIVERS WITH ENHANCED TRANSCONDUCTANCE AND SUPPRESSED OUTPUT COMMON-MODE 审中-公开
标题翻译：具有增强的交叉和抑制输出通用模式的时钟和数据驱动器
公开(公告)号：WO2015067172A1
公开(公告)日：2015-05-14
申请号：PCT/CN2014/090318
申请日：2014-11-05
申请人： QUALCOMM INCORPORATED , SU, Wenjun , YIN, Guangming , ZHU, Quanqing
发明人： SU, Wenjun , YIN, Guangming , ZHU, Quanqing
IPC分类号： H03K5/12
CPC分类号： H03F3/45762 , H03F1/0277 , H03F3/211 , H03F3/45183 , H03F3/45609 , H03F3/72 , H03F2200/555 , H03F2200/72 , H03F2203/45288 , H03F2203/45301 , H03F2203/45511 , H03F2203/45638 , H03F2203/45644 , H03F2203/45702 , H03K5/12
摘要： Methods, apparatus, and means for maintaining a low output common-mode voltage in a driver are provided. One example apparatus includes a first differential amplifier stage configured to provide a differential output for the apparatus; and a second differential amplifier stage configured to drive the first differential amplifier stage, the second differential amplifier stage including a pair of pre-driver amplifiers, a pair of n-stage circuits, and an input skew averaging circuit, wherein each of the pair of n-stage units is split into two half blocks. The input skew averaging circuit is configured to suppress the output common-mode voltage by driving the blocks with complementary digital inputs to average out a skew in a gate-to-source voltage of the pair of n-stage circuits. For certain aspects, two feed-forward capacitors may be added to enhance the transconductance and operating speed of main transistors of the first differential amplifier stage.
摘要翻译：提供了用于在驱动器中维持低输出共模电压的方法，装置和装置。一个示例性设备包括：第一差分放大器级，被配置为提供用于该设备的差分输出; 以及第二差分放大器级，被配置为驱动所述第一差分放大器级，所述第二差分放大器级包括一对预驱动器放大器，一对n级电路和输入偏差均衡电路，其中， n级单元分为两个半块。输入偏斜平均电路被配置为通过用互补数字输入驱动块来抑制输出共模电压，以平均一对n级电路的栅极至源极电压的偏移。对于某些方面，可以添加两个前馈电容器以增强第一差分放大器级的主晶体管的跨导和工作速度。

7. 发明申请

WO2012102880A1 APPARATUS AND METHOD FOR AMPLIFICATION WITH HIGH FRONT-END GAIN IN THE PRESENCE OF LARGE DC OFFSETS 审中-公开
标题翻译：在大直流偏差存在下具有高前端增益放大的装置和方法
公开(公告)号：WO2012102880A1
公开(公告)日：2012-08-02
申请号：PCT/US2012/021331
申请日：2012-01-13
申请人： ANALOG DEVICES, INC.
发明人： ALEXANDER, Alasdair, Gordon , PLOURDE, David , DUFF, Matthew
IPC分类号： H03F3/45
CPC分类号： H03F3/45977 , H03F3/45475 , H03F3/45973 , H03F2200/261 , H03F2200/375 , H03F2200/513 , H03F2200/78 , H03F2203/45511 , H03F2203/45512 , H03F2203/45516 , H03F2203/45521 , H03F2203/45526 , H03F2203/45528 , H03F2203/45536
摘要： Apparatus and methods reduce the likelihood of amplifier saturation due to propagated DC offsets, and reduce the recover from saturated stated when such saturation occurs. Advantageously, these attributes are beneficial for monitoring of bioelectric signals. A circuit uses an instrumentation amplifier connected as a high pass filter to attenuate large DC offsets and amplify small signals. The circuit can include an instrumentation amplifier electrically coupled with a first feedback circuit including at least one resistor and a second feedback circuit including an op-amp. The feedback circuit can also include a low-pass filter. The op-amp in the second feedback circuit can be configured as a non-inverting amplifier, an inverting amplifier, and/or an integrator circuit. Alternatively, the circuit can include an instrumentation amplifier with one feedback circuit including at least one resistor, and a coupling capacitor electrically coupled with a reference voltage.
摘要翻译：装置和方法降低了由于传播的DC偏移引起的放大器饱和的可能性，并且当发生这种饱和时，减少了从饱和的恢复。有利的是，这些属性对生物电信号的监测是有益的。电路使用连接作为高通滤波器的仪表放大器来衰减大直流偏移并放大小信号。电路可以包括与包括至少一个电阻器的第一反馈电路电耦合的仪表放大器和包括运算放大器的第二反馈电路。反馈电路还可以包括低通滤波器。第二反馈电路中的运算放大器可以被配置为非反相放大器，反相放大器和/或积分器电路。或者，电路可以包括具有一个反馈电路的仪表放大器，该反馈电路包括至少一个电阻器，以及与参考电压电耦合的耦合电容器。

8. 发明申请

WO2012053992A1 CURRENT SOURCE WITH ACTIVE COMMON MODE REJECTION 审中-公开
标题翻译：主动通用模式拒绝的电流源
公开(公告)号：WO2012053992A1
公开(公告)日：2012-04-26
申请号：PCT/SK2011/050013
申请日：2011-08-30
申请人： BATKO, Ivan
发明人： BATKO, Ivan
IPC分类号： G05F1/565 , G01R33/07 , H03F3/45
CPC分类号： G05F1/10 , G05F1/565 , H03F3/45475 , H03F3/45937 , H03F2200/261 , H03F2203/45418 , H03F2203/45422 , H03F2203/45424 , H03F2203/45441 , H03F2203/45511 , H03F2203/45512
摘要： A current source with active common mode rejection uses a principle of having a branch for the generation of the required current, to the output (107) of which one end of the load (3) is connected; and a branch of the active compensation circuit (ACC) (200), to the output (203) of which the other end of the load (3) is connected. By means of at least one input (201) of the ACC (200), at least one signal is sensed on the load, and subsequently it is processed so that the result of processing of at least one signal from at least one input (201) preferentially represents the common mode voltage, which corresponds to the pair of voltages at the voltage terminals (1) and (2) of the load (3), or voltage close to the common mode voltage. This result is subsequently processed by the regulating circuits of the ACC (200), which compare it to the reference potential value (4), and using the negative feedback principle, set such voltage on the output (203), which, within the control accuracy, leads to the equivalence of the reference potential (4) and the potential corresponding to the result of processing of at least one signal from at least one input (201).
摘要翻译：具有有源共模抑制的电流源使用具有用于产生所需电流的分支到负载（3）的一端连接到其输出端（107）的原理; 和有源补偿电路（ACC）（200）的一个分支到负载（3）的另一端所连接的输出端（203）。借助于ACC（200）的至少一个输入（201），在负载上感测至少一个信号，并且随后对其进行处理，使得处理来自至少一个输入（201）的至少一个信号的结果）优选地表示与负载（3）的电压端子（1）和（2）处的电压对或接近共模电压的电压对应的共模电压。该结果随后由ACC（200）的调节电路处理，其将其与参考电位值（4）进行比较，并且使用负反馈原理，在输出端（203）上设置这样的电压，其在控制器准确性导致参考电势（4）的等价性和与来自至少一个输入（201）的至少一个信号的处理结果相对应的电势。

9. 发明申请

WO2011061637A1 SYSTEM FOR REDUCING DISTORTION IN AN ELECTRONIC CIRCUIT USING NONLINEAR FEEDBACK 审中-公开
标题翻译：使用非线性反馈减少电子电路中的失真的系统
公开(公告)号：WO2011061637A1
公开(公告)日：2011-05-26
申请号：PCT/IB2010/054081
申请日：2010-09-10
申请人： INDIAN INSTITUTE OF SCIENCE , AMRUTUR, Bharadwaj , SRINIVASAN, Madhusudan , PRADEEP K, Bhavani
发明人： AMRUTUR, Bharadwaj , SRINIVASAN, Madhusudan , PRADEEP K, Bhavani
IPC分类号： H03F1/32
CPC分类号： H03F1/34 , H03F1/3205 , H03F3/45197 , H03F2203/45492 , H03F2203/45511
摘要： System and methods for reducing third harmonic distortion produced by nonlinear amplifiers are disclosed. A system may include an amplifier circuit with an amplifier transistor such that the amplifier is capable of exhibiting an amplifier output signal containing third harmonic distortion. Further, a system may include a nonlinear feedback circuit with a first feedback transistor operating in Triode mode that produces a feedback electronic signal containing a feedback third harmonic component. In addition, the nonlinear feedback circuit may be configured to the amplifier circuit in negative feedback such that the feedback third harmonic component of the feedback electronic signal reduces the third harmonic distortion of the amplifier output signal. A system may also provide an output signal that has less third harmonic distortion than the amplifier output signal.
摘要翻译：公开了用于减少由非线性放大器产生的三次谐波失真的系统和方法。系统可以包括具有放大器晶体管的放大器电路，使得放大器能够呈现包含三次谐波失真的放大器输出信号。此外，系统可以包括具有以三极管模式工作的第一反馈晶体管的非线性反馈电路，其产生包含反馈三次谐波分量的反馈电子信号。此外，非线性反馈电路可以被配置为负反馈的放大器电路，使得反馈电子信号的反馈三次谐波分量减小放大器输出信号的三次谐波失真。系统还可以提供具有比放大器输出信号少的三次谐波失真的输出信号。

10. 发明申请

WO1996031945A2 AN AMPLIFIER STAGE HAVING A SWITCHABLE GAIN AND REDUCED DISTORTION 审中-公开
标题翻译：具有可切换增益和减少失真的放大器级
公开(公告)号：WO1996031945A2
公开(公告)日：1996-10-10
申请号：PCT/IB1996000228
申请日：1996-03-18
申请人： PHILIPS ELECTRONICS N.V. , PHILIPS NORDEN AB
发明人： PHILIPS ELECTRONICS N.V. , PHILIPS NORDEN AB , RIJNS, Johannes, Jozef, Franciscus
IPC分类号： H03F01/32
CPC分类号： H03F1/3211 , H03F3/45197 , H03F3/72 , H03F2203/45504 , H03F2203/45511 , H03F2203/45711
摘要： An amplifier stage comprising a differential pair (T1, T2) is provided with a resistive ladder (R1...R2n) coupled between the second control electrodes of said differential pair. Taps on mirror positions along the resistive ladder (R1...R2n) are switchably connected to first and second current source transistors (T3, T4), said current source transistors having their control electrodes connected to the first main electrodes of the transistors forming the differential pair. By placing the switches in series with the current source transistors (T3, T4), the influence of the non-linear impedance of the switches is reduced to negligibly small proportions as the output impedance of the current source transistors (T3, T4) is considerably higher than the impedance of the switches. Thus a linear conversion impedance is obtained, resulting in an amplifier stage having a switchable gain and reduced distortion.
摘要翻译：包括差分对（T1，T2）的放大器级设置有耦合在所述差分对的第二控制电极之间的电阻梯（R1 ... R2n）。沿电阻梯（R1 ... R2n）的反射镜位置的抽头可切换地连接到第一和第二电流源晶体管（T3，T4），所述电流源晶体管的控制电极连接到形成晶体管的晶体管的第一主电极差分对。通过将开关与电流源晶体管（T3，T4）串联放置，由于电流源晶体管（T3，T4）的输出阻抗相当大，所以开关的非线性阻抗的影响减小到可忽略的小比例高于开关的阻抗。因此，获得线性转换阻抗，导致放大器级具有可切换增益和减小的失真。

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