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1. 发明申请

WO2018031194A1 SYSTEMS AND METHODS PROVIDING AN INTERMODULATION DISTORTION SINK 审中-公开
标题翻译：提供交调失真水槽的系统和方法
公开(公告)号：WO2018031194A1
公开(公告)日：2018-02-15
申请号：PCT/US2017/042395
申请日：2017-07-17
申请人： QUALCOMM INCORPORATED
发明人： GATHMAN, Timothy Donald , PATEL, Chirag Dipak , VUJCIC, Sasha , TASIC, Aleksandar Miodrag , CHEN, Wu-Hsin , VAN ZALINGE, Klaas
IPC分类号： H03F1/32 , H03F1/08 , H03F3/193 , H03F3/30 , H03F3/45 , H03H11/32
CPC分类号： H03H11/32 , H03F1/086 , H03F1/3205 , H03F1/3217 , H03F1/3223 , H03F3/19 , H03F3/193 , H03F3/21 , H03F3/3022 , H03F3/45183 , H03F3/45237 , H03F3/45475 , H03F2200/06 , H03F2200/09 , H03F2200/129 , H03F2200/144 , H03F2200/18 , H03F2200/21 , H03F2200/24 , H03F2200/294 , H03F2200/321 , H03F2200/33 , H03F2200/42 , H03F2200/451 , H03F2200/453 , H03F2200/555 , H03F2203/30069 , H03F2203/45091 , H03F2203/45101 , H03F2203/45116 , H03F2203/45136 , H03F2203/45208 , H03F2203/45288 , H03F2203/45374 , H03F2203/45458 , H03F2203/45526 , H03F2203/45528 , H03F2203/45544 , H03F2203/45596 , H03F2203/45712 , H04L7/0337
摘要： A circuit includes an active balun having an RF signal input and having differential signal outputs, the active balun including a first pair of transistors coupled to the RF signal input, the first pair of transistors including a first transistor of a first type and a second transistor of a second type, wherein the first type and second type are complementary; and an intermodulation distortion (IMD) sink circuit having an operational amplifier (op amp) coupled between a first node and a second node, wherein the first transistor and second transistor are coupled in series between the first node and the second node.
摘要翻译：一种电路包括具有RF信号输入并且具有差分信号输出的有源平衡 - 不平衡变换器，所述有源平衡 - 不平衡变换器包括耦合到所述RF信号输入的第一对晶体管，所述第一对晶体管包括第一晶体管第一类型和第二类型的第二晶体管，其中第一类型和第二类型是互补的; 以及具有耦合在第一节点和第二节点之间的运算放大器（运算放大器）的互调失真（IMD）宿电路，其中第一晶体管和第二晶体管串联耦合在第一节点和第二节点之间。 >

2. 发明申请

WO2015190836A1 차동 전달 임피던스 증폭기 审中-公开
标题翻译：差分传输阻抗放大器
公开(公告)号：WO2015190836A1
公开(公告)日：2015-12-17
申请号：PCT/KR2015/005859
申请日：2015-06-11
申请人： 이화여자대학교 산학협력단
发明人： 박성민
IPC分类号： H03F3/45
CPC分类号： H03G1/0035 , H03F1/086 , H03F3/265 , H03F3/45179 , H03F2200/541 , H03F2200/72 , H03F2200/75 , H03F2203/45288 , H03G1/0029
摘要： 본 발명의 실시예에 의한 차동 전달 임피던스 증폭기는 입력 노드로부터 전기적 신호를 입력 받는 공통 게이트 증폭기(common gate amplifier) 및 피드백 저항을 가지고, 상기 입력 노드로부터 전기적 신호를 입력받는 공통 소스 증폭기(common source amplifier)를 포함하고, 공통 게이트 증폭기의 출력 신호와 상기 공통 소스 증폭기의 출력 신호는 차동 신호쌍(differential signal pair)을 이룬다.
摘要翻译：根据本发明的实施例的差分传输阻抗放大器包括：公共栅极放大器，其从输入节点接收电信号的输入; 以及具有反馈电阻并接收来自输入节点的电信号的输入的公共源极放大器，其中公共栅极放大器的输出信号和公共源极放大器的输出信号形成差分信号对。

3. 发明申请

WO2011075211A1 DIFFERENTIAL GM-BOOSTING CIRCUIT AND APPLICATIONS 审中-公开
标题翻译：差分转运增压电路及其应用
公开(公告)号：WO2011075211A1
公开(公告)日：2011-06-23
申请号：PCT/US2010/052815
申请日：2010-10-15
申请人： BOFILL-PETIT, Adrià , REDONDO-NAVARRO, Xavier , GIGLE NETWORKS INC.
发明人： BOFILL-PETIT, Adrià , REDONDO-NAVARRO, Xavier
IPC分类号： H03F3/45
CPC分类号： H03F3/45197 , H03F2203/45134 , H03F2203/45288 , H03F2203/45356
摘要： A fully-differential circuit includes a differential gin-boosting circuit and/or a differential output circuit. The use of differential gm-boosting and output circuits improves input common-mode and power-supply noise rejection relative to the prior art. The fully differential gm-boosted circuit may be used in a wide variety of applications.
摘要翻译：全差分电路包括差分递增增益电路和/或差分输出电路。使用差分升压和输出电路相对于现有技术改进了输入共模和电源噪声抑制。全差分gm升压电路可用于各种应用。

4. 发明申请

WO2007004432A1 電流変換方法、トランスコンダクタンスアンプおよびこれを用いたフィルタ回路审中-公开
标题翻译：电流转换方法，使用其的电容放大器和滤波电路
公开(公告)号：WO2007004432A1
公开(公告)日：2007-01-11
申请号：PCT/JP2006/312495
申请日：2006-06-22
申请人：日本電気株式会社 , 岡田博之
发明人：岡田博之
IPC分类号： H03F3/34 , H03F3/45 , H03H11/04 , H03L7/08
CPC分类号： H03L7/099 , H03F3/45179 , H03F3/45197 , H03F2203/45288 , H03F2203/45481 , H03F2203/45494 , H03L7/0805
摘要：　本発明は、十分な振幅を得ることができるとともに設計の自由度の高いトランスコンダクタンスアンプおよび電圧電流変換方法を実現することを目的とし、その構成は第１の電圧信号を第１の電流信号に変換するステップと、第２の電圧信号を第２の電流信号に変換するステップと、第１の電流信号と第２の電流信号の同相成分を得るステップと、第１の電流信号および第２の電流信号のそれぞれより同相成分を減算することにより第３の電流信号および第４の電流信号を得、さらに、第３の電流信号から第４の電流信号を減算して第１の出力とし、第４の電流信号から第３の電流信号を減算して第２の出力するステップと、を有する。
摘要翻译：为了实现电压/电流转换方法和跨导放大器，其中可以获得足够的幅度并且设计的灵活性高。包括将第一电压信号转换为第一电流信号的步骤; 将第二电压信号转换为第二电流信号的步骤; 获得第一和第二电流信号的同相分量的步骤; 以及从所述第一和第二电流信号中减去所述同相分量以获得第三和第四电流信号的步骤，并且还从所述第三电流信号中减去所述第四电流信号以获得第一输出，同时从所述第三电流信号中减去所述第三电流信号第四电流信号以获得第二输出。

5. 发明申请

WO2019133474A1 DIFFERENTIAL AMPLIFIER WITH COMPLEMENTARY UNIT STRUCTURE 审中-公开
公开(公告)号：WO2019133474A1
公开(公告)日：2019-07-04
申请号：PCT/US2018/067063
申请日：2018-12-21
申请人： QUALCOMM INCORPORATED
发明人： KARMAKER, Rahul , FAN, Bin
IPC分类号： H03F3/45
CPC分类号： H03F1/0205 , H03F3/193 , H03F3/4521 , H03F3/45237 , H03F3/4565 , H03F2200/36 , H03F2200/411 , H03F2200/451 , H03F2200/453 , H03F2200/456 , H03F2200/555 , H03F2203/45022 , H03F2203/45026 , H03F2203/45082 , H03F2203/45172 , H03F2203/45188 , H03F2203/45288 , H03F2203/45418 , H03F2203/45424 , H03F2203/45494 , H03F2203/45508
摘要： Certain aspects of the present disclosure generally relate to a differential amplifier implemented using a complementary metal-oxide-semiconductor (CMOS) structure. The differential amplifier generally includes a first pair of transistors and a second pair of transistors coupled to the first pair of transistors. The gates of the first pair of transistors and gates of the second pair of transistors may be coupled to respective differential input nodes of the differential amplifier, and drains of the first pair of transistors and drains of the second pair of transistors may be coupled to respective differential output nodes of the differential amplifier. In certain aspects, the differential amplifier may include a biasing transistor having a drain coupled to a source of a transistor of the first pair of transistors and having a gate coupled to a common-mode feedback (CMFB) path of the differential amplifier.

6. 发明申请

WO2017105759A1 WIDEBAND AMPLIFIER CIRCUITS AND METHODS 审中-公开
标题翻译：宽带放大器电路和方法
公开(公告)号：WO2017105759A1
公开(公告)日：2017-06-22
申请号：PCT/US2016/062588
申请日：2016-11-17
申请人： QUALCOMM INCORPORATED
发明人： GATHMAN, Timothy
IPC分类号： H03F1/08 , H03F1/26 , H03F3/19 , H03F3/45 , H03F3/72 , H03F3/24 , H03F1/42
CPC分类号： H03G3/3042 , H03F1/086 , H03F1/26 , H03F1/42 , H03F3/19 , H03F3/195 , H03F3/245 , H03F3/45179 , H03F3/45188 , H03F3/45475 , H03F3/72 , H03F2200/294 , H03F2200/336 , H03F2200/451 , H03F2200/72 , H03F2200/91 , H03F2203/45091 , H03F2203/45288 , H03F2203/45306 , H03F2203/45526
摘要： A wideband amplifier circuit such as a transimpedance amplifier achieves improved amplifier and/or system performance, such as a reduced input impedance. The transimpedance amplifier may use a complementary common gate stage that receives an input signal and generates current to a current summing stage. In one instance, an input current is received by a complimentary common gate stage that includes a first common gate transistor (301) and a second common gate transistor (302), each having different polarities, in which the first terminals of each of the transistors are configured to receive the input current (Si). Each of the transistors generates an output current to a current summing stage (310) that generates an output voltage (Vout) at an output terminal. The output voltage (Vout) may be based on the combined currents from the first common gate transistor (301) and second common gate transistor (302).
摘要翻译：诸如互阻抗放大器之类的宽带放大器电路实现了改进的放大器和/或系统性能，例如降低的输入阻抗。跨阻放大器可以使用接收输入信号并且产生电流到电流求和级的互补共栅级。在一个实例中，输入电流由互补共栅级接收，所述互补共栅级包括均具有不同极性的第一公共栅极晶体管（301）和第二公共栅极晶体管（302），其中每个晶体管的第一端子被配置为接收输入电流（Si）。每个晶体管产生输出电流到电流求和级（310），该电流求和级在输出端产生输出电压（Vout）。输出电压（Vout）可以基于来自第一公共栅极晶体管（301）和第二公共栅极晶体管（302）的组合电流。

7. 发明申请

WO2017034837A1 RAIL-TO-RAIL INPUT STAGE CIRCUIT WITH CONSTANT TRANSCONDUCTANCE 审中-公开
标题翻译：铁路轨道输入电路具有恒定的交叉
公开(公告)号：WO2017034837A1
公开(公告)日：2017-03-02
申请号：PCT/US2016/046918
申请日：2016-08-12
申请人： QUALCOMM INCORPORATED
发明人： SHEN, Liangguo , SHI, Chunlei , GUAN, Hua
IPC分类号： H03F3/45
CPC分类号： G05F3/262 , H03F3/45183 , H03F3/45246 , H03F3/45708 , H03F2203/45288 , H03F2203/45481
摘要： Embodiments described herein relate to an improved circuit technique in a rail-to-rail input stage circuit utilizing non-complementary differental pairs with bias control designed to maintain a constant transconductance "gm" throughout an input common mode voltage range. The rail-to-rail input stage circuit comprises a first differential pair circuit, a level-shifted differential pair circuit coupled with the first differential pair circuit, and a constant transconductance generation circuit coupled with the level-shifted differential pair circuit. The constant transconductance generation circuit is configured to control the bias current conducting in the level-shifted differential pair circuit based on current conducting in the first differential pair circuit to maintain a constant transconductance in the rail-to-rail input stage circuit.
摘要翻译：本文所描述的实施例涉及一种利用具有偏置控制的非互补对数对的轨至轨输入级电路中的改进的电路技术，其设计成在整个输入共模电压范围内保持恒定跨导“gm”。轨到轨输入级电路包括第一差分对电路，与第一差分对电路耦合的电平移位差分对电路，以及与电平移位差分对电路耦合的恒定跨导产生电路。恒定跨导产生电路被配置为基于第一差分对电路中的电流导通来控制电平移位的差分对电路中的导通的偏置电流，以在轨至轨输入级电路中保持恒定的跨导。

8. 发明申请

WO2016187400A1 MICROCONTROLLER WITH AVERAGE CURRENT MEASUREMENT CIRCUIT USING VOLTAGE-TO-CURRENT CONVERTERS 审中-公开
标题翻译：使用电压到电流转换器的平均电流测量电路的微控制器
公开(公告)号：WO2016187400A1
公开(公告)日：2016-11-24
申请号：PCT/US2016/033225
申请日：2016-05-19
申请人： MICROCHIP TECHNOLOGY INCORPORATED
发明人： KRIS, Bryan , BARTLING, James, E.
IPC分类号： G01R19/00 , G01R19/255
CPC分类号： H02M3/156 , G01R19/003 , G01R19/255 , H02M1/08 , H02M2001/0009 , H03F3/45 , H03F2203/45288 , H03G3/20 , H03M1/1245
摘要： The average of a complex waveform measured over a time period may be determined by first converting the complex waveform to a voltage, then converting this voltage to a current and using this current to charge a capacitor. At the end of the measurement time period the voltage charge (sample voltage) on the capacitor may be sampled by a sample and hold circuit associated with an analog-to-digital converter (ADC). Then the voltage charge on the sample capacitor may be removed, e.g., capacitor plates shorted by a dump switch in preparation for the next average of the complex waveform sample measurement cycle. The ADC then converts this sampled voltage charge to a digital representation thereof and a true average of the complex waveform may be determined, e.g., calculated therefrom in combination with the measurement time period.
摘要翻译：可以通过首先将复数波形转换为电压，然后将该电压转换成电流并使用该电流来对电容器充电来确定在一段时间内测量的复合波形的平均值。在测量时间段结束时，电容器上的电压（采样电压）可以通过与模数转换器（ADC）相关联的采样和保持电路进行采样。然后可以去除样品电容器上的电荷电荷，例如电容器板由转储开关短路，以准备复杂波形采样测量周期的下一个平均值。然后，ADC将该采样的电压电荷转换成其数字表示，并且可以结合测量时间周期来确定复数波形的真实平均值，例如从其计算。

9. 发明申请

WO2016099757A1 LOW POWER OPERATIONAL TRANSCONDUCTANCE AMPLIFIER 审中-公开
标题翻译：低功率运行的交叉放大器
公开(公告)号：WO2016099757A1
公开(公告)日：2016-06-23
申请号：PCT/US2015/061163
申请日：2015-11-17
申请人： QUALCOMM INCORPORATED
发明人： KIRAN, Ganesh
IPC分类号： H03F3/45 , H03F3/195 , H03F3/24
CPC分类号： H03F1/0205 , H03F1/223 , H03F3/195 , H03F3/245 , H03F3/45179 , H03F3/45188 , H03F3/45475 , H03F2200/456 , H03F2203/45288 , H03F2203/45364 , H03F2203/45644 , H03F2203/45651 , H03H11/0427 , H03H19/004
摘要： A low power operational transconductance amplifier is disclosed. In an exemplary embodiment, an apparatus includes a transconductance stage (402) configured to convert a first input voltage signal (Vil) to first and second current signals and to convert a second input voltage signal (Vi2) to third and fourth current signals. The apparatus also includes a current amplification stage (404) configured to amplify the second current signal to generate a first amplified current signal and to amplify the fourth current signal to generate a second amplified current signal. The apparatus also includes a current summation stage (406) configured to sum together the third current signal and the first amplified current signal to generate a first output voltage signal (Vol), and to sum together the first current signal and the second amplified current signal to generate a second output voltage signal (Vo2).
摘要翻译：公开了一种低功率运算跨导放大器。在示例性实施例中，一种装置包括跨导级（402），其构造成将第一输入电压信号（Vil）转换为第一和第二电流信号，并将第二输入电压信号（Vi2）转换为第三和第四电流信号。该装置还包括电流放大级（404），其被配置为放大第二电流信号以产生第一放大电流信号并放大第四电流信号以产生第二放大电流信号。该装置还包括电流求和级（406），其被配置为将第三电流信号和第一放大电流信号相加在一起以产生第一输出电压信号（Vol），并将第一电流信号和第二放大电流信号以产生第二输出电压信号（Vo2）。

10. 发明申请

WO2015181732A1 READ CIRCUIT FOR POSFET TYPE TACTILE SENSOR DEVICES 审中-公开
标题翻译： POSFET型触发传感器设备读取电路
公开(公告)号：WO2015181732A1
公开(公告)日：2015-12-03
申请号：PCT/IB2015/053952
申请日：2015-05-27
申请人： FONDAZIONE ISTITUTO ITALIANO DI TECNOLOGIA
发明人： CAVIGLIA, Stefano , BARTOLOZZI, Chiara , VALLE, Maurizio
IPC分类号： H01L41/04 , G01L1/16 , G01D5/244
CPC分类号： G01L1/16 , G01D5/244 , G01L1/225 , G06N3/049 , G06N3/063 , H01L41/042 , H01L41/1132 , H01L41/193 , H03F3/45183 , H03F3/45475 , H03F3/45744 , H03F2203/45212 , H03F2203/45288
摘要： A read circuit for an electrical signal produced by a POSFET device is disclosed which comprises a transconductance amplifier (4) connected at its inverting input to the output of the POSFET device (1), at least one neuron (8a, 8b) connected to the output of said transconductance amplifier, said amplifier being adapted to receive a signal from the POSFET device representative of a force or pressure exerted on it and to produce at its output at least one current signal (I 0- , I 0+ ) representative of such force or pressure, the at least one neuron being adapted to receive said current signal and to produce an output signal (12a, 12b) being a pulse train with frequency proportional to said current signal.
摘要翻译：公开了一种由POSFET器件产生的电信号的读取电路，其包括在其反相输入端连接到POSFET器件（1）的输出的跨导放大器（4），至少一个连接到该POSFET器件的神经元（8a，8b）输出所述跨导放大器，所述放大器适于接收来自POSFET器件的信号，代表施加在其上的力或压力，并在其输出端产生表示这种力或压力的至少一个电流信号（I0-，I0 +）所述至少一个神经元适于接收所述当前信号并产生作为与所述电流信号成比例的频率的脉冲串的输出信号（12a，12b）。

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