专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

WO2015188016A3 ENERGY-EFFICIENT REAL-TIME TASK SCHEDULER 审中-公开
标题翻译：能源效率实时任务调度器
公开(公告)号：WO2015188016A3
公开(公告)日：2016-01-28
申请号：PCT/US2015034305
申请日：2015-06-04
申请人： TEXAS INSTRUMENTS INC , TEXAS INSTRUMENTS JAPAN
发明人： COLIN ALEXEI , RAJKUMAR RAGUNATHAN , RAGHU ARVIND KANDHALU , VEDANTHAM RAMANUJA , LU XIAOLIN
IPC分类号： G06F9/50
CPC分类号： G06F9/4893 , G06F1/329 , G06F1/3293 , G06F9/5094 , Y02D10/24 , Y02D50/20
摘要： In described examples, an energy efficient task scheduler for use with a processor provides multiple reduced energy use modes. In one embodiment, a system (100) for executing tasks includes a processor (102) and a task scheduler (106). The processor (102) provides multiple different reduced energy use modes. The task scheduler (106) is executable by the processor (102) to schedule execution of multiple sleep tasks (116). Each of the sleep tasks (116) corresponds to a different one of the reduced energy use modes. The task scheduler (106) is executable by the processor (102) to execute each of the sleep tasks (116), and as part of the execution of the sleep task (116) to: place the processor (102) in the reduced energy use mode corresponding to the sleep task (116), and exit the corresponding reduced energy use mode at suspension of the sleep task (116).
摘要翻译：在所描述的示例中，与处理器一起使用的能量效率任务调度器提供多个减少的能量使用模式。在一个实施例中，用于执行任务的系统（100）包括处理器（102）和任务调度器（106）。处理器（102）提供多种不同的减少能量使用模式。任务调度器（106）可由处理器（102）执行以调度多个睡眠任务（116）的执行。每个睡眠任务（116）对应于减少的能量使用模式中的不同的一个。任务调度器（106）可由处理器（102）执行以执行每个休眠任务（116），并且作为睡眠任务（116）的执行的一部分，以将处理器（102）放置在减少的能量（116）对应的使用模式，并且在暂停所述睡眠任务（116）时退出相应的减少能量使用模式。

2. 发明申请

WO2015161022A3 ENSURING IMAGING SUBSYSTEM INTEGRITY IN CAMERA BASED SAFETY SYSTEMS 审中-公开
标题翻译：确保摄像机安全系统中的成像子系统完整性
公开(公告)号：WO2015161022A3
公开(公告)日：2015-12-10
申请号：PCT/US2015026083
申请日：2015-04-16
申请人： TEXAS INSTRUMENTS INC , TEXAS INSTRUMENTS JAPAN
发明人： GULATI RAHUL , EASWARAN VASANT , MODY MIHIR NARENDRA , KARANDIKAR PRASHANT DINKAR , SHANKAR PRITHVI Y A , DUBEY AISHWARYA , CHITNIS KEDAR , SAGAR RAJAT
IPC分类号： H04N17/00 , G06F11/36
CPC分类号： H04N17/002 , G06T7/0002 , G06T2207/30168 , G06T2207/30252
摘要： In described examples, a method of testing an imaging subsystem of a system-on-a-chip (SOC) is provided that includes executing imaging subsystem test software instructions periodically on a processor of the SOC (500, 502, 504), receiving reference image data in the imaging subsystem (506) responsive to the executing of the test software instructions, performing image signal processing (508) on the reference image data by the imaging subsystem to generate processed reference image data, and using the processed reference image data by the test software instructions to verify (510) whether the imaging subsystem is operating correctly.
摘要翻译：在所描述的示例中，提供了一种测试片上系统（SOC）的成像子系统的方法，其包括在SOC（500,502,504）的处理器周期性地执行成像子系统测试软件指令，接收参考响应于执行测试软件指令，成像子系统（506）中的图像数据，由成像子系统对参考图像数据执行图像信号处理（508）以产生经处理的参考图像数据，并且使用经处理的参考图像数据测试软件指令验证（510）成像子系统是否正常工作。

3. 发明申请

WO2015130959A3 SWITCHING MODE POWER SUPPLY WITH ADAPTIVELY RANDOMIZED SPREAD SPECTRUM 审中-公开
标题翻译：切换模式电源与适应性随机扩展频谱
公开(公告)号：WO2015130959A3
公开(公告)日：2015-11-12
申请号：PCT/US2015017813
申请日：2015-02-26
申请人： TEXAS INSTRUMENTS INC , TEXAS INSTRUMENTS JAPAN
发明人： YU THEODORE ERNEST , MOTAMEDI ALI , DU DINGKUN , CHAKRABORTY SOMBUDDHA , TETERUD PATRICK , SANDERS KEITH THOMAS JR
IPC分类号： H02M3/137
CPC分类号： H02M3/156 , H02M1/44 , H02M2001/0012
摘要： In described examples, a switching mode power supply (100) includes an output filter (116), a driver (114), a pulse width modulator (104), and pulse adaptation circuitry (112). The output filter (116) is configured to provide output of the switching mode power supply (100). The driver (114) is coupled to the output filter (116) and is configured to switch current to the output filter (116). The pulse width modulator (104) is configured to generate pulses that control switching of current by the driver (114). The pulse width modulator (104) includes spread spectrum logic configured to randomize timing of the pulses generated by the pulse width modulator (104). The pulse adaptation circuitry (112) is configured to identify an instantaneous excursion of the output of the switching mode power supply (100) beyond a predetermined threshold, and to modify the randomized timing of the pulses produced by the pulse width modulator (104) based on the identified instantaneous excursion.
摘要翻译：在所描述的示例中，开关模式电源（100）包括输出滤波器（116），驱动器（114），脉宽调制器（104）和脉冲适配电路（112）。输出滤波器（116）被配置为提供开关模式电源（100）的输出。驱动器（114）耦合到输出滤波器（116）并且被配置为将电流切换到输出滤波器（116）。脉冲宽度调制器（104）被配置为产生控制驱动器（114）的电流切换的脉冲。脉冲宽度调制器（104）包括扩展频谱逻辑，其配置成使由脉冲宽度调制器（104）产生的脉冲的定时随机化。脉冲适应电路（112）被配置为识别开关模式电源（100）的输出的瞬时偏移超过预定阈值，并且修改由脉冲宽度调制器（104）产生的脉冲的随机定时在确定的瞬时游览。

4. 发明申请

WO2015123366A3 METHODS AND APPARATUS TO PROVIDE EXTENDED OBJECT NOTATION DATA 审中-公开
标题翻译：提供扩展对象符号数据的方法和设备
公开(公告)号：WO2015123366A3
公开(公告)日：2015-10-08
申请号：PCT/US2015015515
申请日：2015-02-11
申请人： TEXAS INSTRUMENTS INC , TEXAS INSTRUMENTS JAPAN
发明人： BAUM AVRAHAM , ZARMI ILAN , REITER GIL
IPC分类号： G06F17/00
CPC分类号： H04L63/061 , G06F9/4428 , G06F9/45529 , G06F17/30 , G06F21/6227 , H04L9/08 , H04L9/0825 , H04L9/3236 , H04L9/3247 , H04L9/3263 , H04L63/0442 , H04L63/0823 , H04L63/123 , H04L2209/30 , H04L2463/061 , H04L2463/062
摘要： In described examples, an example apparatus (206) includes a data handler (302) having a first input to receive object data and a first output to output an object notation key -value pair for the object data; a string processor (304) having a second input coupled to the first output and a second output to convey the object notation key-value pair without string literals; and a hashing and encryption handler (306) having a third input coupled to the second output and a third output to convey the key-value pair signed with a private key, to convey the key-value pair encrypted with a public key, and to convey an indication that the encrypted key-value pair is encrypted in a key of the encrypted key -value pair.
摘要翻译：在所描述的示例中，示例设备（206）包括具有用于接收对象数据的第一输入的数据处理器（302）和用于输出对象数据的对象记法键值对的第一输出; 具有耦合到所述第一输出的第二输入的串处理器（304）和用于传送所述对象符号键值对而不具有字符串文字的第二输出; 以及散列和加密处理器（306），其具有耦合到第二输出的第三输入和第三输出以传送用私钥签名的键值对，以传达用公钥加密的键值对，并且在加密的密钥对对的密钥中传送加密的密钥对对的密码的指示。

5. 发明申请

WO2014031653A8 SYSTEMS AND METHODS OF INPUT POWER AND CURRENT MEASUREMENT 审中-公开
标题翻译：输入功率和电流测量的系统和方法
公开(公告)号：WO2014031653A8
公开(公告)日：2015-01-29
申请号：PCT/US2013055813
申请日：2013-08-20
申请人： TEXAS INSTRUMENTS INC , TEXAS INSTRUMENTS JAPAN
发明人： SUN BOSHENG
IPC分类号： G01R21/06 , G01R21/00 , H02M7/217 , H02M7/219
CPC分类号： G01R35/005 , G01R21/133 , G01R35/04
摘要： A power factor control (PFC) control device is used for power factor correction and for input power and current measurement simultaneously. Input voltage and input current are measured (510, 520) using a current sensor and a voltage sensor. The current is measured after an electromagnetic interference (EMI) filter. The input voltage and input current are sampled substantially simultaneously (530). The measured input current is adjusted due to a phase shift introduced in the current sense circuit (540). The input power is calculated using the input voltage and adjusted input current (550). The total input current is determined using the PFC input current and the EMI filter reactive current (560).
摘要翻译：功率因数控制（PFC）控制装置用于功率因数校正，同时用于输入功率和电流测量。使用电流传感器和电压传感器测量输入电压和输入电流（510,520）。在电磁干扰（EMI）滤波器之后测量电流。输入电压和输入电流基本同时采样（530）。测量的输入电流由于在电流检测电路（540）中引入的相移而被调整。使用输入电压和调整输入电流计算输入功率（550）。使用PFC输入电流和EMI滤波器无功电流（560）确定总输入电流。

6. 发明申请

WO2014190347A2 LEVEL SHIFTER FOR A LIQUID CRYSTAL DISPLAY 审中-公开
标题翻译：液晶显示器液位变送器
公开(公告)号：WO2014190347A2
公开(公告)日：2014-11-27
申请号：PCT/US2014039564
申请日：2014-05-27
申请人： TEXAS INSTRUMENTS INC , TEXAS INSTRUMENTS DEUTSCHLAND , TEXAS INSTRUMENTS JAPAN
发明人： REITHMAIER STEFAN A , BERNARD JOSY , STOERK CARSTEN I , GUIBOURG NICOLAS M
IPC分类号： G09G3/36
CPC分类号： G09G3/3655 , G09G3/3659 , G09G3/3674 , G09G3/3685 , G09G2310/0289 , G09G2330/023
摘要： In described examples, a level shifter circuit (700) has a plurality of channels (706, 714, 722, 724) for providing signals to a capacitive load and has circuits (M3a, M3b, M3c, M3d) for sharing charge stored in the capacitive load between the channels (706, 714, 722, 724). A first pair of channel clock generating circuits (Mia, M2a, M1b, M2b) are coupled respectively to a first pair of channels (706, 722). A second pair of channel clock generating circuits (M1c, M2c, Mid, M2d) are coupled respectively to a second pair of channels (714, 724). A first pair of switches (M3a, M3b) couples the first pair of channels (706, 722) together, and a second pair of switches (M3c, M3d) couples the second pair of channels (714, 724) together, for sharing charge between the channels (706, 714, 722, 724). A single resistor (Res) is coupled in circuit with all of the channels (706, 714, 722, 724) for controlling a slope of charge sharing between the channels (706, 714, 722, 724).
摘要翻译：在所描述的示例中，电平移位器电路（700）具有用于向容性负载提供信号的多个通道（706,714,722,724），并且具有用于共享存储在电容器中的电荷的电路（M3a，M3b，M3c，M3d）通道（706,714,722,724）之间的电容性负载。第一对信道时钟发生电路（Mia，M2a，M1b，M2b）分别耦合到第一对信道（706,722）。第二对信道时钟产生电路（M1c，M2c，Mid，M2d）分别耦合到第二对信道（714,724）。第一对开关（M3a，M3b）将第一对通道（706,722）耦合在一起，并且第二对开关（M3c，M3d）将第二对通道（714,724）耦合在一起，用于共享电荷在通道（706,714,722,724）之间。单个电阻器（Res）与电路中的所有通道（706,714,722,724）耦合，用于控制通道（706,714,722,724）之间电荷共享的斜率。

7. 发明申请

WO2014134384A3 INTEGRATED CIRCUIT WITH SAME LEVEL DIFFERENT RESISTORS 审中-公开
标题翻译：集成电路与同级别不同的电阻
公开(公告)号：WO2014134384A3
公开(公告)日：2014-10-23
申请号：PCT/US2014019226
申请日：2014-02-28
申请人： TEXAS INSTRUMENTS INC , TEXAS INSTRUMENTS DEUTSCHLAND , TEXAS INSTRUMENTS JAPAN
发明人： DIRNECKER CHRISTOPH , SPINGER KARSTEN , STINGL FRANZ
IPC分类号： H01L27/01 , H01C13/00 , H01C17/06 , H01C17/28 , H01L21/4763 , H05K1/16 , H05K3/00
CPC分类号： H01L28/20 , H01L27/016 , H01L27/0802 , H01L28/24
摘要： An integrated circuit 100 contains three thin film resistors 106, 108, 110 over a dielectric layer 102. The first resistor body 116 includes only a bottom thin film layer 104 and the first resistor heads 118 include the bottom thin film layer 104, a middle thin film layer 112 and a top thin film layer 128. The second resistor body 120 and heads 122 include all three thin film layers 104, 112, 128. The third resistor bodyl24 does not include the middle thin film layer. The three resistors are formed using two etch masks.
摘要翻译：集成电路100在电介质层102上包含三个薄膜电阻器106,108,110。第一电阻器主体116仅包括底部薄膜层104，并且第一电阻器头118包括底部薄膜层104，中间薄膜膜层112和顶部薄膜层128.第二电阻体120和头122包括全部三个薄膜层104,112,128。第三电阻体24不包括中间薄膜层。三个电阻器使用两个蚀刻掩模形成。

8. 发明申请

WO2009132092A8 RANK AND PMI IN DOWNLOAD CONTROL SIGNALING FOR UPLINK SINGLE-USER MIMO (UL SU-MIMO) 审中-公开
标题翻译：下载用于UPLINK单用户MIMO（UL SU-MIMO）的控制信令的RANK和PMI
公开(公告)号：WO2009132092A8
公开(公告)日：2014-05-22
申请号：PCT/US2009041393
申请日：2009-04-22
申请人： TEXAS INSTRUMENTS INC , CHEN RUNHUA , ONGGOSANUSI EKO N
发明人： CHEN RUNHUA , ONGGOSANUSI EKO N
IPC分类号： H04B7/06 , H04W88/02 , H04W88/08
CPC分类号： H04B7/0456 , H04L1/0031 , H04L5/0053 , H04L25/03343 , H04L2025/03426 , H04L2025/03802 , H04W72/06
摘要： A method of operating a user equipment device includes extracting at least one rank indicator (RI) (410) from an uplink grant, and adapting a transmission rank in response to said RI (420). At least two transmit antennas are configured to transmit according to said transmission rank (430).
摘要翻译：一种操作用户设备设备的方法包括：从上行链路许可提取至少一个秩指示符（RI）（410），以及响应于所述RI调整传输秩（420）。至少两个发送天线被配置为根据所述发送等级（430）进行发送。

9. 发明申请

WO2013006703A2 POWER MOSFET WITH INTEGRATED GATE RESISTOR AND DIODE-CONNECTED MOSFET 审中-公开
标题翻译：具有集成栅极电阻和二极管连接MOSFET的功率MOSFET
公开(公告)号：WO2013006703A2
公开(公告)日：2013-01-10
申请号：PCT/US2012045560
申请日：2012-07-05
申请人： TEXAS INSTRUMENTS INC , TEXAS INSTRUMENTS JAPAN , WANG JUN , XU SHUMING , KOREC JACEK
发明人： WANG JUN , XU SHUMING , KOREC JACEK
CPC分类号： H01L27/0629 , H01L27/0727 , H01L29/1083 , H01L29/402 , H01L29/4175 , H01L29/41766 , H01L29/456 , H01L29/66659 , H01L29/7835 , H01L29/861
摘要： A power MOSFET (202) is formed in a semiconductor device (200) with a parallel combination of a shunt resistor (208) and a diode-connected MOSFET (210) between a gate input node (204) of the semiconductor device and a gate (206) of the power MOSFET. A gate (212) of the diode-connected MOSFET is connected to the gate (206) of the power MOSFET. Source and drain nodes (216, 214) of the diode-connected MOSFET are connected to a source node (218) of the power MOSFET through diodes (220). The drain node of the diode-connected MOSFET is connected to the gate input node (204) of the semiconductor device. The source node(216) of the diode-connected MOSFET is connected to the gate (206) of the power MOSFET. The power MOSFET and the diode-connected MOSFET are integrated into the substrate of the semiconductor device so that the diode- connected MOSFET source and drain nodes (216, 214) are electrically isolated from the power MOSFET source node (218) through a pn junction.
摘要翻译：在半导体器件（200）中，在半导体器件的栅极输入节点（204）和栅极（202）之间并联组合分流电阻器（208）和二极管连接的MOSFET（210）之间形成功率MOSFET（202）（206）的功率MOSFET。二极管连接的MOSFET的栅极（212）连接到功率MOSFET的栅极（206）。二极管连接的MOSFET的源极和漏极节点（216,214）通过二极管（220）连接到功率MOSFET的源节点（218）。二极管连接的MOSFET的漏极节点连接到半导体器件的栅极输入节点（204）。二极管连接的MOSFET的源极节点（216）连接到功率MOSFET的栅极（206）。功率MOSFET和二极管连接的MOSFET集成到半导体器件的衬底中，使得二极管连接的MOSFET源极和漏极节点（216,214）通过pn结与功率MOSFET源节点（218）电隔离。

10. 发明申请

WO2012109471A3 METHOD TO IDENTIFY FAULTS IN LED STRING 审中-公开
标题翻译：识别LED灯串故障的方法
公开(公告)号：WO2012109471A3
公开(公告)日：2012-11-22
申请号：PCT/US2012024528
申请日：2012-02-09
申请人： TEXAS INSTRUMENTS INC , TEXAS INSTRUMENTS JAPAN , AVENEL JEAN-JACQUES M
发明人： AVENEL JEAN-JACQUES M
IPC分类号： H05B37/02
CPC分类号： H05B33/089 , H05B37/036
摘要： A method includes receiving a first voltage from an intermediate node in a string (104) of multiple light emitting diodes (LEDs) (102). The method also includes receiving at least one second voltage based on a string voltage (VLED) across the string (104) of LEDs (102) The method further includes identifying whether at least one of the LEDs (102) has a fault using the first voltage and the at least one second voltage. The second voltage could be a single reference voltage, and a difference between the first voltage and the reference voltage could be compared to a threshold. Multiple second voltages could define a voltage range that includes a reference voltage, and a determination could be made whether the first voltage falls within the voltage range.
摘要翻译：一种方法包括从多个发光二极管（LED）（102）的串（104）中的中间节点接收第一电压。该方法还包括基于LED（102）的串（104）两端的串电压（VLED）来接收至少一个第二电压。该方法还包括使用第一发光二极管（102）识别至少一个LED 电压和至少一个第二电压。第二电压可以是单个参考电压，并且第一电压和参考电压之间的差可以与阈值进行比较。多个第二电压可以定义包括参考电压的电压范围，并且可以确定第一电压是否落入电压范围内。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式