专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

WO2005050722A1 DESIGN AND FABRICATION OF 6.1- Å FAMILY SEMICONDUCTOR DEVICES USING SEMI-INSULATING AlSb SUBSTRATE 审中-公开
标题翻译：使用半绝缘AlSb基板的6.1Å系列半导体器件的设计和制造
公开(公告)号：WO2005050722A1
公开(公告)日：2005-06-02
申请号：PCT/US2004/037707
申请日：2004-11-12
申请人： THE REGENTS OF THE UNIVERSITY OF CALIFORNIA , SHEROHMAN, John, W. , COOMBS, Arthur, W., III , YEE, Jick Hong , WU, Kuang Jen, J.
发明人： SHEROHMAN, John, W. , COOMBS, Arthur, W., III , YEE, Jick Hong , WU, Kuang Jen, J.
IPC分类号： H01L21/20
CPC分类号： H01L21/02546 , C30B23/02 , C30B29/40 , H01L21/02398 , H01L21/02466 , H01L21/02549 , H01L21/0256 , H01L21/02562
摘要： For the first time, an aluminum antimonide (AlSb) single crystal substrate is utilized to lattice-match to overlying semiconductor layers. The A1Sb substrate establishes a new design and fabrication approach to construct high-speed, low-power electronic devices while establishing inter-device isolation. Such lattice matching between the substrate and overlying semiconductor layers minimizes the formation of defects, such as threaded dislocations, which can decrease the production yield and operational life-time of 6.1-Å family heterostructure devices.
摘要翻译：首次使用锑酸铝（AlSb）单晶衬底与上层半导体层进行晶格匹配。 A1Sb衬底建立了一种新的设计和制造方法来构建高速，低功耗电子器件，同时建立了器件间隔离。衬底和上覆半导体层之间的这种晶格匹配使形成缺陷（例如螺纹位错）最小化，这可以降低6.1族家族异质结构器件的产量和使用寿命。

2. 发明申请

WO03023817A3 PROCESS FOR FORMING SEMICONDUCTOR QUANTUM DOTS WITH SUPERIOR STRUCTURAL AND MORPHOLOGICAL STABILITY 审中-公开
标题翻译：形成具有优良结构和形态稳定性的半导体量子点的工艺
公开(公告)号：WO03023817A3
公开(公告)日：2003-10-16
申请号：PCT/US0222962
申请日：2002-07-19
申请人： UNIV ILLINOIS , MOECK PETER , BROWNING NIGEL D
发明人： MOECK PETER , BROWNING NIGEL D
IPC分类号： C30B23/00 , C30B25/00 , C30B28/12 , C30B28/14 , H01L21/20 , H01L21/203 , H01L21/363 , H01L21/02 , C30B25/02 , H01L35/14
CPC分类号： B82Y30/00 , B82Y10/00 , H01L21/02381 , H01L21/02384 , H01L21/02395 , H01L21/02398 , H01L21/02409 , H01L21/02463 , H01L21/02466 , H01L21/02477 , H01L21/02532 , H01L21/02535 , H01L21/02546 , H01L21/02549 , H01L21/0256 , H01L21/02568 , H01L21/0259 , H01L21/0262 , H01L21/02667
摘要： A process for forming thermodynamically stable, epitaxially grown semiconductor quantum dots with varying degree of atomic long-range order is described. This procedure encompasses heteroepitaxial growth, external lattice mismatch strain and point defect engineering, and the conversion of a thermodynamically metastable semiconductor alloy predecessor structure into a structure of compositionally modulated/structurally transformed semiconductor quantum dots with varying degree of atomic long-range order by specific thermal treatments. These quantum dots are structurally stable at room temperature and reasonable device operation temperatures. The key structural transformation is achieved through thermodynamically driven atomic ordering. The resulting thermodynamically stable quantum dots have extensive applications in opto- and micro-electronic devices where the performance depends on both the structural and chemical homogeneity and long-term structural stability of these so called zero-dimensional entities.
摘要翻译：描述了形成具有不同程度的原子长程有序的热力学稳定的，外延生长的半导体量子点的过程。该过程包括异质外延生长，外部晶格失配应变和点缺陷工程，以及将热力学亚稳态半导体合金前驱体结构转化为具有不同程度的原子长程有序度的组成调制/结构变换的半导体量子点的结构治疗。这些量子点在室温和合理的器件操作温度下结构稳定。关键的结构转换是通过热力学驱动的原子排序实现的。由此产生的热力学稳定的量子点在光电和微电子器件中有广泛的应用，其性能取决于这些所谓的零维实体的结构和化学均匀性以及长期结构稳定性。

3. 发明申请

WO1994002665A1 SEMIMETAL-SEMICONDUCTOR HETEROSTRUCTURES AND MULTILAYERS 审中-公开
标题翻译：半导体半导体器件和多层
公开(公告)号：WO1994002665A1
公开(公告)日：1994-02-03
申请号：PCT/US1993006955
申请日：1993-07-19
申请人： UNIVERSITY OF HOUSTON
发明人： UNIVERSITY OF HOUSTON , GOLDING, Terry, D. , MILLER, John, H., Jr.
IPC分类号： C30B25/00
CPC分类号： C30B23/02 , C30B25/02 , C30B29/40 , H01L21/02395 , H01L21/02398 , H01L21/0242 , H01L21/02433 , H01L21/02466 , H01L21/02491 , H01L21/02507 , H01L21/02516 , H01L21/02549 , H01L21/02609 , H01L21/28581 , Y10S148/072 , Y10S148/115 , Y10T428/31678
摘要： The present invention provides for the fabrication of single layer semimetal/semiconductor heterostructures and multilayer semimetal/semiconductor structures. Each semimetal/semiconductor layer fabricated in accordance with the present invention has compatible crystal symmetry across the heterojunction between a semimetal and a semiconductor. A single layer semimetal/semiconductor structure is fabricated by growing a rhombohedral semimetal in a (111) direction on a substrate material having a (111) orientation, and then growing a zincblende semiconductor in a (111) direction on the semimetal. A multilayer semimetal/semiconductor structure may be grown from the single layer semimetal/semiconductor structure by growing an additional rhombohedral semimetal layer in a (111) direction on the preceding semiconductor grown, then growing an additional zincblende semiconductor layer in a (111) direction on the additional semimetal layer, and then repeating this process as many times as desired. Each semimetal to be sandwiched between semiconductors in the multilayer semimetal/semiconductor structure may be grown thin enough that the semimetal is converted into a semiconductor.
摘要翻译：本发明提供单层半金属/半导体异质结构和多层半金属/半导体结构的制造。根据本发明制造的每个半金属/半导体层在半金属和半导体之间的异质结上具有相容的晶体对称性。通过在具有（111）取向的衬底材料上生长（111）方向的菱形半金属，然后在半金属上沿（111）方向生长锌辉石半导体来制造单层半金属/半导体结构。可以从单层半金属/半导体结构生长多层半金属/半导体结构，通过在生长的先前半导体上沿（111）方向生长另外的菱面体半金属层，然后在（111）方向上生长另外的锌辉石半导体层附加的半金属层，然后根据需要重复该过程多次。夹在多层半金属/半导体结构中的半导体之间的每个半金属可以生长得足够薄以使半金属转变为半导体。

4. 发明申请

WO2014001840A1 INAS/ALSB/GASB BASED TYPE- II SL PIN DETECTOR WITH P ON N AND N ON P CONFIGURATIONS 审中-公开
标题翻译： INAS / ALSB / GASB型II型SL引脚检测器，P型N和N型配置
公开(公告)号：WO2014001840A1
公开(公告)日：2014-01-03
申请号：PCT/IB2012/053222
申请日：2012-06-26
申请人： ASELSAN ELEKTRONIK SANAYI VE TICARET ANONIM SIRKETI , ERGUN, Yuksel , HOSTUT, Mustafa
发明人： ERGUN, Yuksel , HOSTUT, Mustafa
IPC分类号： H01L31/0304 , H01L21/02 , H01L31/0352 , H01L31/105 , H01L29/15
CPC分类号： H01L31/035236 , B82Y20/00 , H01L21/02398 , H01L21/02463 , H01L21/02466 , H01L21/02507 , H01L21/02546 , H01L21/02549 , H01L21/02576 , H01L21/02579 , H01L31/03042 , H01L31/105 , H01L31/109
摘要： Novel N-structured In As/Al Sb(Al Ga Sb)/Ga Sb based type-II SL pin detector with p on n and n on p configurations are given to detect light in the Mid Wavelength Infrared Range-MWIR with a cut-off wavelength of 5µm. Better carrier confinements are performed by placing AlSb layers switching from InAs layers to Ga Sb layers successively in the growth direction throughout the SL pin diode where zero bias detectivity is improved as 6x10 13 A/Hz 1/2 at a wavelength of 4.2 µm at 79K. RoA value is measured as 1.8x10 6 Ωcm 2 which is better than nBn devices. Dark current density is also obtained in the range of 4-7x10 -7 A/cm at zero bias and Vb=0.3V respectively at 79K.
摘要翻译：给出了具有p在n和n上的p构型的新型N结构In As / Al Sb（Al Ga Sb）/ Ga Sb基型II型SL引脚检测器，以检测中波长红外范围-MWIR中的光，关闭波长为5μm。通过在整个SL引脚二极管中沿着生长方向连续地将AlSb层从InAs层切换到Ga Sb层来进行更好的载流子约束，其中在79K波长为4.2μm时，零偏压检测率被提高为6×1013A / Hz1 / 2。 RoA值测量为1.8×10 6Ωgm2，优于nBn器件。在零偏压下分别为4-7×10-7A / cm，在79K时分别为Vb = 0.3V时也可获得暗电流密度。

5. 发明申请

WO2009088883A2 LOW-DEFECT-DENSITY CRYSTALLINE STRUCTURE AND METHOD FOR MAKING SAME 审中-公开
标题翻译：低缺陷密度晶体结构及其制造方法
公开(公告)号：WO2009088883A2
公开(公告)日：2009-07-16
申请号：PCT/US2008088575
申请日：2008-12-30
申请人： UNIV OKLAHOMA , MADHAVIE EDIRISOORIYA , MISHIMA TETSUYA , SANTOS MICHAEL B
发明人： MADHAVIE EDIRISOORIYA , MISHIMA TETSUYA , SANTOS MICHAEL B
IPC分类号： H01L21/20
CPC分类号： H01L21/02521 , H01L21/02395 , H01L21/02398 , H01L21/02466 , H01L21/02502 , H01L21/02505 , H01L21/02549 , Y10T428/24942 , Y10T428/2495
摘要： A low-defect-density crystalline structure comprising a first crystalline material, a layer of second crystalline material epitaxially grown on the first crystalline material, and a layer of third crystalline material epitaxially grown on the second layer such that the second layer is positioned between the first crystalline material and the third crystalline material. The second and third crystalline materials cooperate to form a desirable relationship. The crystalline structures of the second crystalline material and third crystalline material have a higher crystalline compatibility than the first crystalline material and third crystalline material. The layer of second crystalline material is sufficiently thick to form the desirable relationship with the third crystalline material but sufficiently thin for the layer of second crystalline material to be strained. The layer of third crystalline material is grown to a thickness beyond a thickness had the third layer been grown on an unstrained second layer.
摘要翻译：包含第一晶体材料，外延生长在第一晶体材料上的第二晶体材料层和在第二层上外延生长的第三晶体材料层的低缺陷密度晶体结构使得第二层位于第一结晶材料和第三结晶材料。第二和第三结晶材料配合以形成期望的关系。第二结晶材料和第三结晶材料的晶体结构具有比第一结晶材料和第三结晶材料更高的结晶相容性。第二结晶材料层足够厚以与第三结晶材料形成期望的关系，但对于要应变的第二晶体材料层来说足够薄。如果第三层在无应变的第二层上生长，则将第三晶体材料层生长至超过厚度的厚度。

6. 发明申请

WO2018042534A1 半導体結晶基板、赤外線検出装置、光半導体装置、半導体装置、熱電変換素子、半導体結晶基板の製造方法及び赤外線検出装置の製造方法审中-公开
标题翻译：半导体晶体基板，红外线检测装置，光学半导体装置，半导体装置，热电转换元件，半导体晶体基板的制造方法以及红外线检测装置的制造方法
公开(公告)号：WO2018042534A1
公开(公告)日：2018-03-08
申请号：PCT/JP2016/075431
申请日：2016-08-31
申请人：富士通株式会社
发明人：奥村　滋一 , 苫米地　秀一 , 鈴木　僚
IPC分类号： H01L21/20 , G01J1/02 , H01L21/203 , H01L21/336 , H01L27/144 , H01L27/146 , H01L29/205 , H01L29/78 , H01L31/10 , H01L33/00 , H01L35/26 , H01S5/343
CPC分类号： H01L21/02502 , G01J1/02 , G01J1/0407 , G01J1/44 , H01L21/02398 , H01L21/02466 , H01L21/02546 , H01L21/02549 , H01L21/02631 , H01L21/20 , H01L21/203 , H01L21/28264 , H01L27/144 , H01L27/146 , H01L27/1467 , H01L27/14694 , H01L29/157 , H01L29/205 , H01L29/66462 , H01L29/7785 , H01L29/78 , H01L31/0304 , H01L31/035236 , H01L31/0392 , H01L31/10 , H01L31/184 , H01L33/00 , H01L33/0062 , H01L33/06 , H01L33/12 , H01L33/30 , H01L35/18 , H01L35/26 , H01L35/32 , H01L35/34 , H01S5/22 , H01S5/343
摘要：【課題】表面の平坦性の高いＧａＳｂ層が形成された半導体結晶基板を提供する。【解決手段】ＧａＳｂまたはＩｎＡｓを含む材料により形成された結晶基板と、前記結晶基板の上に、ＧａＳｂを含む材料により形成されたｎ型導電性の第１のバッファ層と、前記第１のバッファ層の上に、ＧａＳｂを含む材料により形成されたｐ型導電性の第２のバッファ層と、を有することを特徴とする半導体結晶基板により上記課題を解決する。
摘要翻译：要解决的问题：提供一种其上形成有高表面平坦度的GaSb层的半导体晶体基板。在晶体衬底上由包含GaSb的材料形成的n型导电性的第一缓冲层;形成在晶体衬底上的n型导电性的第一缓冲层; 以及在半导体晶体衬底上由包含GaSb的材料形成的p型导电性的第二缓冲层。

7. 发明申请

WO2017040547A2 MIXED GROUP-V SACRIFICIAL LAYERS FOR RELEASE AND TRANSFER OF MEMBRANES 审中-公开
标题翻译：用于释放和转移膜的混合的V族化合物层
公开(公告)号：WO2017040547A2
公开(公告)日：2017-03-09
申请号：PCT/US2016/049529
申请日：2016-08-30
申请人： STC.UNM
发明人： KRISHNA, Sanjay , KLEIN, Brianna , CAVALLO, Francesca , ZAMIRI, Seyedeh, Marziyeh
IPC分类号： H01L21/20
CPC分类号： H01L21/02631 , H01L21/02398 , H01L21/02463 , H01L21/02466 , H01L21/02507 , H01L21/02546 , H01L21/02549 , H01L21/02664 , H01L21/6835 , H01L2221/6835 , H01L2221/68368
摘要： A method for forming a semiconductor structure, includes: providing a host substrate; forming at least one sacrificial layer having two or more group-V species over the host substrate; forming at least one semiconductor layer over the at least one sacrificial layer; and transferring at least a portion of the at least one semiconductor layer from the host substrate onto an alternate substrate.
摘要翻译：一种形成半导体结构的方法，包括：提供主体衬底; 在所述主体衬底上形成具有两个或更多个V族物质的至少一个牺牲层; 在所述至少一个牺牲层上形成至少一个半导体层; 以及将所述至少一个半导体层的至少一部分从所述主体衬底转移到替代衬底上。

8. 发明申请

WO2014038986A1 ГЕТЕРОСТРУКТУРА НА ОСНОВЕ ТВЁРДОГО РАСТВОРА GalnAsSb, СПОСОБ ЕЁ ИЗГОТОВЛЕНИЯ И СВЕТОДИОД НА ОСНОВЕ ЭТОЙ ГЕТЕРОСТРУКТУРЫ 审中-公开
标题翻译： GALNASSB固体溶液型结构，其生产方法和基于固体结构的发光二极管
公开(公告)号：WO2014038986A1
公开(公告)日：2014-03-13
申请号：PCT/RU2013/000786
申请日：2013-09-10
申请人： ЖУРТАНОВ, Бижигит Ержигитович
发明人： ЖУРТАНОВ, Бижигит Ержигитович , СТОЯНОВ, Николай Деев
IPC分类号： H01L33/30 , H01L21/208
CPC分类号： H01L33/0025 , H01L21/02398 , H01L21/02463 , H01L21/02466 , H01L21/02546 , H01L21/02549 , H01L21/02623 , H01L33/0062 , H01L33/12 , H01L33/30
摘要： Настоящее изобретение относится к области полупроводниковых приборов, в частности к гетероструктуре на основе твердого раствора GalnAsSb со встречным p-n переходом, способу ее изготовления и светодиоду на основе этой гетероструктуры. Предлагаемая гетероструктура содержит подложку, содержащую GaSb, активный слой, содержащий твердый раствор GalnAsSb и расположенный над подложкой, ограничительный слой для локализации основных носителей, содержащий твердый раствор AlGaAsSb и расположенный над активным слоем, контактный слой, содержащий GaSb и расположенный над ограничительным слоем, причем дополнительно гетероструктура содержит буферный слой, содержащий твердый раствор GalnAsSb и расположенный между подложкой и активным слоем, причем буферный слой содержит индия меньше, чем активный слой. Использование указанного буферного слоя позволяет локализовать неосновные носители в активной области, благодаря этому увеличивается доля излучательной рекомбинации, и соответственно увеличивается квантовая эффективность гетерострутуры. Кроме того, использование указанного буферного слоя позволяет минимизировать влияние дефектов, прорастающих из подложки в активную область, что приводит к уменьшению глубоких акцепторных уровней и, соответственно, доли безызлучательной рекомбинации Шоккли-Рид-Холла и к увеличению квантовой эффективности гетероструктуры. Светодиоды, изготовленные на основе предлагаемой гетероструктуры, излучают в среднем инфракрасном диапазоне 1,8-2,4 мкм.
摘要翻译：本发明涉及半导体器件的领域，更具体地涉及基于具有反向p-n结的GalnAsSb的固溶体的异质结构，其制造方法和基于所述异质结构的发光二极管。所提出的异质结构包括含有GaSb的衬底，其包含GalnAsSb的固溶体并位于衬底上方的有源层，用于定位包含AlGaAsSb固溶体并位于有源层上方的多数载流子的限制层，以及包含GaSb并且位于限制层上方的接触层，其中所述异质结构另外包含缓冲层，所述缓冲层包含GalnAsSb的固溶体并且位于所述衬底和所述有源层之间，所述缓冲层含有比所述有源层少的铟。使用该缓冲层使得有可能在活性区域中定位少数载流子，导致辐射复合量的增加，从而提高异质结构的量子效率。此外，使用上述缓冲层使得可以最小化从衬底穿透到有源层中的缺陷的影响，导致深受体水平的降低，从而减少非辐射Shockley-Read的量 - 重组和异质结构的量子效率的增加。基于所提出的异质结构产生的发光二极管在1.8-2.4μm的中红外波段发射。

9. 发明申请

WO2003023817A2 PROCESS FOR FORMING SEMICONDUCTOR QUANTUM DOTS WITH SUPERIOR STRUCTURAL AND MORPHOLOGICAL STABILITY 审中-公开
标题翻译：形成具有超结构和形态稳定性的半导体量子点的方法
公开(公告)号：WO2003023817A2
公开(公告)日：2003-03-20
申请号：PCT/US2002/022962
申请日：2002-07-19
申请人： THE BOARD OF TRUSTEES OF THE UNIVERSITY OF ILLINOIS , MÖCK, Peter , BROWNING, Nigel, D.
发明人： MÖCK, Peter , BROWNING, Nigel, D.
IPC分类号： H01L
CPC分类号： B82Y30/00 , B82Y10/00 , H01L21/02381 , H01L21/02384 , H01L21/02395 , H01L21/02398 , H01L21/02409 , H01L21/02463 , H01L21/02466 , H01L21/02477 , H01L21/02532 , H01L21/02535 , H01L21/02546 , H01L21/02549 , H01L21/0256 , H01L21/02568 , H01L21/0259 , H01L21/0262 , H01L21/02667
摘要： A process for forming thermodynamically stable, epitaxially grown semiconductor quantum dots with varying degree of atomic long-range order is described. This procedure encompasses heteroepitaxial growth, external lattice mismatch strain and point defect engineering, and the conversion of a thermodynamically metastable semiconductor alloy predecessor structure into a structure of compositionally modulated/structurally transformed semiconductor quantum dots with varying degree of atomic long-range order by specific thermal treatments. These quantum dots are structurally stable at room temperature and reasonable device operation temperatures. The key structural transformation is achieved through thermodynamically driven atomic ordering. The resulting thermodynamically stable quantum dots have extensive applications in opto- and micro-electronic devices where the performance depends on both the structural and chemical homogeneity and long-term structural stability of these so called zero-dimensional entities.
摘要翻译：描述了具有不同程度的原子长程顺序形成热力学稳定的外延生长的半导体量子点的方法。该方法包括异质外延生长，外部晶格失配应变和点缺陷工程，以及将热力学亚稳半导体合金前驱体结构转变成具有不同程度的原子长距离顺序的成分调制/结构转换的半导体量子点的结构治疗。这些量子点在室温和合理的器件工作温度下在结构上是稳定的。关键的结构转换是通过热力学驱动的原子排序实现的。所得的热力学稳定量子点在光电和微电子器件中具有广泛的应用，其中性能取决于这些所谓的零维实体的结构和化学均匀性以及长期的结构稳定性。

10. 发明申请

WO2017189581A1 SURFACE FUNCTIONALIZATION AND PASSIVATION WITH A CONTROL LAYER 审中-公开
标题翻译：一个控制层的表面功能化和钝化
公开(公告)号：WO2017189581A1
公开(公告)日：2017-11-02
申请号：PCT/US2017/029422
申请日：2017-04-25
申请人： APPLIED MATERIALS, INC. , THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
发明人： YOSHIDA, Naomi , DONG, Lin , KUMMEL, Andrew C. , KACHIAN, Jessica S. , EDMONDS, Mary , WOLF, Steven
IPC分类号： H01L21/02 , H01L21/205 , H01L21/324
CPC分类号： H01L21/02532 , H01L21/02052 , H01L21/02112 , H01L21/0217 , H01L21/0228 , H01L21/02301 , H01L21/02381 , H01L21/02389 , H01L21/02395 , H01L21/02398 , H01L21/28194
摘要： Embodiments described herein relate to semiconductor and metal substrate surface preparation and controlled growth methods. An example application is formation of an atomic layer deposition (ALD) control layer as a diffusion barrier or gate dielectric layer and subsequent ALD processing. Embodiments described herein are believed to be advantageously utilized concerning gate oxide deposition, diffusion barrier deposition, surface functionalization, surface passivation, and oxide nucleation, among other processes. More specifically, embodiments described herein provide for silicon nitride ALD processes which functionalize, passivate, and nucleate a SiN x monolayer at temperatures below about 300°C.
摘要翻译：这里描述的实施例涉及半导体和金属衬底表面制备和受控生长方法。示例应用是形成作为扩散阻挡层或栅极电介质层的原子层沉积（ALD）控制层以及随后的ALD处理。相信在此描述的实施例有利地用于关于栅极氧化物沉积，扩散势垒沉积，表面功能化，表面钝化和氧化物成核等等。更具体地，本文描述的实施方式提供氮化硅ALD工艺，其在低于约300℃的温度下功能化，钝化并成核SiN x单层。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式