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1. 发明申请

WO2012018918A3 GENERATING A NON-REVERSIBLE STATE AT A BITCELL HAVING A FIRST MAGNETIC TUNNEL JUNCTION AND A SECOND MAGNETIC TUNNEL JUNCTION 审中-公开
标题翻译：在具有第一磁性隧道接头和第二磁性隧道接头的位置处产生不可逆状态
公开(公告)号：WO2012018918A3
公开(公告)日：2012-05-31
申请号：PCT/US2011046429
申请日：2011-08-03
申请人： QUALCOMM INC , RAO HARI M , KIM JUNG PILL , KANG SEUNG H , ZHU XIAOCHUN , KIM TAE HYUN , LEE KANGHO , LI XIA , HSU WAH NAM , HAO WUYANG , SUH JUNGWON , YU NICHOLAS K , NOWAK MATTHEW MICHAEL , MILLENDORF STEVEN M , ASHKENAZI ASAF
发明人： RAO HARI M , KIM JUNG PILL , KANG SEUNG H , ZHU XIAOCHUN , KIM TAE HYUN , LEE KANGHO , LI XIA , HSU WAH NAM , HAO WUYANG , SUH JUNGWON , YU NICHOLAS K , NOWAK MATTHEW MICHAEL , MILLENDORF STEVEN M , ASHKENAZI ASAF
IPC分类号： G11C17/16 , G11C11/16 , G11C17/02
CPC分类号： G11C11/16 , G11C11/14 , G11C11/1655 , G11C11/1659 , G11C11/1673 , G11C11/1675 , G11C17/02 , G11C17/16 , G11C29/027
摘要： A method of generating a non - reversible state at a bitcell having a first magnetic tunnel junction (MTJ) and a second MTJ includes applying a program voltage to the first MTJ of the bitcell without applying the program voltage to the second MTJ of the bitcell. A memory device (102) includes a bitcell having a first MTJ (106) and a second MTJ (108) and programming circitry (104) configured to generate a non-reversible state at the bitcell by applying a program signal to a selected one of the first MTJ and the second MTJ of the bitcell.
摘要翻译：在具有第一磁性隧道结（MTJ）和第二MTJ的位单元处产生不可逆状态的方法包括将编程电压施加到位单元的第一MTJ，而不将编程电压施加到位单元的第二MTJ。存储器设备（102）包括具有第一MTJ（106）和第二MTJ（108）和编程环绕（104）的比特单元，其被配置为通过将程序信号施加到所选择的一个中的所选择的一个来生成位单元的不可逆状态第一个MTJ和该位单元的第二个MTJ。

2. 发明申请

WO2012021775A3 SYSTEM AND METHOD TO INITIATE A HOUSEKEEPING OPERATION AT A MOBILE DEVICE 审中-公开
标题翻译：在移动设备上启动家庭娱乐操作的系统和方法
公开(公告)号：WO2012021775A3
公开(公告)日：2012-04-05
申请号：PCT/US2011047535
申请日：2011-08-12
申请人： QUALCOMM INC , TOMS THOMAS R , RAO HARI M , KANG SEUNG H , KIM JUNG PILL , SUH JUNGWON
发明人： TOMS THOMAS R , RAO HARI M , KANG SEUNG H , KIM JUNG PILL , SUH JUNGWON
IPC分类号： G11C16/30 , G11C5/14 , H04W52/00
CPC分类号： G11C16/3418 , G06F1/263 , G06F11/1048
摘要： A system and method to initiate a housekeeping operation at a mobile device is disclosed. In a particular embodiment, a method at a mobile device includes modifying a scheduled housekeeping operation in response to determining that the mobile device is in a charging mode.
摘要翻译：公开了一种在移动设备上启动内务管理操作的系统和方法。在特定实施例中，在移动设备处的方法包括响应于确定移动设备处于充电模式来修改预定的内务管理操作。

3. 发明申请

WO2011072058A2 MAGNETIC TUNNEL JUNCTION DEVICE 审中-公开
标题翻译：磁铁隧道连接装置
公开(公告)号：WO2011072058A2
公开(公告)日：2011-06-16
申请号：PCT/US2010059541
申请日：2010-12-08
申请人： QUALCOMM INC , ZHU XIAOCHUN , KANG SEUNG H , LI XIA , LEE KANGHO
发明人： ZHU XIAOCHUN , KANG SEUNG H , LI XIA , LEE KANGHO
IPC分类号： H01L43/08
CPC分类号： H01L43/02 , H01L27/222 , H01L43/08 , H01L43/10 , H01L43/12
摘要： A system and method of manufacturing and using a magnetic tunnel junction device is disclosed. In a particular embodiment, a magnetic tunnel junction device includes a first free layer and second free layer. The magnetic tunnel junction also includes a spin torque enhancement layer. The magnetic tunnel junction device further includes a spacer layer between the first and second free layers that includes a material and has a thickness that substantially inhibits exchange coupling between the first and second free layers. The first and second free layers are magneto-statically coupled.
摘要翻译：公开了制造和使用磁性隧道结装置的系统和方法。在特定实施例中，磁性隧道结装置包括第一自由层和第二自由层。磁隧道结还包括自旋转矩增强层。磁性隧道结器件还包括位于第一和第二自由层之间的间隔层，其包括材料并且具有基本上抑制第一和第二自由层之间的交换耦合的厚度。第一和第二自由层是磁静态耦合的。

4. 发明申请

WO2010101860A3 REDUCING SOURCE LOADING EFFECT IN SPIN TORQUE TRANSFER MAGNETORESITIVE RANDOM ACCESS MEMORY (STT-MRAM) 审中-公开
标题翻译：减少转子转子磁链随机存取存储器（STT-MRAM）中的源装载效应
公开(公告)号：WO2010101860A3
公开(公告)日：2010-11-11
申请号：PCT/US2010025834
申请日：2010-03-02
申请人： QUALCOMM INC , LEE KANGHO , KANG SEUNG H , ZHU XIAOCHUN
发明人： LEE KANGHO , KANG SEUNG H , ZHU XIAOCHUN
IPC分类号： G11C11/16
CPC分类号： H01L43/08 , G06F17/5068 , G11C11/16 , G11C11/161 , G11C11/1675 , H01L43/02 , H01L43/12
摘要： Systems and methods to reduce source loading effects in STT-MRAM are disclosed. In a particular embodiment, a method includes determining a switching current ratio of a magnetic tunnel junction (MTJ) structure that enables stable operation of a memory cell. The memory cell includes the MTJ structure serially coupled to an access transistor. The method also includes modifying an offset magnetic field that is incident to a free layer of the MTJ structure. The modified offset magnetic field causes the MTJ structure to exhibit the switching current ratio.
摘要翻译：公开了减少STT-MRAM中的源负载效应的系统和方法。在特定实施例中，一种方法包括确定使得能够稳定地操作存储器单元的磁性隧道结（MTJ）结构的开关电流比。存储单元包括串行耦合到存取晶体管的MTJ结构。该方法还包括修改入射到MTJ结构的自由层的偏移磁场。改进的偏移磁场使MTJ结构呈现开关电流比。

5. 发明申请

WO2012019135A3 MRAM DEVICE AND INTEGRATION TECHNIQUES COMPATIBLE WITH LOGIC INTEGRATION 审中-公开
标题翻译： MRAM设备和集成技术兼容逻辑集成
公开(公告)号：WO2012019135A3
公开(公告)日：2012-03-29
申请号：PCT/US2011046811
申请日：2011-08-05
申请人： QUALCOMM INC , LI XIA , ZHU XIAOCHUN , KANG SEUNG H
发明人： LI XIA , ZHU XIAOCHUN , KANG SEUNG H
IPC分类号： H01L27/22 , B82Y25/00 , H01L43/08 , H01L43/12
CPC分类号： H01L43/12 , B82Y10/00 , G11C11/161 , H01L27/228 , H01L43/08
摘要： A semiconductor device includes a magnetic tunnel junction (MTJ) storage element configured to be disposed in a common interlayer metal dielectric (IMD) layer with a logic element. Cap layers separate the common IMD layer from a top and bottom IMD layer. Top and bottom electrodes are coupled to the MTJ storage element. Metal connections to the electrodes are formed in the top and bottom IMD layers respectively through vias in the separating cap layers. Alternatively, the separating cap layers are recessed and the bottom electrodes are embedded, such that direct contact to metal connections in the bottom IMD layer is established. Metal connections to the top electrode in the common IMD layer are enabled by isolating the metal connections from the MTJ storage elements with metal islands and isolating caps.
摘要翻译：一种半导体器件包括被配置为设置在具有逻辑元件的公共层间金属电介质（IMD）层中的磁性隧道结（MTJ）存储元件。盖层将普通IMD层与顶部和底部IMD层分开。顶部和底部电极连接到MTJ存储元件。与电极的金属连接分别通过分离帽层中的通孔形成在顶部和底部IMD层中。可选地，分离盖层凹入并且底部电极被嵌入，从而建立与底部IMD层中的金属连接的直接接触。通过将金属连接与MTJ存储元件与金属岛和隔离帽隔离，可以实现与公共IMD层中的顶部电极的金属连接。

6. 发明申请

WO2010120918A3 MAGNETIC TUNNEL JUNCTION (MTJ) AND METHODS, AND MAGNETIC RANDOM ACCESS MEMORY (MRAM) EMPLOYING SAME 审中-公开
标题翻译：磁性隧道结（MTJ）和方法以及使用其的磁性随机存取存储器（MRAM）
公开(公告)号：WO2010120918A3
公开(公告)日：2011-01-20
申请号：PCT/US2010031080
申请日：2010-04-14
申请人： QUALCOMM INC , ZHU XIAOCHUN , NOWAK MATTHEW , LI XIA , KANG SEUNG H
发明人： ZHU XIAOCHUN , NOWAK MATTHEW , LI XIA , KANG SEUNG H
IPC分类号： H01L27/115 , G11B5/39 , G11C11/15
CPC分类号： H01L43/02 , G11C11/16 , G11C11/161 , G11C11/1659 , H01F10/3254 , H01F10/3272 , H01L27/228 , H01L43/08 , H01L43/12
摘要： Magnetic tunnel junctions (MTJs) and methods of forming same are disclosed. A pinned layer is disposed in the MTJ such that a free layer of the MTJ can couple to a drain of an access transistor when provided in a magnetic random access memory (MRAM) bitcell. This structure alters the write current flow direction to align the write current characteristics of the MTJ with write current supply capability of an MRAM bitcell employing the MTJ. As a result, more write current can be provided to switch the MTJ from a parallel (P) to anti-parallel (AP) state. An anti-ferromagnetic material (AFM) layer is provided on the pinned layer to fix pinned layer magnetization. To provide enough area for depositing the AFM layer to secure pinned layer magnetization, a pinned layer having a pinned layer surface area greater than a free layer surface area of the free layer is provided.
摘要翻译：公开了磁隧道结（MTJ）及其形成方法。被钉扎层设置在MTJ中，使得当提供在磁随机存取存储器（MRAM）位单元中时，MTJ的自由层可以耦合到存取晶体管的漏极。该结构改变写入电流流动方向，以使MTJ的写入电流特性与使用MTJ的MRAM位单元的写入电流供应能力对准。结果，可以提供更多的写入电流以将MTJ从并行（P）切换到反并行（AP）状态。在钉扎层上提供反铁磁材料（AFM）层以固定钉扎层的磁化强度。为了提供足够的用于沉积AFM层以确保钉扎层磁化的区域，提供了具有大于自由层的自由层表面积的钉扎层表面积的钉扎层。

7. 发明申请

WO2012009524A3 MAGNETIC STORAGE ELEMENT COMPRISING A FUNCTIONAL LAYER IN THE PINNED LAYERS AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：磁性层包含功能层的磁性储存元件及其制造方法
公开(公告)号：WO2012009524A3
公开(公告)日：2012-03-08
申请号：PCT/US2011043992
申请日：2011-07-14
申请人： QUALCOMM INC , CHEN WEI-CHUAN , KANG SEUNG H , ZHU XIAOCHUN , LI XIA
发明人： CHEN WEI-CHUAN , KANG SEUNG H , ZHU XIAOCHUN , LI XIA
IPC分类号： H01L43/08 , H01L27/22
CPC分类号： H01L43/08
摘要： A magnetic tunnel junction (MTJ) storage element comprises a pinned layer stack (520) and functional layer. The pinned layer stack is formed of a plurality of layers at least one comprising a bottom pinned layer (206a, 206b), a coupling layer (208), and a top pinned layer (210a, 210b). The functional layers (540, 560) are disposed in the bottom pinned layer and/or the top pinned layer.
摘要翻译：磁性隧道结（MTJ）存储元件包括钉扎层堆叠（520）和功能层。钉扎层堆叠由多个层组成，至少一层包括底部钉扎层（206a，206b），耦合层（208）和顶部钉扎层（210a，210b）。功能层（540,560）设置在底部被钉扎层和/或顶部钉扎层中。

8. 发明申请

WO2011066324A3 MAGNETIC TUNNEL JUNCTION DEVICE AND FABRICATION 审中-公开
标题翻译：磁性隧道接头装置和制造
公开(公告)号：WO2011066324A3
公开(公告)日：2011-10-20
申请号：PCT/US2010057891
申请日：2010-11-23
申请人： QUALCOMM INC , LI XIA , KANG SEUNG H , ZHU XIAOCHUN
发明人： LI XIA , KANG SEUNG H , ZHU XIAOCHUN
IPC分类号： G11C11/15 , H01L27/22 , H01L43/12 , H04B7/005 , H04W52/12 , H04W52/26 , H04W52/34 , H04W52/44 , H04W52/54 , H04W72/12
CPC分类号： H01L43/12 , G11C11/15 , G11C11/161 , H01L21/00 , H01L27/224 , H01L43/08 , H04W52/12 , H04W52/26 , H04W52/34 , H04W52/44 , H04W52/54 , H04W72/1231 , H04W72/1247 , H04W72/1252 , H04W88/08 , H04W88/12
摘要： A magnetic tunnel junction (MTJ) device and fabrication method is disclosed. In a particular embodiment, a method is disclosed that includes forming a magnetic tunnel junction structure (202) above a bottom electrode (110, 702). The method also includes forming a diffusion barrier layer (302, 402) above and adjacent to the magnetic tunnel junction structure. The method further includes etching back the diffusion barrier layer, removing the diffusion barrier layer above the magnetic tunnel junction structure. The method also includes connecting a top of the magnetic tunnel junction structure to a conductive layer (604, 704).
摘要翻译：公开了一种磁性隧道结（MTJ）装置及其制造方法。在特定实施例中，公开了一种方法，其包括在底部电极（110,702）上形成磁性隧道结结构（202）。该方法还包括在磁性隧道结结构上方并邻近形成扩散阻挡层（302,402）。该方法还包括蚀刻扩散阻挡层，去除在磁性隧道结结构上方的扩散阻挡层。该方法还包括将磁性隧道结结构的顶部连接到导电层（604,704）。

9. 发明申请

WO2012015754A2 LATCHING CIRCUIT 审中-公开
标题翻译：锁定电路
公开(公告)号：WO2012015754A2
公开(公告)日：2012-02-02
申请号：PCT/US2011045222
申请日：2011-07-25
申请人： QUALCOMM INC , JUNG SEONG-OOK , RYU KYUNGHO , KIM JISU , KIM JUNG PILL , KANG SEUNG H
发明人： JUNG SEONG-OOK , RYU KYUNGHO , KIM JISU , KIM JUNG PILL , KANG SEUNG H
IPC分类号： G11C11/16
CPC分类号： G11C11/1675 , G11C11/1659 , G11C11/1673 , G11C13/0002 , G11C14/009
摘要： A non-volatile latch circuit includes a pair of cross-coupled inverters, a pair of resistance-based memory elements, and write circuitry configured to write data to the pair of resistance-based memory elements. The pair of resistance-based memory elements is isolated from the pair of cross-coupled inverters during a latching operation. A sensing circuit includes a first current path that includes a first resistance-based memory element and an output of the sensing circuit. The sensing circuit includes a second current path to reduce current flow through the first resistance-based memory element at a first operating point of the sensing circuit. The sensing circuit may also include an n-type metal-oxide-semiconductor (NMOS) transistor to provide a step down supply voltage to the first current path.
摘要翻译：非易失性锁存电路包括一对交叉耦合的反相器，一对基于电阻的存储器元件和被配置为将数据写入到该对基于电阻的存储器元件的写入电路。在锁定操作期间，一对基于电阻的存储器元件与一对交叉耦合的反相器隔离。感测电路包括第一电流路径，其包括第一基于电阻的存储元件和感测电路的输出。感测电路包括第二电流路径，以减小在感测电路的第一工作点处通过第一基于电阻的存储元件的电流。感测电路还可以包括n型金属氧化物半导体（NMOS）晶体管，以向第一电流路径提供降压电源电压。

10. 发明申请

WO2011088375A3 SPIN TORQUE DRIVEN MAGNETIC TUNNEL JUNCTION WITH NON-UNIFORM CURRENT PATH AND COMPOSITE HARDMASK ARCHITECTURE FOR FORMING THE SAME 审中-公开
标题翻译：旋转扭矩驱动磁性隧道结与非均匀电流路径和复合材料组合架构形成
公开(公告)号：WO2011088375A3
公开(公告)日：2011-09-22
申请号：PCT/US2011021376
申请日：2011-01-14
申请人： QUALCOMM INC , CHEN WEI-CHUAN , KANG SEUNG H , ZHU XIAOCHUN
发明人： CHEN WEI-CHUAN , KANG SEUNG H , ZHU XIAOCHUN
IPC分类号： H01L27/22 , B82Y25/00 , G11C11/16 , H01F10/32 , H01L43/08
CPC分类号： B82Y25/00 , B82Y10/00 , G11C11/161 , H01F10/3254 , H01F10/3272 , H01F41/32 , H01L43/08 , H01L43/12
摘要： A magnetic tunnel junction (MTJ) storage element (300) and method of forming the MTJ are disclosed. The magnetic tunnel junction (MTJ) storage element includes a pinned layer (206, 210), a barrier layer (212), a free layer (214) and a composite hardmask or top electrode (304, 306). The composite hardmask / top electrode architecture is configured to provide a non -uniform current path through the MTJ storage element and is formed from electrodes having different resistance characteristics coupled in parallel. An optional tuning layer (302) interposed between the free layer and the top electrode helps to reduce the damping constant of the free layer.
摘要翻译：公开了磁性隧道结（MTJ）存储元件（300）和形成MTJ的方法。磁性隧道结（MTJ）存储元件包括被钉扎层（206,210），阻挡层（212），自由层（214）和复合硬掩模或顶部电极（304,306）。复合硬掩模/顶电极结构被配置为提供穿过MTJ存储元件的不均匀的电流路径，并且由具有并联耦合的不同电阻特性的电极形成。插入在自由层和顶部电极之间的可选的调谐层（302）有助于减小自由层的阻尼常数。

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