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    • 3. 发明申请
    • HYDRAULISCHE BREMSANLAGE FÜR EIN LANDFAHRZEUG
    • 液压制动系统用于陆地车辆
    • WO2006131367A1
    • 2006-12-14
    • PCT/EP2006/005492
    • 2006-06-08
    • LUCAS AUTOMOTIVE GMBHHELLER, FrankBACH, ThomasTHELEN, HaraldKNECHTGES, JosefSCHMITT, BerndCHEMNITZ, Christian
    • BACH, ThomasTHELEN, HaraldKNECHTGES, JosefSCHMITT, BerndCHEMNITZ, Christian
    • B60T8/48
    • B60T8/1766B60T8/175B60T8/36B60T8/404B60T8/4872
    • Eine hydraulische Bremsanlage (10) für ein Landfahrzeug, mit einem vom Fahrer durch ein Pedal (13) direkt oder über einen dem Pedal (13) nachgeschalteten Bremskraftverstärker (14) zu betätigenden Hauptzylinder (12) zum Erzeugen von Bremsdruck in zwei Bremskreisen (I, II) , von denen jeder zwei Radbremsen (50,60) aufweist, wobei eine hydraulische Verbindung zwischen dem Hauptzylinder (12) und den Radbremsen (50,60) durch Ventilanordnungen (51,52,61,62,71,72) in Abhängigkeit von Ansteuersignalen aus einer elektronischen Steuerung (ECU) herzustellen oder zu sperren ist, um vom Fahrer direkt bewirkte Normalbremsungen oder durch die elektronische Steuerung (ECU) beeinflusste Bremsungen in Abhängigkeit von der elektronischen Steuerung (ECU) zugeführten, das Fahrzeugverhalten und/oder den Fahrerwunsch wiedergebenden Messgrößen auszuführen, indem der Bremsdruckverlauf in den Radbremsen (50,60) durch Ansteuern der ihnen zugeordneten Ventilanordnungen (51,52,61,62,71,72) verändert wird, wobei die elektronische Steuerung (ECU) dazu eingerichtet und programmiert ist, für das Einstellen eines für ein bestimmtes Fahrzeugverhalten erforderlichen Bremsdruckverlaufes (p-gesamt) Ansteuersignale (m-s) bereitzustellen, durch die das Einstellen eines jeweiligen Bremsdruckverlaufs (p-kreis-1, p-kreis-2) in den beiden Bremskreisen (I, II) in vordefinierten Druckstufen (delta-p) zeitlich um eine im Wesentlichen vordefinierte Zeitstufe (delta-t) versetzt ist.
    • 液压制动系统(10)用于陆地车辆,包括由驾驶员通过一个踏板(13)直接地或经由踏板下游(13)所述的制动助力器(14)被致动的主缸(12),用于产生在两个制动回路的制动压力(I, II),其中的每一个包括两个车轮制动器(50,60),其特征在于,一液压主缸之间(与车轮制动器)通过阀组件()依赖连接12)(50,60 51,52,61,62,71,72 车辆行为和/或驾驶者的要求将被从一个电子控制单元(ECU)或块顺序(ECU)直接由驾驶员引起的正常制动或由电子控制单元的电子控制的影响制动功能(ECU),再现提供由控制信号的 通过改变车轮制动器的制动压力特性(50,60),通过驱动其相关联的阀组件(51,52,61,62,71,72)来执行测量变量,我们 D,其中,所述电子控制器(ECU)被设计和编程用于设定所需的特定的车辆行为制动压力特性(对总的)控制信号提供(MS),由相应的制动压力特性(p-回路1的设定, 在两个制动回路(I,II)对 - 电路-2)是由一个基本上预定的时间阶段(Δ-T)放置在预定义的时间压力级(Δ-p)。
    • 6. 发明申请
    • SINGLE PHOTON COUNTING DETECTOR SYSTEM HAVING IMPROVED COUNTER ARCHITECTURE
    • 具有改进的计数器结构的单光子计数检测器系统
    • WO2012110162A1
    • 2012-08-23
    • PCT/EP2011/074237
    • 2011-12-29
    • PAUL SCHERRER INSTITUTSCHMITT, Bernd
    • SCHMITT, Bernd
    • H04N5/3745H04N5/32G01N23/00G01T1/00G01T1/24
    • G01T1/29G01T1/247H04N5/32H04N5/37455
    • The present invention relates to a single photon counting detector system (14), comprising: a) a layer of photosensitive material (4); b) an NxM array of photo-detector diodes (2) arranged in said layer of photosensitive material (4); each of said photo-detector diodes (2) having a bias potential interface (12) and a diode output interface, said bias potential interface (12) of each photo-detector diode (2) being connected to a bias potential (V bias ); c) an NxM array of high gain, low noise readout unit cells (RO), one readout unit cell (RO) for each photo- detector diode (2); d) each readout unit cell (RO) comprising: d1) an input interface (IN) connected to said diode output interface, a high-gain voltage amplifying means (amp) comprising an integration capacitor (C int ), d2) at least two parallel lines of digital counters, d3) each line comprising a comparator having an individually selectable threshold (threshold1, threshold 2) and a gateable section (gate1, gate2) to determine the counting intervals of the digital counters. e) a multiplexing means allowing to access the readout cell unit either on a per pixel basis or for several pixels in parallel to read out the digital counter to a data processing means transfering the data off the chip to the data processing means, in particular external readout electronics which do not form an integral part of the readout unit cells.
    • 本发明涉及单光子计数检测器系统(14),其包括:a)感光材料层(4); b)布置在所述感光材料层(4)中的光检测器二极管(2)的N×M阵列; 每个所述光检测器二极管(2)具有偏置电位接口(12)和二极管输出接口,每个光检测器二极管(2)的所述偏置电势接口(12)连接到偏置电位(Vbias); c)每个光检测器二极管(2)的高增益,低噪声读出单元(RO),一个读出单元(RO)的N×M阵列; d)每个读出单元(RO),包括:d1)连接到所述二极管输出接口的输入接口(IN),包括积分电容器(Cint)的高增益电压放大装置(amp),d2)至少两个并联 数字计数器线d3)每条线包括具有可单独选择的阈值(阈值1,阈值2)的比较器和可选择部分(gate1,gate2),以确定数字计数器的计数间隔。 e)多路复用装置,允许以每个像素为基础或多个并行的像素访问读出单元单元,以将数字计数器读出到数据处理装置,将数据从芯片传送到数据处理装置,特别是外部 读出电子器件不会形成读出单元电池的组成部分。
    • 7. 发明申请
    • X-RAY DETECTOR WITH INTEGRATING READOUT CHIP FOR SINGLE PHOTON RESOLUTION
    • 具有集成读取芯片的X射线探测器,用于单光子分辨率
    • WO2011023431A1
    • 2011-03-03
    • PCT/EP2010/059031
    • 2010-06-24
    • PAUL SCHERRER INSTITUTSCHMITT, Bernd
    • SCHMITT, Bernd
    • G01T1/17
    • G01T1/17
    • According to the present invention, an X-ray detector is disclosed, comprising: a) a layer of photosensitive material (4); b) an NxM array of photo-detector diodes (2) arranged in said layer of photosensitive material (4); each of said photo-detector diodes (2) having a bias potential interface (12) and a diode output interface, said bias potential interface (12) of each photo-detector diode (2) being connected to a bias potential (V bias ); c) an NxM array of high gain, low noise readout unit cells (RO), one readout unit cell (RO) for each photo-detector diode (2 ); d) each readout unit cell (RO) comprising: d1) an input interface (IN) connected to said diode output interface, a high-gain voltage amplifying means (PA) comprising an integration capacitor (C fb ), d2) a first switch (S1) in parallel to the integration capacitor (C fb ), d3) a sample/hold capacitor (C s ) disposed between a second switch (S2) and third switch (S3), wherein the sample/hold capacitor (C s ) is connectable to an output (OUT) of the high-gain voltage amplifying means (PA) via the second switch (S2) and is connectable to a signal output line (SO) via the third switch (S3); e) a multiplexing means (MM) comprising a row select and a column select circuit allowing to access each readout cell unit (RO), i.e. to read out the analog signal as actually stored in the sample/hold capacitor (C s ) to a data processing means (DPM) controlling the multiplexing means.
    • 根据本发明,公开了一种X射线检测器,包括:a)感光材料层(4); b)布置在所述感光材料层(4)中的光检测器二极管(2)的N×M阵列; 每个所述光检测器二极管(2)具有偏置电位接口(12)和二极管输出接口,每个光检测器二极管(2)的所述偏置电势接口(12)连接到偏置电位(Vbias); c)用于每个光检测器二极管(2)的高增益,低噪声读出单元(RO),一个读出单元(RO)的N×M阵列; d)每个读出单元(RO),包括:d1)连接到所述二极管输出接口的输入接口(IN),包括积分电容器(Cfb)的高增益电压放大装置(df),d2)第一开关 S1)与积分电容器(Cfb)并联,d3)设置在第二开关(S2)和第三开关(S3)之间的采样/保持电容器(Cs),其中采样/保持电容器(Cs)可连接到 经由第二开关(S2)的高增益电压放大装置(PA)的输出(OUT),并且可经由第三开关(S3)连接到信号输出线(SO)。 e)包括行选择和列选择电路的复用装置(MM),其允许访问每个读出单元单元(RO),即将实际存储在采样/保持电容器(Cs)中的模拟信号读出到数据 控制复用装置的处理装置(DPM)。
    • 9. 发明申请
    • A READOUT CHIP FOR SINGLE PHOTON COUNTING
    • 单光子计数器的读出芯片
    • WO2007057213A1
    • 2007-05-24
    • PCT/EP2006/011098
    • 2006-11-20
    • PAUL SCHERRER INSTITUTSCHMITT, Bernd
    • SCHMITT, Bernd
    • H01L27/146H03K21/12
    • H01L27/1446H01L31/101
    • It is the aim of the present invention to improve the properties and the speed of readout electronic significantly without losing accuracy of the counting in photon-counting imaging devices. This aim is achieved according to the present invention by a readout chip (2) for single photon counting, comprising: a) a plurality of N individually working channels each assigned to a respective detector diode; each channel comprising a counter (8 1 to 8 128 ) being designed as a binary counter having a length of M bits and a number of programmable bits (pbl to pbl28); b) a serial or parallel data input shift register (4) for entering values for the counter (8 1 to 8 128 ) and the programmable bits (pbl to pbl28); and c) a number of data output shift register (16); each having a number of K data outputs (20), whereby means (18) are provided for selectively multiplexing each of the K data outputs (20) onto a selectable bit of the data output shift register (16). These features allow a much faster readout of the counter since the counter can be readout in parallel groups of K bits each cycle. Further, a variable length of selectable bits for each counter in each channel can be readout advantageously by multiplexing the K data outputs to the bits of interest which increases the speed of readout tremendeously.
    • 本发明的目的是显着提高读出电子的性质和速度,而不会损失光子计数成像装置中的计数精度。 根据本发明,该目的通过用于单光子计数的读出芯片(2)实现,包括:a)分配给相应检测器二极管的多个N个独立工作通道; 每个通道包括被设计为具有M位长度和可编程位数(pbl至pbl28)的二进制计数器的计数器(8 1至8 128)。 b)串行或并行数据输入移位寄存器(4),用于输入计数器(8×1至8×128)的值和可编程位(pbl至pbl28); 和c)多个数据输出移位寄存器(16); 每个具有多个K个数据输出(20),由此提供装置(18)用于有选择地将每个K个数据输出(20)复用到数据输出移位寄存器(16)的可选位上。 这些特征允许更快地读出计数器,因为计数器可以以每个周期的K位并行读出。 此外,可以有利地通过将K个数据输出复用到增加读出速度的感兴趣的位来读出每个通道中每个计数器的可变位的可变长度。