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1. 发明申请

WO2014110341A1 RESISTIVE RANDOM ACCESS MEMORY CELLS HAVING VARIABLE SWITCHING CHARACTERISTICS 审中-公开
标题翻译：具有可变开关特性的电阻随机存取存储器
公开(公告)号：WO2014110341A1
公开(公告)日：2014-07-17
申请号：PCT/US2014/010999
申请日：2014-01-10
申请人： INTERMOLECULAR, INC. , KABUSHIKI KAISHA TOSHIBA , SANDISK 3D LLC
发明人： NARDI, Federico , WANG, Yun
IPC分类号： G11C11/00
CPC分类号： G11C13/0007 , G11C13/0069 , G11C2013/0083 , G11C2213/12 , G11C2213/15 , G11C2213/52 , G11C2213/71 , H01L27/2463 , H01L27/2481 , H01L45/06 , H01L45/08 , H01L45/085 , H01L45/1233 , H01L45/145 , H01L45/146 , H01L45/147 , H01L45/149
摘要： Provided are resistive random access memory (ReRAM) cells forming arrays and methods of operating such cells and arrays. The ReRAM cells of the same array may have the same structure, such as have the same bottom electrodes, top electrodes, and resistive switching layers. Yet, these cells may be operated in a different manner. For example, some ReRAM cells may be restively switched using lower switching voltages than other cells. The cells may also have different data retention characteristics. These differences may be achieved by using different forming operations for different cells or, more specifically, flowing forming currents in different directions for different cells. The resulting conductive paths formed within the resistive switching layers are believed to switch at or near different electrode interfaces, i.e., within a so called switching zone. In some embodiments, a switching zone of a ReRAM cell may be changed even after the initial formation.
摘要翻译：提供形成阵列的电阻随机存取存储器（ReRAM）单元和操作这样的单元和阵列的方法。相同阵列的ReRAM单元可以具有相同的结构，例如具有相同的底部电极，顶部电极和电阻式开关层。然而，这些电池可以以不同的方式操作。例如，可以使用比其他单元更低的开关电压来重新切换一些ReRAM单元。细胞也可能具有不同的数据保留特征。这些差异可以通过对于不同的单元使用不同的成形操作来实现，或者更具体地，针对不同的单元流动形成不同方向的电流。形成在电阻开关层内的所得导电路径被认为在不同的电极接口处，即在所谓的开关区域内或附近切换。在一些实施例中，即使在初始形成之后，ReRAM单元的切换区也可能改变。

2. 发明申请

WO2014100804A1 MORPHOLOGY CONTROL OF ULTRA-THIN MeOx LAYER 审中-公开
标题翻译：超薄型MeOx层的形态学控制
公开(公告)号：WO2014100804A1
公开(公告)日：2014-06-26
申请号：PCT/US2013/077404
申请日：2013-12-23
申请人： KABUSHIKI KAISHA TOSHIBA , SANDISK 3D LLC , INTERMOLECULAR, INC.
发明人： NARDI, Federico , WANG, Yun
IPC分类号： H01L21/02 , H01L31/0216 , H01L31/18
CPC分类号： H01L45/06 , H01L27/2409 , H01L27/2436 , H01L27/2463 , H01L45/065 , H01L45/08 , H01L45/10 , H01L45/1233 , H01L45/1253 , H01L45/141 , H01L45/145 , H01L45/146 , H01L45/147 , H01L45/148 , H01L45/16 , H01L45/1616 , H01L51/0098
摘要： A nonvolatile memory device contains a resistive switching memory element with improved device switching performance and life and methods for forming the same. The nonvolatile memory device has a first layer on a substrate, a resistive switching layer on the first layer, and a second layer. The resistive switching layer is disposed between the first layer and the second layer and the resistive switching layer comprises a material having the same morphology as the top surface of the first layer. A method of forming a nonvolatile memory element in a ReRAM device includes forming a resistive switching layer on a first layer and forming a second layer, so that the resistive switching layer is disposed between the first layer and the second layer. The resistive switching layer comprises a material formed with the same morphology as the top surface of the first layer.
摘要翻译：非易失性存储器件包含具有改进的器件切换性能和寿命的电阻式开关存储器元件及其形成方法。非易失性存储器件在衬底上具有第一层，在第一层上具有电阻性开关层，以及第二层。电阻开关层设置在第一层和第二层之间，电阻开关层包括与第一层的顶表面相同形态的材料。在ReRAM器件中形成非易失性存储元件的方法包括在第一层上形成电阻式开关层并形成第二层，使得电阻式开关层位于第一层和第二层之间。电阻开关层包括与第一层的顶表面形成相同形态的材料。

3. 发明申请

WO2015100093A1 STACKED BI-LAYER AS THE LOW POWER SWITCHABLE RRAM 审中-公开
标题翻译：堆叠双层作为低功率可切换RRAM
公开(公告)号：WO2015100093A1
公开(公告)日：2015-07-02
申请号：PCT/US2014/070767
申请日：2014-12-17
申请人： INTERMOLECULAR, INC.
发明人： WANG, Yun , NARDI, Federico , WELING, Milind
IPC分类号： H01L29/02
CPC分类号： H01L45/1266 , H01L27/2409 , H01L27/2463 , H01L27/2481 , H01L45/08 , H01L45/12 , H01L45/1233 , H01L45/1246 , H01L45/1253 , H01L45/145 , H01L45/146 , H01L45/16 , H01L45/1625 , H01L45/1633
摘要： Provided are resistive random access memory (ReRAM) cells and methods of fabricating thereof. The resistive switching nonvolatile memory cells may include a first layer disposed. The first layer may be operable as a bottom electrode. The resistive switching nonvolatile memory cells may also include a second layer disposed over the first layer. The second layer may be operable as a resistive switching layer that is configured to switch between a first resistive state and a second resistive state. The resistive switching nonvolatile memory cells may include a third layer disposed over the second layer. The third layer may be operable as a resistive layer that is configured to determine, at least in part, an electrical resistivity of the resistive switching nonvolatile memory element. The third layer may include a semi-metallic material. The resistive switching nonvolatile memory cells may include a fourth layer that may be operable as a top electrode.
摘要翻译：提供了电阻随机存取存储器（ReRAM）单元及其制造方法。电阻式开关非易失性存储单元可以包括设置的第一层。第一层可以用作底部电极。电阻式开关非易失性存储单元还可以包括设置在第一层上的第二层。第二层可以用作电阻性开关层，其被配置为在第一电阻状态和第二电阻状态之间切换。电阻式开关非易失性存储单元可以包括设置在第二层上的第三层。第三层可以用作电阻层，其被配置为至少部分地确定电阻式开关非易失性存储元件的电阻率。第三层可以包括半金属材料。电阻式开关非易失性存储单元可以包括可用作顶部电极的第四层。

4. 发明申请

WO2015100066A1 SCHOTTKY BARRIERS FOR RESISTIVE RANDOM ACCESS MEMORY 审中-公开
标题翻译：电阻随机存取存储器的肖特基屏障
公开(公告)号：WO2015100066A1
公开(公告)日：2015-07-02
申请号：PCT/US2014/070514
申请日：2014-12-16
申请人： INTERMOLECULAR, INC.
发明人： NARDI, Federico , WANG, Yun
IPC分类号： G11C13/00 , G11C11/00 , H01L45/00
CPC分类号： H01L45/1253 , H01L27/2409 , H01L27/2481 , H01L45/08 , H01L45/1233 , H01L45/146 , H01L45/1616 , H01L45/1625
摘要： Provided are resistive random access memory (ReRAM) cells having Schottky barriers and methods of fabricating such ReRAM cells. Specifically, a ReRAM cell includes two Schottky barriers, one barrier limiting an electrical current through the variable resistance layer in one direction and the other barrier limiting a current in the opposite direction. This combination of the two Schottky barriers provides current compliance during set operations and limits undesirable current overshoots during reset operations. The Schottky barriers' heights are configured to match the resistive switching characteristics of the cell. Conductive layers of the ReRAM cells operable as electrodes may be used to form these Schottky barriers together with semiconductor layers. These semiconductor layers may be different components from a variable resistance layer and, in some embodiments, may be separated by intermediate conductive layers from the variable resistance layers.
摘要翻译：提供了具有肖特基势垒的电阻随机存取存储器（ReRAM）单元和制造这种ReRAM单元的方法。具体来说，ReRAM单元包括两个肖特基势垒，一个势垒限制了沿一个方向通过可变电阻层的电流，另一个势垒限制了相反方向上的电流。两个肖特基势垒的这种组合在设置操作期间提供电流兼容性，并在复位操作期间限制不期望的电流过冲。肖特基势垒的高度配置为匹配电池的电阻开关特性。可用作电极的ReRAM单元的导电层可以用于与半导体层一起形成这些肖特基势垒。这些半导体层可以是与可变电阻层不同的部件，并且在一些实施例中可以由可变电阻层的中间导电层分离。

5. 发明申请

WO2015095200A1 RESISTIVE SWITCHING SCHMITT TRIGGERS AND COMPARATORS 审中-公开
标题翻译：电阻开关SCHMITT TRIGGERS和COMPARATORS
公开(公告)号：WO2015095200A1
公开(公告)日：2015-06-25
申请号：PCT/US2014/070617
申请日：2014-12-16
申请人： INTERMOLECULAR, INC.
发明人： NARDI, Federico , WANG, Yun
IPC分类号： H03K3/037
CPC分类号： H03K3/02335 , H03K3/02337
摘要： A resistive switching element can be used in a nonvolatile digital Schmitt trigger circuit or a comparator circuit. The Schmitt trigger circuit can include a resistive switching circuit, and a reset circuit. The resistive switching circuit can provide a hysteresis behavior suitable for Schmitt trigger operation. The reset circuit can be operable to reset the resistive switching circuit to a high resistance state. The comparator circuit can include a resistive switching circuit, a reset circuit, and a threshold setting circuit. The resistive switching circuit can include a resistive switching element, and can be operable to provide a signal comparing an input voltage with the set or reset threshold voltage of the resistive switching element. The threshold setting circuit can be operable to modify the set or reset threshold of the resistive switching element, effectively changing the reference voltage for the comparator circuit.
摘要翻译：电阻式开关元件可用于非易失性数字施密特触发电路或比较器电路。施密特触发电路可以包括电阻开关电路和复位电路。电阻开关电路可以提供适用于施密特触发器操作的滞后特性。复位电路可以用于将电阻式开关电路复位到高电阻状态。比较器电路可以包括电阻开关电路，复位电路和阈值设置电路。电阻式开关电路可以包括电阻开关元件，并且可操作以提供将输入电压与电阻式开关元件的置位或复位阈值电压进行比较的信号。阈值设置电路可以用于修改电阻性开关元件的置位或复位阈值，从而有效地改变比较器电路的参考电压。

6. 发明申请

WO2016085665A1 ELECTRON BARRIER HEIGHT CONTROLLED INTERFACES OF RESISTIVE SWITCHING LAYERS IN RESISTIVE RANDOM ACCESS MEMORY CELLS 审中-公开
标题翻译：电阻式随机存取存储器电容栅极高度控制电阻开关层的界面
公开(公告)号：WO2016085665A1
公开(公告)日：2016-06-02
申请号：PCT/US2015/060368
申请日：2015-11-12
申请人： INTERMOLECULAR, INC.
发明人： WANG, Yun , NARDI, Federico
IPC分类号： H01L29/51
CPC分类号： H01L45/12 , H01L27/2463 , H01L27/2481 , H01L45/06 , H01L45/08 , H01L45/1233 , H01L45/145 , H01L45/146 , H01L45/148 , H01L45/1608 , H01L45/1625
摘要： Provided are resistive switching memory cells and method of forming such cells. A memory cell includes a resistive switching layer disposed between two buffer layers. The electron barrier height of the material used for each buffer layer is less than the electron barrier height of the material used for the resistive switching layer. Furthermore, the thickness of each buffer layer may be less than the thickness of the resistive switching layer. The buffer layers reduce diffusion between the resistive switching layer and electrodes. Furthermore, the buffer layers improve data retention and prevent unintentional resistive switching when a reading signal is applied to the memory cell. The reading signal uses a low voltage and most of the electron tunneling is blocked by the buffer layers during this operation. On the other hand, the buffer layers allow electrode tunneling at higher voltages used for forming and switching signals.
摘要翻译：提供了电阻式开关存储单元和形成这种单元的方法。存储单元包括设置在两个缓冲层之间的电阻式开关层。用于每个缓冲层的材料的电子势垒高度小于用于电阻式开关层的材料的电子势垒高度。此外，每个缓冲层的厚度可以小于电阻式开关层的厚度。缓冲层减少电阻式开关层和电极之间的扩散。此外，当读取信号被施加到存储器单元时，缓冲层改善数据保持并防止无意的电阻性切换。读取信号使用低电压，并且在该操作期间大部分电子隧道被缓冲层阻挡。另一方面，缓冲层允许用于形成和切换信号的较高电压下的电极隧穿。

7. 发明申请

WO2015006104A1 ALL AROUND ELECTRODE FOR NOVEL 3D RRAM APPLICATIONS 审中-公开
标题翻译：用于新型3D RRAM应用的所有环绕电极
公开(公告)号：WO2015006104A1
公开(公告)日：2015-01-15
申请号：PCT/US2014/045111
申请日：2014-07-01
申请人： INTERMOLECULAR, INC.
发明人： NARDI, Federico , BARABASH, Sergey , WANG, Yun
IPC分类号： G11C13/02
CPC分类号： G11C13/004 , G11C13/0007 , G11C13/003 , G11C2213/52 , H01L45/08 , H01L45/1206 , H01L45/146 , H01L45/1675
摘要： A resistive switching memory device can include three or more electrodes interfacing a switching layer, including a top electrode, a bottom electrode, and a side electrode. The top and bottom electrodes can be used for forming conductive filaments and for reading the memory device. The side electrode can be used to control the resistance state of the switching layer.
摘要翻译：电阻式开关存储器件可以包括与包括顶电极，底电极和侧电极在内的开关层接口的三个或更多个电极。顶部和底部电极可用于形成导电细丝并用于读取存储器件。侧电极可用于控制开关层的电阻状态。

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