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1. 发明申请

WO2007004070A1 SHORT CHANNEL PROGRESSIVE ADDITION LENSES 审中-公开
标题翻译：短途通道渐进镜片
公开(公告)号：WO2007004070A1
公开(公告)日：2007-01-11
申请号：PCT/IB2006/002481
申请日：2006-06-19
申请人： ESSILOR INTERNATIONAL (COMPAGNIE GENERALE D'OPTIQUE) , GERLIGAND, Pierre , WOOLEY, Benjamin , SASTRY, Shyamy , WANG, Jing
发明人： GERLIGAND, Pierre , WOOLEY, Benjamin , SASTRY, Shyamy , WANG, Jing
IPC分类号： G02C7/02
CPC分类号： G02C7/063 , G02C7/028 , G02C7/061
摘要： Designing a progressive addition lens includes using scaled surface powers and/or cylinder powers of base curves to determine a set of power targets, and using these targets to determine a lens design.
摘要翻译：设计渐进折射透镜包括使用基准曲线的缩放表面光焦度和/或圆柱光焦度来确定一组光焦度目标，并使用这些目标来确定透镜设计。

2. 发明申请

WO2007004071A2 METHOD FOR PROVIDING DUAL SURFACE PROGRESSIVE ADDITION LENS SERIES 审中-公开
标题翻译：提供双面表面增强镜片系列的方法
公开(公告)号：WO2007004071A2
公开(公告)日：2007-01-11
申请号：PCT/IB2006/002487
申请日：2006-06-19
申请人： ESSILOR INTERNATIONAL (COMPAGNIE GENERALE D' OPTIQUE) , WOOLEY, Benjamin , GERLIGAND, Pierre , WANG, Jing , SASTRY, Shyamy , MERRITT, Jim
发明人： WOOLEY, Benjamin , GERLIGAND, Pierre , WANG, Jing , SASTRY, Shyamy , MERRITT, Jim
IPC分类号： G02C7/02
CPC分类号： G02C7/024 , G02C7/028 , G02C7/061 , G02C7/063 , G02C7/068 , G02C2202/08
摘要： Designing spectacle lens blanks for a dual-surface progressive addition lens (PAL) comprising determining a prescription range from a first set of first designs to produce a second set of first designs satisfying the prescription range, determining a common surface using the second set of first designs, and using the common surface to produce a set of second designs satisfying the prescription range.
摘要翻译：设计用于双表面渐进折射透镜（PAL）的眼镜镜片坯料，包括从第一组第一设计确定处方范围以产生满足处方范围的第二组第一设计，使用第二组第一组设计和使用公共表面以产生满足处方范围的一组第二设计。

3. 发明申请

WO2021141758A1 UNIVERSAL VACCINES AGAINST IMMUNOGENS OF PATHOGENIC ORGANISMS THAT PROVIDE ORGANISM-SPECIFIC AND CROSS-GROUP PROTECTION 审中-公开
公开(公告)号：WO2021141758A1
公开(公告)日：2021-07-15
申请号：PCT/US2020/066059
申请日：2020-12-18
申请人： XU, Jian, Qing , ZHANG, Xiao, Yan , WANG, Jing , ZHU, Ling, Yan , LUBIT, Beverly, W.
发明人： XU, Jian, Qing , ZHANG, Xiao, Yan , WANG, Jing , ZHU, Ling, Yan , LUBIT, Beverly, W.
IPC分类号： A61K39/12 , A61K39/145 , C12N5/0783 , C07K7/06 , C12N15/86 , A61P31/16 , A61K2039/543 , A61K2039/545 , A61K2039/572 , C07K14/005 , C12N2710/10043 , C12N2710/10343 , C12N2710/24143 , C12N2760/16122 , C12N2760/16134 , C12N2795/10343 , C12N2800/00 , C12N7/00
摘要： The present disclosure provides, in part, a priming and boosting vector-based platform to develop vaccines against pathogensthat is tailored to elicit a broad T cell response targeting conserved viral epitopes. The universal vaccines are prepared against an immunogen of an infectious pathogenic organism selected from a virus, a bacteria, a fungus or a protozoan comprising at least one ribonucleic acid (RNA) polynucleotide comprising an open reading frame encoding at least one polypeptide antigen or an immunogenic fragment thereof, wherein the polypeptide antigen, or the immunogenic fragment thereof, comprises a conserved internal protein that is enriched in CD8+ T cell recognition antigens. The effectiveness of the priming and boosting platform is tested in a humanized mouse model comprising a fully functional human immune system.

4. 发明申请

WO2013117028A1 SCHOTTKY BARRIER FIELD EFFECT TRANSISTOR WITH CARBON-CONTAINING INSULATION LAYER AND METHOD FOR FABRICATING THE SAME 审中-公开
标题翻译：具有含碳绝缘层的肖特基栅栏场效应晶体管及其制造方法
公开(公告)号：WO2013117028A1
公开(公告)日：2013-08-15
申请号：PCT/CN2012/072838
申请日：2012-03-22
申请人： TSINGHUA UNIVERSITY , WANG, Wei , WANG, Jing , ZHAO, Mei , LIANG, Renrong
发明人： WANG, Wei , WANG, Jing , ZHAO, Mei , LIANG, Renrong
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/66477 , H01L29/0895 , H01L29/66636 , H01L29/66643 , H01L29/78 , H01L29/7839
摘要： A Schottky barrier field effect transistor with a carbon-containing insulation layer and a method for fabricating the same are provided. The Schottky barrier field effect transistor comprises: a substrate (1); a gate stack (2) formed on the substrate (1); a metal source (4) and a metal drain (5) formed in the substrate (1) on both sides of the gate stack (2) respectively; and the carbon-containing insulation layer (3) formed between the substrate (1) and the metal source (4) and between the substrate (1) and the metal drain (5) respectively, in which a material of the carbon-containing insulation layer (3) is organic molecular chains containing an alkyl group.
摘要翻译：提供了具有含碳绝缘层的肖特基势垒场效应晶体管及其制造方法。肖特基势垒场效应晶体管包括：衬底（1）; 形成在所述基板（1）上的栅极叠层（2）; 金属源（4）和形成在所述栅极堆叠（2）的两侧的所述基板（1）中的金属排出口（5）和形成在基板（1）和金属源（4）之间以及基板（1）和金属排出部（5）之间的含碳绝缘层（3），其中含碳绝缘材料层（3）是含有烷基的有机分子链。

5. 发明申请

WO2013056388A1 AN IMPROVED METHOD AND APPARATUS FOR ADAPTIVE MULTI RATE CODEC 审中-公开
标题翻译：一种改进的自适应多速率编解码器的方法和装置
公开(公告)号：WO2013056388A1
公开(公告)日：2013-04-25
申请号：PCT/CN2011/001730
申请日：2011-10-18
申请人： TELEFONAKTIEBOLAGET L M ERICSSON (PUBL) , BRUHN, Stefan , KUANG, Jingming , WANG, Jing , ZHANG, Chunling , ZHAO, Shenghui
发明人： BRUHN, Stefan , KUANG, Jingming , WANG, Jing , ZHANG, Chunling , ZHAO, Shenghui
IPC分类号： G10L19/04
CPC分类号： G10L19/06 , G10L19/07 , G10L25/12
摘要： There is provided an apparatus and method for encoding a speech signal. The encoding comprises: receiving a plurality of current samples of the speech signals; extrapolating a plurality of look-ahead samples from the current samples; and performing linear prediction analysis using the current samples and the extrapolated look-ahead samples.
摘要翻译：提供了一种用于对语音信号进行编码的装置和方法。所述编码包括：接收所述语音信号的多个当前样本; 从当前样本外推多个先行样本; 并使用当前样本和外推先验样本进行线性预测分析。

6. 发明申请

WO2013006478A1 VERTICALLY PHASE-SEPARATING SEMICONDUCTING ORGANIC MATERIAL LAYERS 审中-公开
标题翻译：垂直相分离半导体有机材料层
公开(公告)号：WO2013006478A1
公开(公告)日：2013-01-10
申请号：PCT/US2012/045066
申请日：2012-06-29
申请人： PLEXTRONICS, INC. , BROWN, Christopher T. , CHOPRA, Neetu , SESHADRI, Venkataramanan , WANG, Jing
发明人： BROWN, Christopher T. , CHOPRA, Neetu , SESHADRI, Venkataramanan , WANG, Jing
IPC分类号： C08L65/00 , H01B1/12
CPC分类号： H01L51/0003 , C08G2261/1424 , C08G2261/3162 , C08G2261/3223 , C08G2261/51 , C08K5/18 , C08L65/00 , C08L2205/02 , H01L51/0059 , H01L51/5056 , H01L51/5064 , H01L51/5088 , H01L2251/552 , Y02E10/549
摘要： Improved OLED devices and methods of making the same using vertical phase separation to simplify processing. Vertically phase separated material can include at least one lower first layer disposed on the electrode, and at least one upper second layer different from the first layer and disposed away from the electrode or optionally on one layer comprising at least one semiconducting organic material. The first layer can be enriched with at least one first semiconducting organic material (SOM 1) and the second layer can be enriched with at least one second semiconducting organic material (SOM 2) different from the SOM 1. The ink composition can be adapted so that the film vertically phase separates into the first and second layers. Compositions and devices are also embodied herein.
摘要翻译：改进的OLED器件和使用垂直相分离的方法进行简化处理。垂直相分离的材料可以包括设置在电极上的至少一个下部第一层和与第一层不同的至少一个上部第二层，并且远离电极或者任选地包括至少一个半导体有机材料的一个层。第一层可以富含至少一种第一半导体有机材料（SOM 1），第二层可以富含至少一种与SOM 1不同的第二半导体有机材料（SOM 2）。该油墨组合物可以适应膜垂直相分离成第一层和第二层。组合物和装置也在本文中体现。

7. 发明申请

WO2012170614A3 DNA METHYLATION MARKERS IN NON-SMALL CELL LUNG CANCER AND METHODS OF USING THE SAME 审中-公开
公开(公告)号：WO2012170614A3
公开(公告)日：2012-12-13
申请号：PCT/US2012/041228
申请日：2012-06-07
申请人： BOARD OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEM , LIN, Steven, H. , HEYMACH, John , WANG, Jing , MINNA, John , GIRARD, Luc
发明人： LIN, Steven, H. , HEYMACH, John , WANG, Jing , MINNA, John , GIRARD, Luc
IPC分类号： C12Q1/68 , G01N33/574
摘要： Provided herein are unique sets of genes that are regulated by methylation in non-small cell lung cancer ("NSCLC") that are useful as a biomarker or in an assay for determining, diagnosing or subtyping lung cancer and/or the outcome of certain drug therapies.

8. 发明申请

WO2012163048A1 SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME 审中-公开
标题翻译：半导体结构及其形成方法
公开(公告)号：WO2012163048A1
公开(公告)日：2012-12-06
申请号：PCT/CN2011/082111
申请日：2011-11-11
申请人： TSINGHUA UNIVERSITY , WANG, Jing , GUO, Lei
发明人： WANG, Jing , GUO, Lei
IPC分类号： H01L29/06 , H01L27/088 , H01L21/8234
CPC分类号： H01L29/7842 , H01L21/02532 , H01L21/0257 , H01L21/02587 , H01L21/02664 , H01L21/26506 , H01L21/3247 , H01L21/764 , H01L21/823412 , H01L21/823418 , H01L21/823481 , H01L29/0653 , H01L29/0665 , H01L29/0688 , H01L29/1054 , H01L29/151 , H01L29/161 , H01L29/165 , H01L29/66568 , H01L29/78
摘要： A semiconductor structure and a method for forming the same are provided. The semiconductor structure comprises: a substrate (1100); a plurality of convex structures (1200) formed on the substrate (1100), in which every two adjacent convex structures (1200) are separated by a cavity in a predetermined pattern, and the cavity between every two adjacent convex structures (1200) is less than 50nm in width; a plurality of floated films (1300), in which the floated films (1300) are partitioned into a plurality of sets, a channel layer is formed on a convex structure (1200) between the floated films (1300) in each set, a source region and a drain region are formed on two sides of the channel layer respectively, and the cavity between the every two adjacent convex structures (1200) is filled with an insulating material (2000); and a gate stack (1400) formed on each channel layer.
摘要翻译：提供半导体结构及其形成方法。半导体结构包括：衬底（1100）; 形成在所述基板（1100）上的多个凸起结构（1200），其中每两个相邻凸起结构（1200）以预定图案被空腔隔开，并且每两个相邻的凸起结构（1200）之间的空腔较小宽50nm; 多个浮动膜（1300），其中浮动膜（1300）被分成多个组，在每组中的浮动膜（1300）之间的凸形结构（1200）上形成沟道层，源区域和漏极区域分别形成在沟道层的两侧，并且每两个相邻凸起结构（1200）之间的空腔填充有绝缘材料（2000）; 和形成在每个沟道层上的栅叠层（1400）。

9. 发明申请

WO2012119419A1 STRAINED GE-ON-INSULATOR STRUCTURE AND METHOD FOR FORMING THE SAME 审中-公开
标题翻译：应变导电绝缘体结构及其形成方法
公开(公告)号：WO2012119419A1
公开(公告)日：2012-09-13
申请号：PCT/CN2011/078948
申请日：2011-08-25
申请人： TSINGHUA UNIVERSITY , WANG, Jing , XU, Jun , GUO, Lei
发明人： WANG, Jing , XU, Jun , GUO, Lei
IPC分类号： H01L21/336 , H01L21/20
CPC分类号： H01L21/76283 , H01L21/76251 , H01L29/7843 , H01L29/7846 , H01L29/7848 , H01L29/78684
摘要： A strained Ge-on-insulator structure is provided, comprising: a silicon substrate (1100), in which an oxide insulating layer (1200) is formed on a surface of the silicon substrate (1100); a Ge layer (1300) formed on the oxide insulating layer (1200), in which a first passivation layer (1400) is formed between the Ge layer (1300) and the oxide insulating layer (1200); a gate stack (1600, 1700) formed on the Ge layer (1300); and a channel region formed below the gate stack (1600, 1700), and a source (1800) and a drain (1800) formed on sides of the channel region, in which the source (1800) and the drain (1800) are a Si x Ge -x :C source and a Si x Ge -x :C drain respectively to produce a tensile 10 strain in the channel region, in which x is within a range from 0 to 1 and a content of C is within a range from 0 to 7.5%. Further, a method for forming the strained Ge-on-insulator structure is also provided.
摘要翻译：提供了一种应变绝缘体上的结构，包括：在硅衬底（1100）的表面上形成氧化物绝缘层（1200）的硅衬底（1100）; 形成在氧化物绝缘层（1200）上的Ge层（1300），其中在Ge层（1300）和氧化物绝缘层（1200）之间形成第一钝化层（1400）; 形成在所述Ge层（1300）上的栅叠层（1600,1700）; 以及形成在所述栅极堆叠（1600,1700）下面的沟道区域，以及形成在所述沟道区域的侧面上的源极（1800）和漏极（1800），所述源极（1800）和所述漏极（1800） Si x Ge-X：C源和Si x Ge-X：C漏极，以在沟道区域中产生拉伸10应变，其中x在0至1的范围内，并且C的含量在范围内从0％到7.5％。此外，还提供了用于形成应变的绝缘体上Ge的结构的方法。

10. 发明申请

WO2012116528A1 TUNNELING FIELD EFFECT TRANSISTOR AND METHOD FOR FORMING THE SAME 审中-公开
标题翻译：隧道场效应晶体管及其形成方法
公开(公告)号：WO2012116528A1
公开(公告)日：2012-09-07
申请号：PCT/CN2011/076340
申请日：2011-06-24
申请人： TSINGHUA UNIVERSITY , LIANG, Renrong , CUI, Ning , WANG, Jing , XU, Jun
发明人： LIANG, Renrong , CUI, Ning , WANG, Jing , XU, Jun
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L21/28105 , H01L21/26586 , H01L29/4966 , H01L29/66659 , H01L29/7391
摘要： The present disclosure provides a TFET, which comprises: a substrate (1100); a channel region (1300) formed in the substrate (1100), and a source region (1500) and a drain region (1400) formed on two sides of the channel region (1300); a gate stack (1600) formed on the channel region (1300), wherein the gate stack (1600) comprises: a gate dielectric layer (1630), and at least a first gate electrode (1610) and a second gate electrode (1620) distributed in a direction from the source region (1500) to the drain region (1400) and formed on the gate dielectric layer (1630), and the first gate electrode (1610) and the second gate electrode (1620) have different work functions; and a first side wall (1910) and a second side wall (1920) formed on a side of the first gate electrode (1610) and on a side of the second gate electrode (1620) respectively.
摘要翻译：本公开提供了一种TFET，其包括：衬底（1100）; 形成在所述基板（1100）中的沟道区域（1300），以及形成在所述沟道区域（1300）的两侧的源极区域（1500）和漏极区域（1400）。形成在所述沟道区域（1300）上的栅极叠层（1600），其中所述栅极堆叠（1600）包括：栅极介电层（1630），以及至少第一栅电极（1610）和第二栅极电极（1620）分布在从源极区域（1500）到漏极区域（1400）的方向上并且形成在栅极介电层（1630）上，并且第一栅极电极（1610）和第二栅极电极（1620）具有不同的功函数; 以及分别形成在第一栅电极（1610）侧和第二栅电极（1620）一侧的第一侧壁（1910）和第二侧壁（1920）。

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