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1. 发明申请

WO2007132456A2 MEMORY DEVICE WITH ADAPTIVE CAPACITY 审中-公开
标题翻译：具有适应能力的存储器件
公开(公告)号：WO2007132456A2
公开(公告)日：2007-11-22
申请号：PCT/IL2007/000579
申请日：2007-05-10
申请人： ANOBIT TECHNOLOGIES LTD. , SHALVI, Ofir , SOKOLOV, Dotan , MAISLOS, Ariel , COHEN, Zeev , GURGI, Eyal , SEMO, Gil
发明人： SHALVI, Ofir , SOKOLOV, Dotan , MAISLOS, Ariel , COHEN, Zeev , GURGI, Eyal , SEMO, Gil
IPC分类号： H04N7/14
CPC分类号： G11C16/349 , G06F2212/7205 , G06F2212/7206 , G11C11/56 , G11C11/5607 , G11C11/5621 , G11C11/5628 , G11C11/5642 , G11C11/565 , G11C11/5657 , G11C11/5671 , G11C11/5678 , G11C27/005 , G11C2211/5621 , G11C2211/5641
摘要： A method for data storage in a memory (28) that includes a plurality of analog memory cells (32) includes estimating respective achievable storage capacities of the analog memory cells. The memory cells are assigned respective storage configurations defining quantities of data to be stored in the memory cells based on the estimated achievable capacities. The data is stored in the memory cells in accordance with the respective assigned storage configurations. The achievable storage capacities of the analog memory cells are re-estimated after the memory has been installed in a host system and used for storing the data in the host system. The storage configurations are modified responsively to the re-estimated achievable capacities.
摘要翻译：一种用于在包括多个模拟存储器单元（32）的存储器（28）中的数据存储的方法包括估计模拟存储器单元的各个可实现的存储容量。根据估计的可实现的容量，为存储器单元分配相应的存储配置，其定义要存储在存储器单元中的数据量。数据根据相应的分配的存储配置存储在存储器单元中。在存储器已经安装在主机系统中并用于在主机系统中存储数据之后，重新估计模拟存储器单元的可实现的存储容量。存储配置根据重新估计的可实现容量进行修改。

2. 发明申请

WO2008111058A3 ADAPTIVE ESTIMATION OF MEMORY CELL READ THRESHOLDS 审中-公开
公开(公告)号：WO2008111058A3
公开(公告)日：2008-09-18
申请号：PCT/IL2008/000329
申请日：2008-03-11
申请人： ANOBIT TECHNOLOGIES LTD. , SOMMER, Naftali , SHALVI, Ofir , PERLMUTTER, Uri , SOKOLOV, Dotan , GOLOV, Oren , GURGI, Eyal , ANHOLT, Micha
发明人： SOMMER, Naftali , SHALVI, Ofir , PERLMUTTER, Uri , SOKOLOV, Dotan , GOLOV, Oren , GURGI, Eyal , ANHOLT, Micha
IPC分类号： G06F12/00
摘要： A method for operating a memory (28) that includes a plurality of analog memory cells (32) includes storing data in the memory by writing first storage values to the cells. Second storage values are read from the cells, and a Cumulative Distribution Function (CDF) of the second storage values is estimated. The estimated CDF is processed so as to compute one or more thresholds. A memory access operation is performed on the cells using the one or more thresholds.

3. 发明申请

WO2007132453A3 DISTORTION ESTIMATION AND CANCELLATION IN MEMORY DEVICES 审中-公开
公开(公告)号：WO2007132453A3
公开(公告)日：2007-11-22
申请号：PCT/IL2007/000576
申请日：2007-05-10
申请人： ANOBIT TECHNOLOGIES LTD. , SHALVI, Ofir , SOMMER, Naftali , GURGI, Eyal , MAISLOS, Ariel
发明人： SHALVI, Ofir , SOMMER, Naftali , GURGI, Eyal , MAISLOS, Ariel
IPC分类号： G11C29/00 , H03M13/00 , G11C16/04
摘要： A method for operating a memory (28) includes storing data in a group of analog memory cells (32) of the memory as respective first voltage levels. After storing the data, second voltage levels are read from the respective analog memory cells. The second voltage levels are affected by cross-coupling interference causing the second voltage levels to differ from the respective first voltage levels. Cross-coupling coefficients, which quantify the cross-coupling interference among the analog memory cells, are estimated by processing the second voltage levels. The data stored in the group of analog memory cells is reconstructed from the read second voltage levels using the estimated cross-coupling coefficients.

4. 发明申请

WO2008026203A2 ESTIMATION OF NON-LINEAR DISTORTION IN MEMORY DEVICES 审中-公开
标题翻译：记忆设备中非线性失真的估计
公开(公告)号：WO2008026203A2
公开(公告)日：2008-03-06
申请号：PCT/IL2007/001059
申请日：2007-08-27
申请人： ANOBIT TECHNOLOGIES , SHALVI, Ofir , SOMMER, Naftali , GURGI, Eyal , GOLOV, Oren , SOKOLOV, Dotan
发明人： SHALVI, Ofir , SOMMER, Naftali , GURGI, Eyal , GOLOV, Oren , SOKOLOV, Dotan
IPC分类号： G06F17/40
CPC分类号： G11C11/5621 , G11C16/3418 , G11C27/005
摘要： A method for operating a memory (24) includes storing data in analog memory cells (32) of the memory by writing respective analog values to the analog memory cells. A set of the analog memory cells is identified, including an interfered cell having a distortion that is statistically correlated with the respective analog values of the analog memory cells in the set. A mapping is determined between combinations of possible analog values of the analog memory cells in the set and statistical characteristics of composite distortion levels present in the interfered memory cell. The mapping is applied so as to compensate for the distortion in the interfered memory cell.
摘要翻译：用于操作存储器（24）的方法包括通过将相应的模拟值写入模拟存储器单元来将数据存储在存储器的模拟存储器单元（32）中。识别一组模拟存储器单元，包括具有与组中的模拟存储器单元的相应模拟值统计相关的失真的干扰单元。在存在于受干扰存储器单元中的复合失真级的集合和统计特性中的模拟存储器单元的可能模拟值的组合之间确定映射。应用映射以补偿受干扰的存储单元中的失真。

5. 发明申请

WO2009037691A2 PROGRAMMING ORDERS FOR REDUCING DISTORTION IN ARRAYS OF MULTI-LEVEL ANALOG MEMORY CELLS 审中-公开
标题翻译：用于减少多级模拟记忆细胞阵列失真的编程方式
公开(公告)号：WO2009037691A2
公开(公告)日：2009-03-26
申请号：PCT/IL2008/001188
申请日：2008-09-03
申请人： ANOBIT TECHNOLOGIES , SHALVI, Ofir , GURGI, Eyal
发明人： SHALVI, Ofir , GURGI, Eyal
IPC分类号： G11C16/04
CPC分类号： G11C16/10 , G11C11/5628 , G11C16/3418 , G11C16/3427 , G11C27/005 , G11C2211/5648
摘要： A method for data storage includes predefining an order of programming a plurality of analog memory cells (32) that are arranged in rows (68). The order specifies that for a given row having neighboring rows on first and second sides, the memory cells in the given row are programmed only while the memory cells in the neighboring rows on at least one of the sides are in an erased state, and that the memory cells in the given row are programmed to assume a highest programming level, which corresponds to a largest analog value among the programming levels of the cells, only after programming all the memory cells in the given row to assume the programming levels other than the highest level. Data is stored in the memory cells by programming the memory cells in accordance with the predefined order.
摘要翻译：一种用于数据存储的方法包括预先定义排列成行（68）的多个模拟存储单元（32）的编程顺序。该顺序指定对于在第一和第二侧具有相邻行的给定行，只有当至少一个侧面上的相邻行中的存储器单元处于擦除状态时，给定行中的存储器单元被编程，并且该给定行中的存储器单元被编程为假设最高编程电平，其对应于单元的编程电平中的最大模拟值，只有在编程给定行中的所有存储器单元之后才采用除最高水平。根据预定义的顺序对存储器单元进行编程，将数据存储在存储器单元中。

6. 发明申请

WO2013028430A2 MEMORY DEVICE WITH REDUCED SENSE TIME READOUT 审中-公开
标题翻译：具有减少感应时间读数的存储器件
公开(公告)号：WO2013028430A2
公开(公告)日：2013-02-28
申请号：PCT/US2012/050945
申请日：2012-08-15
申请人： APPLE INC. , MEIR, Avraham , SOMMER, Naftali , GURGI, Eyal
发明人： MEIR, Avraham , SOMMER, Naftali , GURGI, Eyal
IPC分类号： G11C7/06 , G11C11/4091 , G11C11/56 , G11C16/26
CPC分类号： G06F11/1008 , G11C7/06 , G11C8/08 , G11C8/12 , G11C11/4091 , G11C11/5642 , G11C13/004 , G11C13/0061 , G11C16/26 , G11C16/349 , G11C27/005 , G11C29/00 , G11C29/021 , G11C29/028 , G11C2211/5641
摘要： A method for data storage includes providing at least first and second readout configurations for reading storage values from analog memory cells, such that the first readout configuration reads the storage values with a first sense time and the second readout configuration reads the storage values with a second sense time, shorter than the first sense time. A condition is evaluated with respect to a read operation that is to be performed over a group of the memory cells. One of the first and second readout configurations is selected responsively to the evaluated condition. The storage values are read from the group of the memory cells using the selected readout configuration.
摘要翻译：一种用于数据存储的方法包括提供用于从模拟存储器单元读取存储值的至少第一和第二读出配置，使得第一读出配置以第一感测时间读取存储值，并且第二读出配置用第二读出配置读取存储值感觉时间短于第一感觉时间。针对要在一组存储器单元上执行的读取操作来评估条件。响应于评估条件选择第一和第二读出配置之一。使用选择的读出配置从存储器单元的组中读取存储值。

7. 发明申请

WO2012156889A1 SPARSE PROGRAMMING OF ANALOG MEMORY CELLS 审中-公开
标题翻译：模拟记忆细胞的稀疏编程
公开(公告)号：WO2012156889A1
公开(公告)日：2012-11-22
申请号：PCT/IB2012/052375
申请日：2012-05-13
申请人： APPLE INC. , GURGI, Eyal
发明人： GURGI, Eyal
IPC分类号： G11C16/04 , G06F12/02
CPC分类号： G11C11/56 , G11C11/5628 , G11C16/3418 , G11C16/3427 , G11C27/005 , G11C2211/5641 , G11C2211/5648
摘要： A method for data storage in a memory (24) including an array (28) of analog memory cells (32), includes selecting a group of the memory cells such that each memory cell in the group has one or more neighbor memory cells in the array that are excluded from the group. Data is stored in the group of the memory cells while excluding the neighbor memory cells from programming as long as the data is stored in the group of the memory cells.
摘要翻译：一种用于在包括模拟存储器单元（32）的阵列（28）的存储器（24）中的数据存储的方法，包括：选择一组存储器单元，使得组中的每个存储器单元具有一个或多个相邻存储器单元从组中排除的数组。只要数据存储在存储单元的组中，数据就被存储在存储单元的组中，同时排除相邻存储单元的编程。

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