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1. 发明申请

WO2013043968A2 POWER-OPTIMIZED DECODING OF LINEAR CODES 审中-公开
标题翻译：线性码的功率优化解码
公开(公告)号：WO2013043968A2
公开(公告)日：2013-03-28
申请号：PCT/US2012/056486
申请日：2012-09-21
申请人： APPLE INC. , ANHOLT, Micha , SOMMER, Naftali
发明人： ANHOLT, Micha , SOMMER, Naftali
IPC分类号： H03M13/00 , G06F11/08
CPC分类号： H04L1/004 , H03M13/1111 , H03M13/3776 , H03M13/6502 , H03M13/6577
摘要： A method includes accepting an input code word, which was produced by encoding data with an Error Correction Code (ECC), for decoding by a hardware-implemented ECC decoder. The input code word is pre-processed to produce a pre-processed code word, such that a first number of bit transitions that occur in the hardware-implemented ECC decoder while decoding the pre-processed code word is smaller than a second number of the bit transitions that would occur in the ECC decoder in decoding the input code word. The pre-processed code word is decoded using the ECC decoder, and the data is recovered from the decoded pre-processed code word.
摘要翻译：一种方法包括接受通过用错误校正码（ECC）编码数据产生的输入码字，用于由硬件实现的ECC解码器进行解码。输入代码字被预处理以产生预处理代码字，使得在解码预处理代码字时在硬件实现的ECC解码器中发生的第一数量的位转换小于第二数目的在ECC解码器中将在对输入码字进行解码时发生的位转换。使用ECC解码器解码预处理码字，并且从解码的预处理码字中恢复数据。

2. 发明申请

WO2013028430A2 MEMORY DEVICE WITH REDUCED SENSE TIME READOUT 审中-公开
标题翻译：具有减少感应时间读数的存储器件
公开(公告)号：WO2013028430A2
公开(公告)日：2013-02-28
申请号：PCT/US2012/050945
申请日：2012-08-15
申请人： APPLE INC. , MEIR, Avraham , SOMMER, Naftali , GURGI, Eyal
发明人： MEIR, Avraham , SOMMER, Naftali , GURGI, Eyal
IPC分类号： G11C7/06 , G11C11/4091 , G11C11/56 , G11C16/26
CPC分类号： G06F11/1008 , G11C7/06 , G11C8/08 , G11C8/12 , G11C11/4091 , G11C11/5642 , G11C13/004 , G11C13/0061 , G11C16/26 , G11C16/349 , G11C27/005 , G11C29/00 , G11C29/021 , G11C29/028 , G11C2211/5641
摘要： A method for data storage includes providing at least first and second readout configurations for reading storage values from analog memory cells, such that the first readout configuration reads the storage values with a first sense time and the second readout configuration reads the storage values with a second sense time, shorter than the first sense time. A condition is evaluated with respect to a read operation that is to be performed over a group of the memory cells. One of the first and second readout configurations is selected responsively to the evaluated condition. The storage values are read from the group of the memory cells using the selected readout configuration.
摘要翻译：一种用于数据存储的方法包括提供用于从模拟存储器单元读取存储值的至少第一和第二读出配置，使得第一读出配置以第一感测时间读取存储值，并且第二读出配置用第二读出配置读取存储值感觉时间短于第一感觉时间。针对要在一组存储器单元上执行的读取操作来评估条件。响应于评估条件选择第一和第二读出配置之一。使用选择的读出配置从存储器单元的组中读取存储值。

3. 发明申请

WO2008139441A3 MEMORY DEVICE WITH INTERNAL SIGNAL PROCESSING UNIT 审中-公开
标题翻译：具有内部信号处理单元的存储器件
公开(公告)号：WO2008139441A3
公开(公告)日：2010-02-25
申请号：PCT/IL2008000519
申请日：2008-04-16
申请人： ANOBIT TECHNOLOGIES LTD , SOKOLOV DOTAN , SOMMER NAFTALI , SHALVI OFER , PERLMUTTER URI
发明人： SOKOLOV DOTAN , SOMMER NAFTALI , SHALVI OFER , PERLMUTTER URI
IPC分类号： G11C11/34
CPC分类号： G06F11/1072 , G06F11/1044 , G06F11/1048 , G06F11/1076 , G06F12/00 , G11C11/56 , G11C29/50004 , G11C29/52 , G11C2029/5004
摘要： A method for operating a memory (36) includes storing data in a plurality of analog memory cells (40) that are fabricated on a first semiconductor die by writing input storage values to a group of the analog memory cells After storing the data, multiple output storage values are read from each of the analog memory cells in the group using respective, different threshold sets of read thresholds, thus providing multiple output sets of the output storage values corresponding respectively to the threshold sets The multiple output sets of the output storage values are preprocessed by circuitry (48) that is fabricated on the first semiconductor die, to produce preprocessed data Preprocessed data is provided to a memory controller (28), which is fabricated on a second semiconductor die that is different from the first semiconductor die, so as to enable the memory controller to reconstruct the data responsively to the preprocessed data
摘要翻译：一种用于操作存储器（36）的方法包括：通过将输入存储值写入一组模拟存储器单元，将数据存储在制造在第一半导体管芯上的多个模拟存储器单元（40）中。存储数据之后，多个输出使用相应的不同阈值读取阈值从组中的每个模拟存储器单元读取存储值，从而提供分别对应于阈值集合的输出存储值的多个输出组。输出存储值的多个输出集合由制造在第一半导体管芯上的电路（48）预处理，以产生预处理的数据。预处理数据被提供给存储器控制器（28），存储器控制器（28）制造在与第一半导体管芯不同的第二半导体管芯上，以便以使存储器控制器能够响应于预处理的数据来重建数据

4. 发明申请

WO2008053473A3 MEMORY CELL READOUT USING SUCCESSIVE APPROXIMATION 审中-公开
标题翻译：使用成功的近似记忆单元读取
公开(公告)号：WO2008053473A3
公开(公告)日：2009-05-14
申请号：PCT/IL2007001316
申请日：2007-10-30
申请人： ANOBIT TECHNOLOGIES LTD , SHALVI OFIR , SOMMER NAFTALI
发明人： SHALVI OFIR , SOMMER NAFTALI
IPC分类号： G11C27/00
CPC分类号： G11C16/26 , G11C7/16 , G11C11/5642 , G11C16/24 , G11C27/005
摘要： A method for operating a memory (20) includes storing analog values in an array of analog memory cells (22), so that each of the analog memory cells holds an analog value corresponding to at least first and second respective bits. A first indication of the analog value stored in a given analog memory cell is obtained using a first set of sampling parameters. A second indication of the analog value stored in the given analog memory cell is obtained using a second set of sampling parameters, which is dependent upon the first indication. The first and second respective bits are read out from the given analog memory cell responsively to the first and second indications.
摘要翻译：一种用于操作存储器（20）的方法包括将模拟值存储在模拟存储器单元（22）的阵列中，使得每个模拟存储器单元保持与至少第一和第二相应位对应的模拟值。使用第一组采样参数获得存储在给定模拟存储器单元中的模拟值的第一指示。使用取决于第一指示的第二组采样参数来获得存储在给定模拟存储器单元中的模拟值的第二指示。响应于第一和第二指示，从给定的模拟存储单元读出第一和第二各自的位。

5. 发明申请

WO2007132458A3 MEMORY DEVICE PROGRAMMING USING COMBINED SHAPING AND LINEAR SPREADING 审中-公开
标题翻译：使用组合形状和线性扩展的存储器件编程
公开(公告)号：WO2007132458A3
公开(公告)日：2009-04-09
申请号：PCT/IL2007000581
申请日：2007-05-10
申请人： ANOBIT TECHNOLOGIES LTD , SHALVI OFIR , SOMMER NAFTALI
发明人： SHALVI OFIR , SOMMER NAFTALI
IPC分类号： G11C7/00 , G11C11/34 , G11C27/00
CPC分类号： G11C11/5628 , G11C11/56 , G11C16/3404 , G11C29/00
摘要： A method for data storage includes accepting data for storage in a memory (28) that includes multiple analog memory cells (32). The data is converted to input values. The input values are filtered using a non-linear filtering operation to produce respective shaped values, and the shaped values are converted to output values using a linear spreading transformation with coefficients chosen so that each of the shaped values contributes to at least two of the output values. The non-linear filtering operation is selected so as to reduce a size of an output range in which the output values lie. The output values are stored in the respective analog memory cells.
摘要翻译：一种用于数据存储的方法包括接收用于存储在包括多个模拟存储器单元（32）的存储器（28）中的数据。数据被转换为输入值。使用非线性滤波操作来过滤输入值以产生相应的成形值，并且使用线性扩展变换将成形值转换为输出值，其中系数被选择，使得每个成形值有助于至少两个输出值。选择非线性滤波操作以便减小输出值所在的输出范围的大小。输出值存储在相应的模拟存储单元中。

6. 发明申请

WO2013043968A3 POWER-OPTIMIZED DECODING OF LINEAR CODES 审中-公开
标题翻译：线性码的功率优化解码
公开(公告)号：WO2013043968A3
公开(公告)日：2014-05-15
申请号：PCT/US2012056486
申请日：2012-09-21
申请人： APPLE INC , ANHOLT MICHA , SOMMER NAFTALI
发明人： ANHOLT MICHA , SOMMER NAFTALI
IPC分类号： H03M13/00
CPC分类号： H04L1/004 , H03M13/1111 , H03M13/3776 , H03M13/6502 , H03M13/6577
摘要： A method includes accepting an input code word, which was produced by encoding data with an Error Correction Code (ECC), for decoding by a hardware-implemented ECC decoder. The input code word is pre-processed to produce a pre-processed code word, such that a first number of bit transitions that occur in the hardware-implemented ECC decoder while decoding the pre-processed code word is smaller than a second number of the bit transitions that would occur in the ECC decoder in decoding the input code word. The pre-processed code word is decoded using the ECC decoder, and the data is recovered from the decoded pre-processed code word.
摘要翻译：一种方法包括接受通过用错误校正码（ECC）编码数据产生的输入码字，用于由硬件实现的ECC解码器进行解码。输入代码字被预处理以产生预处理代码字，使得在解码预处理代码字时在硬件实现的ECC解码器中发生的第一数量的位转换小于第二数目的在ECC解码器中将在对输入码字进行解码时发生的位转换。使用ECC解码器解码预处理码字，并且从解码的预处理码字中恢复数据。

7. 发明申请

WO2008053472A3 READING MEMORY CELLS USING MULTIPLE THRESHOLDS 审中-公开
标题翻译：使用多个阈值读取记忆细胞
公开(公告)号：WO2008053472A3
公开(公告)日：2009-05-14
申请号：PCT/IL2007001315
申请日：2007-10-30
申请人： ANOBIT TECHNOLOGIES LTD , SOMMER NAFTALI , SHALVI OFIR , SOKOLOV DOTAN
发明人： SOMMER NAFTALI , SHALVI OFIR , SOKOLOV DOTAN
IPC分类号： G11C11/34 , G11C16/04 , G11C16/06 , G11C29/00
CPC分类号： G06F11/1068 , G11C8/20 , G11C11/56 , G11C11/5642 , G11C27/005
摘要： A method for operating a memory (28) includes storing data, which is encoded with an Error Correction Code (ECC), in analog memory cells (32) of the memory by writing respective analog input values selected from a set of nominal values to the analog memory cells. The stored data is read by performing multiple read operations that compare analog output values of the analog memory cells to different, respective read thresholds so as to produce multiple comparison results for each of the analog memory cells. At least two of the read thresholds are positioned between a pair of the nominal values that are adjacent to one another in the set of the nominal values. Soft metrics are computed responsively to the multiple comparison results. The ECC is decoded using the soft metrics, so as to extract the data stored in the analog memory cells.
摘要翻译：一种用于操作存储器（28）的方法包括：通过将从一组标称值中选择的相应模拟输入值写入到存储器的模拟存储器单元（32）中来存储用错误校正码（ECC）编码的数据，模拟存储单元。通过执行将模拟存储器单元的模拟输出值与不同的相应读取阈值进行比较的多个读取操作来读取存储的数据，以便为每个模拟存储器单元产生多个比较结果。读取阈值中的至少两个位于在标称值的集合中彼此相邻的一对标称值之间。响应于多个比较结果计算软度量。使用软指标对ECC进行解码，以便提取存储在模拟存储单元中的数据。

8. 发明申请

WO2008111058A3 ADAPTIVE ESTIMATION OF MEMORY CELL READ THRESHOLDS 审中-公开
公开(公告)号：WO2008111058A3
公开(公告)日：2008-09-18
申请号：PCT/IL2008/000329
申请日：2008-03-11
申请人： ANOBIT TECHNOLOGIES LTD. , SOMMER, Naftali , SHALVI, Ofir , PERLMUTTER, Uri , SOKOLOV, Dotan , GOLOV, Oren , GURGI, Eyal , ANHOLT, Micha
发明人： SOMMER, Naftali , SHALVI, Ofir , PERLMUTTER, Uri , SOKOLOV, Dotan , GOLOV, Oren , GURGI, Eyal , ANHOLT, Micha
IPC分类号： G06F12/00
摘要： A method for operating a memory (28) that includes a plurality of analog memory cells (32) includes storing data in the memory by writing first storage values to the cells. Second storage values are read from the cells, and a Cumulative Distribution Function (CDF) of the second storage values is estimated. The estimated CDF is processed so as to compute one or more thresholds. A memory access operation is performed on the cells using the one or more thresholds.

9. 发明申请

WO2008053473A2 MEMORY CELL READOUT USING SUCCESSIVE APPROXIMATION 审中-公开
标题翻译：使用成功的近似记忆单元读取
公开(公告)号：WO2008053473A2
公开(公告)日：2008-05-08
申请号：PCT/IL2007/001316
申请日：2007-10-30
申请人： ANOBIT TECHNOLOGIES LTD. , SHALVI, Ofir , SOMMER, Naftali
发明人： SHALVI, Ofir , SOMMER, Naftali
IPC分类号： G11C11/34
CPC分类号： G11C16/26 , G11C7/16 , G11C11/5642 , G11C16/24 , G11C27/005
摘要： A method for operating a memory (20) includes storing analog values in an array of analog memory cells (22), so that each of the analog memory cells holds an analog value corresponding to at least first and second respective bits. A first indication of the analog value stored in a given analog memory cell is obtained using a first set of sampling parameters. A second indication of the analog value stored in the given analog memory cell is obtained using a second set of sampling parameters, which is dependent upon the first indication. The first and second respective bits are read out from the given analog memory cell responsively to the first and second indications.
摘要翻译：一种用于操作存储器（20）的方法包括将模拟值存储在模拟存储器单元（22）的阵列中，使得每个模拟存储器单元保持与至少第一和第二相应位对应的模拟值。使用第一组采样参数获得存储在给定模拟存储器单元中的模拟值的第一指示。使用取决于第一指示的第二组采样参数来获得存储在给定模拟存储器单元中的模拟值的第二指示。响应于第一和第二指示，从给定的模拟存储单元读出第一和第二各自的位。

10. 发明申请

WO2008026203A2 ESTIMATION OF NON-LINEAR DISTORTION IN MEMORY DEVICES 审中-公开
标题翻译：记忆设备中非线性失真的估计
公开(公告)号：WO2008026203A2
公开(公告)日：2008-03-06
申请号：PCT/IL2007/001059
申请日：2007-08-27
申请人： ANOBIT TECHNOLOGIES , SHALVI, Ofir , SOMMER, Naftali , GURGI, Eyal , GOLOV, Oren , SOKOLOV, Dotan
发明人： SHALVI, Ofir , SOMMER, Naftali , GURGI, Eyal , GOLOV, Oren , SOKOLOV, Dotan
IPC分类号： G06F17/40
CPC分类号： G11C11/5621 , G11C16/3418 , G11C27/005
摘要： A method for operating a memory (24) includes storing data in analog memory cells (32) of the memory by writing respective analog values to the analog memory cells. A set of the analog memory cells is identified, including an interfered cell having a distortion that is statistically correlated with the respective analog values of the analog memory cells in the set. A mapping is determined between combinations of possible analog values of the analog memory cells in the set and statistical characteristics of composite distortion levels present in the interfered memory cell. The mapping is applied so as to compensate for the distortion in the interfered memory cell.
摘要翻译：用于操作存储器（24）的方法包括通过将相应的模拟值写入模拟存储器单元来将数据存储在存储器的模拟存储器单元（32）中。识别一组模拟存储器单元，包括具有与组中的模拟存储器单元的相应模拟值统计相关的失真的干扰单元。在存在于受干扰存储器单元中的复合失真级的集合和统计特性中的模拟存储器单元的可能模拟值的组合之间确定映射。应用映射以补偿受干扰的存储单元中的失真。

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