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    • 2. 发明申请
    • SEMICONDUCTOR PROCESS INTEGRATING SOURCE/DRAIN STRESSORS AND INTERLEVEL DIELECTRIC LAYER STRESSORS
    • 半导体工艺整合源/排水压力机和交互式电介质层压机
    • WO2007103609A3
    • 2008-12-31
    • PCT/US2007061841
    • 2007-02-08
    • FREESCALE SEMICONDUCTOR INCZHANG DAADAMS VANCE HNGUYEN BICH-YENGRUDOWSKI PAUL A
    • ZHANG DAADAMS VANCE HNGUYEN BICH-YENGRUDOWSKI PAUL A
    • H01L21/336
    • H01L29/7846H01L29/165H01L29/66636H01L29/66772H01L29/7843H01L29/7848H01L29/78654
    • A semiconductor fabrication process includes forming isolation structures (106) on either side of a transistor region, forming a gate structure (110) overlying the transistor region, removing source/drain regions (107) to form source/drain recesses (120), removing portions of the isolation structures to form recessed isolation structures (126), and filling the source/drain recesses with a source/drain stressor such as an epitaxially formed semiconductor. A lower surface of the source/drain recess is preferably deeper than an upper surface of the recessed isolation structure by approximately 10 to 30 nm. Filling the source/drain recesses may precede or follow forming the recessed isolation structures. An ILD stressor (140) is then deposited over the transistor region such that the ILD stressor is adjacent to sidewalls of the source/drain structure thereby coupling the ILD stressor to the source/drain stressor. The ILD stressor is preferably compressive or tensile silicon nitride and the source/drain structure is preferably silicon germanium or silicon carbon.
    • 半导体制造工艺包括在晶体管区域的任一侧上形成隔离结构(106),形成覆盖晶体管区域的栅极结构(110),去除源极/漏极区域(107)以形成源极/漏极凹部(120),去除 隔离结构的部分以形成凹陷的隔离结构(126),并且用诸如外延形成的半导体的源极/漏极应力源填充源/漏极凹部。 源极/漏极凹部的下表面优选比凹陷隔离结构的上表面深大约10至30nm。 填充源极/漏极凹部可以在形成凹入的隔离结构之前或之后。 然后将ILD应激源(140)沉积在晶体管区域上,使得ILD应力源与源极/漏极结构的侧壁相邻,从而将ILD应力源耦合到源极/漏极应力源。 ILD应力器优选为压缩或拉伸氮化硅,并且源极/漏极结构优选为硅锗或硅碳。
    • 3. 发明申请
    • METHOD OF FORMING A SEMICONDUCTOR DEVICE
    • 形成半导体器件的方法
    • WO2007092653A2
    • 2007-08-16
    • PCT/US2007/060145
    • 2007-01-05
    • FREESCALE SEMICONDUCTOR INC.ZHANG, DaNGUYEN, Bich-yen
    • ZHANG, DaNGUYEN, Bich-yen
    • H01L21/823842H01L21/823814H01L29/7848
    • A method for forming a semiconductor device includes providing a semiconductor substrate (12) having a first doped region and a second doped region, providing a dielectric (14) over the first doped region and the second doped region, and forming a first gate stack (26) over the dielectric over at least a portion of the first doped region. The first gate stack includes a metal portion (18) over the dielectric, a first in situ doped semiconductor portion (22) over the metal portion, and a first blocking cap (23) over the in situ doped semiconductor portion. The method further includes performing an implant to form source/drain regions adjacent the first gate stack, where the first blocking cap has a thickness sufficient to substantially block dopants from the implant from entering the first in situ doped semiconductor portion.
    • 一种用于形成半导体器件的方法包括提供具有第一掺杂区域和第二掺杂区域的半导体衬底(12),在第一掺杂区域和第二掺杂区域上提供电介质(14),并形成第一栅叠层 26)在第一掺杂区域的至少一部分上方的电介质上。 第一栅极堆叠包括电介质上的金属部分(18),金属部分上的第一原位掺杂半导体部分(22)和位于原位掺杂半导体部分上的第一阻挡盖(23)。 该方法还包括执行植入物以形成邻近第一栅极叠层的源极/漏极区域,其中第一阻挡盖具有足以基本上阻挡来自植入物的掺杂剂进入第一原位掺杂半导体部分的厚度。
    • 5. 发明申请
    • METHOD FOR FORMING A SEMICONDUCTOR STRUCTURE AND STRUCTURE THEREOF
    • 形成半导体结构及其结构的方法
    • WO2007053339A2
    • 2007-05-10
    • PCT/US2006041146
    • 2006-10-20
    • FREESCALE SEMICONDUCTOR INCTHEAN VOON-YEWCHEN JIANNGUYEN BICH-YENSADAKA MARIAM GZHANG DA
    • THEAN VOON-YEWCHEN JIANNGUYEN BICH-YENSADAKA MARIAM GZHANG DA
    • H01L21/84
    • H01L21/845H01L27/1211H01L29/7842H01L29/785Y10S438/938
    • Forming a semiconductor structure includes providing a substrate (10) having a strained semiconductor layer (14) overlying an insulating layer (12), providing a first device region (18) for forming a first plurality of devices having a first conductivity type, providing a second device region (20) for forming a second plurality of devices having a second conductivity type, and thickening the strained semiconductor layer in the second device region so that the strained semiconductor layer in the second device region has less strain that the strained semiconductor layer in the first device region. Alternatively, forming a semiconductor structure includes providing a first region (18) having a first conductivity type, forming an insulating layer (34) overlying at least an active area (32) of the first region, anisotropically etching the insulating layer, and after anisotropically etching the insulating layer, deposing a gate electrode material (46) overlying at least a portion of the insulating layer.
    • 形成半导体结构包括提供具有覆盖在绝缘层(12)上的应变半导体层(14)的衬底(10),提供用于形成具有第一导电类型的第一多个器件的第一器件区域(18) 用于形成具有第二导电类型的第二多个器件的第二器件区域(20),并且使第二器件区域中的应变半导体层变厚,使得第二器件区域中的应变半导体层具有较小的应变半导体层的应变 第一个设备区域。 或者,形成半导体结构包括提供具有第一导电类型的第一区域(18),形成覆盖第一区域的至少有源区域(32)的绝缘层(34),各向异性地蚀刻绝缘层,以及各向异性 蚀刻绝缘层,去除覆盖绝缘层的至少一部分的栅电极材料(46)。
    • 6. 发明申请
    • METHOD AND DEVICE OF GENERATING A KEY FOR DEVICE-TO-DEVICE COMMUNICATION BETWEEN A FIRST USER EQUIPMENT AND A SECOND USER EQUIPMENT
    • 产生用于第一用户设备和第二用户设备之间的设备到设备通信的密钥的方法和设备
    • WO2014059657A1
    • 2014-04-24
    • PCT/CN2012/083191
    • 2012-10-19
    • NOKIA CORPORATIONLIU, YangZHANG, Da JiangHOLTMANNS, Silke
    • LIU, YangZHANG, Da JiangHOLTMANNS, Silke
    • H04W12/04
    • H04W12/04H04L9/0869H04L63/062H04L2463/061H04L2463/062H04W76/11H04W76/14H04W76/27
    • A method of generating a key for D2D communication between a first user equipment and a second user equipment in a first radio access node is disclosed. In an exemplary embodiment, the method may comprise: receiving a request for D2D key generation from the first user equipment which is served by the first radio access node; determining whether the second user equipment is served by the first radio access node; when it is determined that the second user equipment is served by the first radio access node, generating a first random number and a second random number; generating a first D2D key based on the first random number and a second D2D key based on the second random number; sending the first D2D key and the second random number to the second user equipment; and sending the second D2D key and the first random number to the first user equipment; and when it is determined that the second user equipment is not served by the first radio access node, determining a second radio access node which serves the second user equipment; generating a first random number; generating a first D2D key based on the first random number; sending the first D2D key to the second radio access node; receiving a second D2D key from the second radio access node; and sending the second D2D key and the first random number to the first user equipment.
    • 公开了一种在第一无线接入节点中的第一用户设备和第二用户设备之间生成用于D2D通信的密钥的方法。 在示例性实施例中,该方法可以包括:从由第一无线电接入节点服务的第一用户设备接收对D2D密钥生成的请求; 确定所述第二用户设备是否由所述第一无线接入节点服务; 当确定第二用户设备由第一无线接入节点服务时,生成第一随机数和第二随机数; 基于第一随机数产生第一D2D密钥和基于第二随机数的第二D2D密钥; 将第一D2D密钥和第二随机数发送给第二用户设备; 以及将所述第二D2D密钥和所述第一随机数发送给所述第一用户设备; 并且当确定所述第二用户设备不被所述第一无线接入节点服务时,确定为所述第二用户设备服务的第二无线接入节点; 产生第一个随机数; 基于第一随机数生成第一D2D密钥; 将所述第一D2D密钥发送到所述第二无线接入节点; 从所述第二无线接入节点接收第二D2D密钥; 以及将第二D2D密钥和第一随机数发送给第一用户设备。
    • 10. 发明申请
    • METHOD OF FORMING A SEMICONDUCTOR DEVICE
    • 形成半导体器件的方法
    • WO2007092653A3
    • 2008-11-06
    • PCT/US2007060145
    • 2007-01-05
    • FREESCALE SEMICONDUCTOR INCZHANG DANGUYEN BICH-YEN
    • ZHANG DANGUYEN BICH-YEN
    • H01L21/8238
    • H01L21/823842H01L21/823814H01L29/7848
    • A method for forming a semiconductor device includes providing a semiconductor substrate (12) having a first doped region and a second doped region, providing a dielectric (14) over the first doped region and the second doped region, and forming a first gate stack (26) over the dielectric over at least a portion of the first doped region. The first gate stack includes a metal portion (18) over the dielectric, a first in situ doped semiconductor portion (22) over the metal portion, and a first blocking cap (23) over the in situ doped semiconductor portion. The method further includes performing an implant to form source/drain regions adjacent the first gate stack, where the first blocking cap has a thickness sufficient to substantially block dopants from the implant from entering the first in situ doped semiconductor portion.
    • 一种用于形成半导体器件的方法包括提供具有第一掺杂区域和第二掺杂区域的半导体衬底(12),在第一掺杂区域和第二掺杂区域上提供电介质(14),并形成第一栅叠层 26)在第一掺杂区域的至少一部分上方的电介质上。 第一栅极堆叠包括电介质上的金属部分(18),金属部分上的第一原位掺杂半导体部分(22)和位于原位掺杂半导体部分上的第一阻挡盖(23)。 该方法还包括执行植入物以形成邻近第一栅极叠层的源极/漏极区域,其中第一阻挡盖具有足以基本上阻挡来自植入物的掺杂剂进入第一原位掺杂半导体部分的厚度。