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1. 发明申请

WO2011112301A3 SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：WO2011112301A3
公开(公告)日：2011-11-24
申请号：PCT/US2011023993
申请日：2011-02-08
申请人： FREESCALE SEMICONDUCTOR INC , KARLIN LISA H , LIU LIANJUN , PAMATAT ALEX P , WINEBARGER PAUL M
发明人： KARLIN LISA H , LIU LIANJUN , PAMATAT ALEX P , WINEBARGER PAUL M
IPC分类号： H01L21/50
CPC分类号： B81B3/0018 , B81B7/007 , H01L21/50 , H01L21/78 , H01L23/04 , H01L24/94 , H01L24/97 , H01L2224/94 , H01L2224/97 , H01L2924/1461 , H01L24/03 , H01L24/26 , H01L24/83 , H01L2224/83 , H01L2224/03 , H01L2224/27
摘要： A wafer structure (88) includes a device wafer (20) and a cap wafer (60). Semiconductor dies (22) on the device wafer (20) each include a microelectronic device (26) and terminal elements (28, 30). Barriers (36, 52) are positioned in inactive regions (32, 50) of the device wafer (20). The cap wafer (60) is coupled to the device wafer (20) and covers the semiconductor dies (22). Portions (72) of the cap wafer (60) are removed to expose the terminal elements (28, 30). The barriers (36, 52) may be taller than the elements (28, 30) and function to prevent the portions (72) from contacting the terminal elements (28, 30) when the portions (72) are removed. The wafer structure (88) is singulated to form multiple semiconductor devices (89), each device (89) including the microelectronic device (26) covered by a section of the cap wafer (60) and terminal elements (28, 30) exposed from the cap wafer (60).
摘要翻译：晶片结构（88）包括器件晶片（20）和帽晶片（60）。器件晶片（20）上的半导体管芯（22）各自包括微电子器件（26）和端子元件（28,30）。阻挡层（36,52）位于器件晶片（20）的不活动区域（32,50）中。帽晶片（60）耦合到器件晶片（20）并覆盖半导体管芯（22）。帽晶片（60）的部分（72）被移除以露出端子元件（28,30）。屏障（36,52）可以高于元件（28,30），并且用于在部分（72）被移除时防止部分（72）接触端子元件（28,30）。晶片结构（88）被单个化以形成多个半导体器件（89），每个器件（89）包括由帽晶片（60）的一部分覆盖的微电子器件（26）和从盖晶片（60）。

2. 发明申请

WO2007030347A3 GROOVED PLATEN WITH CHANNELS OR PATHWAY TO AMBIENT AIR 审中-公开
公开(公告)号：WO2007030347A3
公开(公告)日：2007-03-15
申请号：PCT/US2006/033473
申请日：2006-08-29
申请人： FREESCALE SEMICONDUCTOR , BOTTEMA, Brian E. , ABRAHAM, Stephen F. , PAMATAT, Alex P.
发明人： BOTTEMA, Brian E. , ABRAHAM, Stephen F. , PAMATAT, Alex P.
IPC分类号： B24B7/00
摘要： A polish pad (120) and platen (130) assembly for use in chemical mechanical polishing of semiconductor devices includes a platen (130) having a grooved or channeled surface (136) which is sealed from the processing environment by an ungrooved portion (131) at the periphery of the platen (130). In addition, the platen (130) includes one or more passageways (132) that provide a pathway to ambient or sub-ambient environment. The combination of the sealing region (131) and the passageway(s) (132) prevent liquids, vapors or other undesirable contaminants from infiltrating between the pad and platen, and also vent trapped air pockets between the pad and platen.

3. 发明申请

WO2010090798A2 SUBSTRATE BONDING WITH METAL GERMANIUM SILICON MATERIAL 审中-公开
标题翻译：基材与金属锗硅材料结合
公开(公告)号：WO2010090798A2
公开(公告)日：2010-08-12
申请号：PCT/US2010020847
申请日：2010-01-13
申请人： FREESCALE SEMICONDUCTOR INC , MONTEZ RUBEN B , PAMATAT ALEX P
发明人： MONTEZ RUBEN B , PAMATAT ALEX P
IPC分类号： B81B7/00 , B81C1/00
CPC分类号： H01L23/10 , B81B2207/097 , B81C1/00269 , B81C2203/0109 , B81C2203/019 , H01L21/50 , H01L24/02 , H01L24/03 , H01L24/05 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/83 , H01L24/94 , H01L2224/02 , H01L2224/022 , H01L2224/036 , H01L2224/0391 , H01L2224/04026 , H01L2224/05558 , H01L2224/05572 , H01L2224/05638 , H01L2224/2745 , H01L2224/27452 , H01L2224/2746 , H01L2224/276 , H01L2224/29013 , H01L2224/29016 , H01L2224/29083 , H01L2224/29111 , H01L2224/29117 , H01L2224/29124 , H01L2224/29138 , H01L2224/29144 , H01L2224/29155 , H01L2224/29157 , H01L2224/29166 , H01L2224/29169 , H01L2224/29181 , H01L2224/29184 , H01L2224/32145 , H01L2224/32225 , H01L2224/32502 , H01L2224/32506 , H01L2224/83193 , H01L2224/83203 , H01L2224/83411 , H01L2224/83424 , H01L2224/83444 , H01L2224/83455 , H01L2224/83457 , H01L2224/83466 , H01L2224/83469 , H01L2224/83481 , H01L2224/83484 , H01L2224/83805 , H01L2224/94 , H01L2924/10157 , H01L2924/15159 , H01L2924/164 , H01L2924/01032 , H01L2924/01014 , H01L2924/01029 , H01L2924/00014 , H01L2924/00012 , H01L2224/83
摘要： A method that in one embodiment is useful in bonding a first substrate (103) to a second substrate (303) includes forming a layer including metal over the first substrate. The layer including metal in one embodiment surrounds a semiconductor device, which can be a micro electromechanical system (MEMS) device. On the second substrate (303) is formed a first layer comprising silicon (401). A second layer (403) comprising germanium and silicon is formed on the first layer. A third layer (405) comprising germanium is formed on the second layer. The third layer is brought into contact with the layer including metal. Heat (and pressure in some embodiments) is applied to the third layer and the layer including metal to form a mechanical bond material between the first substrate and the second substrate in which the mechanical bond material is electrically conductive. In the case of the mechanical bond surrounding a semiconductor device such as a MEMS, the mechanical bond can be particularly advantageous as a hermetic seal for protecting the MEMS.
摘要翻译：在一个实施例中，将第一衬底（103）接合到第二衬底（303）上有用的方法包括在第一衬底上形成包括金属的层。在一个实施例中包括金属的层围绕半导体器件，其可以是微机电系统（MEMS）器件。在第二基板（303）上形成包括硅（401）的第一层。在第一层上形成包括锗和硅的第二层（403）。包含锗的第三层（405）形成在第二层上。第三层与包括金属的层接触。在第三层和包含金属的层上施加热（和一些实施例中的压力）以在第一基板和第二基板之间形成机械接合材料，其中机械接合材料是导电的。在诸如MEMS之类的半导体器件周围的机械接合的情况下，作为用于保护MEMS的气密密封件，机械结合可能是特别有利的。

4. 发明申请

WO2007030348A3 PLATEN ENDPOINT WINDOW WITH PRESSURE RELIEF 审中-公开
公开(公告)号：WO2007030348A3
公开(公告)日：2007-03-15
申请号：PCT/US2006/033475
申请日：2006-08-29
申请人： FREESCALE SEMICONDUCTOR , BOTTEMA, Brian E. , ABRAHAM, Stephen F. , PAMATAT, Alex P.
发明人： BOTTEMA, Brian E. , ABRAHAM, Stephen F. , PAMATAT, Alex P.
IPC分类号： B24B29/00
摘要： A polish pad (40, 42) and platen (50) assembly for use in chemical mechanical polishing of semiconductor devices includes a platen (50) having a vented endpoint window (62, 72, 82) with one or more venting passageways (e.g., 64, 66) and/or a grooved or channeled platen surface (176) to prevent air pressure buildup in the air gap (46) by discharging or venting air through one or more vent pathways (52) formed in the platen to provide a pathway to ambient or sub-ambient environment. The air permeable construction of the vented endpoint window (72) provides pressure relief for the air gap (46) between the pad endpoint window (44) and the vented endpoint window (72), but may also include passages (75, 76) that are filled with an air permeable hydrophobic material which protects the underlying endpoint detection system (30, 32) from contamination during cleaning of the platen endpoint window (72).

5. 发明申请

WO2011112301A2 SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：WO2011112301A2
公开(公告)日：2011-09-15
申请号：PCT/US2011/023993
申请日：2011-02-08
申请人： FREESCALE SEMICONDUCTOR, INC. , KARLIN, Lisa H. , LIU, Lianjun , PAMATAT, Alex P. , WINEBARGER, Paul, M.
发明人： KARLIN, Lisa H. , LIU, Lianjun , PAMATAT, Alex P. , WINEBARGER, Paul, M.
IPC分类号： H01L21/50
CPC分类号： B81B3/0018 , B81B7/007 , H01L21/50 , H01L21/78 , H01L23/04 , H01L24/94 , H01L24/97 , H01L2224/94 , H01L2224/97 , H01L2924/1461 , H01L24/03 , H01L24/26 , H01L24/83 , H01L2224/83 , H01L2224/03 , H01L2224/27
摘要： A wafer structure (88) includes a device wafer (20) and a cap wafer (60). Semiconductor dies (22) on the device wafer (20) each include a microelectronic device (26) and terminal elements (28, 30). Barriers (36, 52) are positioned in inactive regions (32, 50) of the device wafer (20). The cap wafer (60) is coupled to the device wafer (20) and covers the semiconductor dies (22). Portions (72) of the cap wafer (60) are removed to expose the terminal elements (28, 30). The barriers (36, 52) may be taller than the elements (28, 30) and function to prevent the portions (72) from contacting the terminal elements (28, 30) when the portions (72) are removed. The wafer structure (88) is singulated to form multiple semiconductor devices (89), each device (89) including the microelectronic device (26) covered by a section of the cap wafer (60) and terminal elements (28, 30) exposed from the cap wafer (60).
摘要翻译：晶片结构（88）包括器件晶片（20）和盖晶片（60）。器件晶片（20）上的半导体管芯（22）各自包括微电子器件（26）和端子元件（28,30）。阻挡层（36,52）位于器件晶片（20）的非活性区域（32,50）中。盖晶片（60）耦合到器件晶片（20）并覆盖半导体管芯（22）。去除盖晶片（60）的部分（72）以露出端子元件（28,30）。障碍物（36,52）可以比元件（28,30）更高，并且用于在部分（72）被移除时防止部分（72）接触端子元件（28,30）。晶片结构（88）被单个化以形成多个半导体器件（89），每个器件（89）包括由盖晶片（60）的一部分覆盖的微电子器件（26）和从其暴露的端子元件（28,30）盖晶片（60）。

6. 发明申请

WO2010090798A3 SUBSTRATE BONDING WITH METAL GERMANIUM SILICON MATERIAL 审中-公开
公开(公告)号：WO2010090798A3
公开(公告)日：2010-08-12
申请号：PCT/US2010/020847
申请日：2010-01-13
申请人： FREESCALE SEMICONDUCTOR INC. , MONTEZ, Ruben B. , PAMATAT, Alex P.
发明人： MONTEZ, Ruben B. , PAMATAT, Alex P.
IPC分类号： B81B7/00 , B81C1/00
摘要： A method that in one embodiment is useful in bonding a first substrate (103) to a second substrate (303) includes forming a layer including metal over the first substrate. The layer including metal in one embodiment surrounds a semiconductor device, which can be a micro electromechanical system (MEMS) device. On the second substrate (303) is formed a first layer comprising silicon (401). A second layer (403) comprising germanium and silicon is formed on the first layer. A third layer (405) comprising germanium is formed on the second layer. The third layer is brought into contact with the layer including metal. Heat (and pressure in some embodiments) is applied to the third layer and the layer including metal to form a mechanical bond material between the first substrate and the second substrate in which the mechanical bond material is electrically conductive. In the case of the mechanical bond surrounding a semiconductor device such as a MEMS, the mechanical bond can be particularly advantageous as a hermetic seal for protecting the MEMS.

7. 发明申请

WO2007120982A3 POLISHING PAD, A POLISHING APPARATUS, AND A PROCESS FOR USING THE POLISHING PAD 审中-公开
标题翻译：抛光垫，抛光装置和使用抛光垫的工艺
公开(公告)号：WO2007120982A3
公开(公告)日：2008-10-02
申请号：PCT/US2007062400
申请日：2007-02-20
申请人： FREESCALE SEMICONDUCTOR INC , BOTTEMA BRIAN E , ABRAHAM STEPHEN F , PAMATAT ALEX P
发明人： BOTTEMA BRIAN E , ABRAHAM STEPHEN F , PAMATAT ALEX P
IPC分类号： B24B1/00
CPC分类号： B24B37/013 , B24B37/205 , B24B49/12 , B24B49/14
摘要： A polishing pad (40) can include a first layer (22) and a second layer (24). The first layer can have a first polishing surface (212) and a first opening (410). The second layer can have an attaching surface (214) and a second opening substantially contiguous with the first opening (410). The polishing pad (40) can further include a pad window (46) lying within the first opening. The pad window (46) can include a second polishing surface (416) and a gas-permeable material. In one aspect, an apparatus can include an attaching surface (214) of a platen (62) lying adjacent to the attaching surface of the polishing pad. In another aspect, a process for polishing can include changing a temperature of a gas within a spaced-apart region (610) formed between a pad (20) and a platen (62). The process can also include forming a gas flux across the polishing pad after polishing has started.
摘要翻译：抛光垫（40）可以包括第一层（22）和第二层（24）。第一层可以具有第一抛光表面（212）和第一开口（410）。第二层可以具有附接表面（214）和基本上与第一开口（410）邻接的第二开口。抛光垫（40）还可以包括位于第一开口内的垫窗（46）。垫窗（46）可以包括第二抛光表面（416）和透气材料。在一个方面，设备可以包括邻近抛光垫的附接表面的压板（62）的附接表面（214）。另一方面，用于抛光的方法可以包括改变在衬垫（20）和压板（62）之间形成的间隔开的区域（610）内的气体的温度。该方法还可以包括在抛光开始之后在抛光垫上形成气体通量。

8. 发明申请

WO2007120982A2 POLISHING PAD, A POLISHING APPARATUS, AND A PROCESS FOR USING THE POLISHING PAD 审中-公开
标题翻译：抛光垫，抛光装置和使用抛光垫的工艺
公开(公告)号：WO2007120982A2
公开(公告)日：2007-10-25
申请号：PCT/US2007/062400
申请日：2007-02-20
申请人： FREESCALE SEMICONDUCTOR, INC. , BOTTEMA, Brian, E. , ABRAHAM, Stephen, F. , PAMATAT, Alex, P.
发明人： BOTTEMA, Brian, E. , ABRAHAM, Stephen, F. , PAMATAT, Alex, P.
IPC分类号： B24B49/00
CPC分类号： B24B37/013 , B24B37/205 , B24B49/12 , B24B49/14
摘要： A polishing pad (40) can include a first layer (22) and a second layer (24). The first layer can have a first polishing surface (212) and a first opening (410). The second layer can have an attaching surface (214) and a second opening substantially contiguous with the first opening (410). The polishing pad (40) can further include a pad window (46) lying within the first opening. The pad window (46) can include a second polishing surface (416) and a gas-permeable material. In one aspect, an apparatus can include an attaching surface (214) of a platen (62) lying adjacent to the attaching surface of the polishing pad. In another aspect, a process for polishing can include changing a temperature of a gas within a spaced-apart region (610) formed between a pad (20) and a platen (62). The process can also include forming a gas flux across the polishing pad after polishing has started.
摘要翻译：抛光垫（40）可以包括第一层（22）和第二层（24）。第一层可以具有第一抛光表面（212）和第一开口（410）。第二层可以具有附接表面（214）和基本上与第一开口（410）邻接的第二开口。抛光垫（40）还可以包括位于第一开口内的垫窗（46）。垫窗（46）可以包括第二抛光表面（416）和透气材料。在一个方面，设备可以包括邻近抛光垫的附接表面的压板（62）的附接表面（214）。另一方面，用于抛光的方法可以包括改变在衬垫（20）和压板（62）之间形成的间隔开的区域（610）内的气体的温度。该方法还可以包括在抛光开始之后在抛光垫上形成气体通量。

9. 发明申请

WO2007030348A2 PLATEN ENDPOINT WINDOW WITH PRESSURE RELIEF 审中-公开
标题翻译：压力释放的平板终端窗口
公开(公告)号：WO2007030348A2
公开(公告)日：2007-03-15
申请号：PCT/US2006033475
申请日：2006-08-29
申请人： FREESCALE SEMICONDUCTOR INC , BOTTEMA BRIAN E , ABRAHAM STEPHEN F , PAMATAT ALEX P
发明人： BOTTEMA BRIAN E , ABRAHAM STEPHEN F , PAMATAT ALEX P
IPC分类号： B24B7/30 , B24B29/00
CPC分类号： B24B37/013 , B24B37/205
摘要： A polish pad (40, 42) and platen (50) assembly for use in chemical mechanical polishing of semiconductor devices includes a platen (50) having a vented endpoint window (62, 72, 82) with one or more venting passageways (e.g., 64, 66) and/or a grooved or channeled platen surface (176) to prevent air pressure buildup in the air gap (46) by discharging or venting air through one or more vent pathways (52) formed in the platen to provide a pathway to ambient or sub-ambient environment. The air permeable construction of the vented endpoint window (72) provides pressure relief for the air gap (46) between the pad endpoint window (44) and the vented endpoint window (72), but may also include passages (75, 76) that are filled with an air permeable hydrophobic material which protects the underlying endpoint detection system (30, 32) from contamination during cleaning of the platen endpoint window (72).
摘要翻译：用于半导体器件的化学机械抛光的抛光垫（40,42）和台板（50）组件包括具有带有一个或多个排气通道（例如，通气孔）的排气端点窗口（62,72,82）的台板（50）通过将空气排放或通过形成在压板中形成的一个或多个通气路径（52）来防止空气压力在气隙（46）中累积，从而提供通路（66,66,66,66,66）和/或开槽或通道的压板表面到环境或次周围环境。通气终点窗口（72）的透气构造为垫终点窗口（44）和通气终点窗口（72）之间的气隙（46）提供压力释放，但也可包括通道（75,76）填充有可透气的疏水性材料，其在平台终点窗口（72）的清洁期间保护下面的终点检测系统（30,32）免受污染。

10. 发明申请

WO2007030347A2 GROOVED PLATEN WITH CHANNELS OR PATHWAY TO AMBIENT AIR 审中-公开
标题翻译：带通道或通往安全空气的铺设板
公开(公告)号：WO2007030347A2
公开(公告)日：2007-03-15
申请号：PCT/US2006033473
申请日：2006-08-29
申请人： FREESCALE SEMICONDUCTOR INC , BOTTEMA BRIAN E , ABRAHAM STEPHEN F , PAMATAT ALEX P
发明人： BOTTEMA BRIAN E , ABRAHAM STEPHEN F , PAMATAT ALEX P
IPC分类号： B24B7/30 , B24B29/00
CPC分类号： B24B37/16
摘要： A polish pad (120) and platen (130) assembly for use in chemical mechanical polishing of semiconductor devices includes a platen (130) having a grooved or channeled surface (136) which is sealed from the processing environment by an ungrooved portion (131) at the periphery of the platen (130). In addition, the platen (130) includes one or more passageways (132) that provide a pathway to ambient or sub-ambient environment. The combination of the sealing region (131) and the passageway(s) (132) prevent liquids, vapors or other undesirable contaminants from infiltrating between the pad and platen, and also vent trapped air pockets between the pad and platen.
摘要翻译：用于半导体器件的化学机械抛光的抛光垫（120）和压板（130）组件包括具有槽或通道表面（136）的压板（130），其通过未槽口部分（131）与处理环境密封，在压板（130）的周边处。此外，压板（130）包括一个或多个通道（132），其提供到环境或亚环境环境的路径。密封区域（131）和通道（132）的组合防止液体，蒸气或其它不期望的污染物渗透到垫和压板之间，并且还释放垫和压板之间的被困气囊。

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