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1. 发明申请

WO2014179809A1 GALLIUM NITRIDE FIELD EFFECT TRANSISTOR 审中-公开
标题翻译：氮化镓场效应晶体管
公开(公告)号：WO2014179809A1
公开(公告)日：2014-11-06
申请号：PCT/US2014/036842
申请日：2014-05-05
申请人： TEXAS INSTRUMENT INCORPORATED , TEXAS INSTRUMENTS JAPAN LIMITED
发明人： HAIDER, Asad, Mahmood , JOH, Jungwoo
IPC分类号： H01L29/772 , H01L21/335
CPC分类号： H01L29/7787 , H01L21/28264 , H01L21/28575 , H01L29/2003 , H01L29/42368 , H01L29/452 , H01L29/4975 , H01L29/518 , H01L29/66462
摘要： A semiconductor device (100) may be formed by forming a silicon-containing gate dielectric layer (108) over a semiconductor layer (104). A gate metal layer is formed over the gate dielectric layer (108); the gate metal layer includes 2 atomic percent to 10 atomic percent silicon during formation. The gate metal layer is patterned to form a metal gate (112). Source and drain contact holes (116) are subsequently formed, and contact metal (118) is formed and patterned in the contact holes (116). A subsequent contact anneal heats the contact metal (118) and gate (112) for at least 30 seconds at a temperature of at least 750 °C.
摘要翻译：半导体器件（100）可以通过在半导体层（104）上形成含硅栅极电介质层（108）而形成。在栅介电层（108）上方形成栅极金属层; 栅极金属层在形成期间包括2原子％至10原子％的硅。图案化栅极金属层以形成金属栅极（112）。随后形成源极和漏极接触孔（116），并且在接触孔（116）中形成并图案化接触金属（118）。随后的接触退火在至少750℃的温度下将接触金属（118）和浇口（112）加热至少30秒。

2. 发明申请

WO2014179797A1 INTEGRATED SILICON AND III-N SEMICONDUCTOR DEVICE 审中-公开
标题翻译：集成硅和III-N半导体器件
公开(公告)号：WO2014179797A1
公开(公告)日：2014-11-06
申请号：PCT/US2014/036794
申请日：2014-05-05
申请人： TEXAS INSTRUMENTS INCORPORATED , TEXAS INSTRUMENTS JAPAN LIMITED
发明人： TIPIRNENI, Naveen , PENDHARKAR, Sameer , WISE, Rick, L.
IPC分类号： H01L21/70 , H01L29/12
CPC分类号： H01L21/187 , H01L21/76254 , H01L21/8258
摘要： An integrated silicon and III-N semiconductor device may be formed by growing III-N semiconductor material (102) on a first silicon substrate (100) having a first orientation. A second silicon substrate (106) with a second, different, orientation has a release layer (108) between a silicon device film (110) and a carrier wafer (112). The silicon device film (110) is attached to the III-N semiconductor material while the silicon device film (110) is connected to the carrier wafer (112) through the release layer (108). The carrier wafer (112) is subsequently removed from the silicon device film (110). A first plurality of components is formed in and/or on the silicon device film. A second plurality of components is formed in and/or on III-N semiconductor material in the exposed region. In an alternate process, a dielectric interlayer may be disposed between the silicon device film and the III-N semiconductor material in the integrated silicon and III-N semiconductor device.
摘要翻译：可以通过在具有第一取向的第一硅衬底（100）上生长III-N半导体材料（102）来形成集成硅和III-N半导体器件。具有第二不同取向的第二硅衬底（106）在硅器件膜（110）和载体晶片（112）之间具有释放层（108）。硅器件膜（110）通过隔离层（108）与硅载体晶片（112）连接，连接到III-N半导体材料。随后从硅器件膜（110）去除载体晶片（112）。在硅器件膜上和/或上形成第一多个部件。在暴露区域中的III-N半导体材料中和/或上形成第二组分。在替代方法中，可以在集成硅和III-N半导体器件中的硅器件膜和III-N半导体材料之间设置电介质中间层。

3. 发明申请

WO2014179796A1 III-NITRIDE TRANSISTOR LAYOUT 审中-公开
标题翻译： III-NITRIDE晶体管布局
公开(公告)号：WO2014179796A1
公开(公告)日：2014-11-06
申请号：PCT/US2014/036788
申请日：2014-05-05
申请人： TEXAS INSTRUMENTS INCORPORATED , TEXAS INSTRUMENTS JAPAN LIMITED
发明人： PENDHARKAR, Sameer , TIPIRNENI, Naveen , JOH, Jungwoo
IPC分类号： H01L29/772 , H01L21/335
CPC分类号： H01L29/2003 , H01L27/085 , H01L29/41725 , H01L29/42316 , H01L29/66431 , H01L29/66462 , H01L29/778 , H01L29/7787
摘要： A semiconductor device (100) containing a GaN FET (124) has an isolating gate structure (112) outside the channel area which is operable to block current in the two-dimensional electron gas between two regions of the semiconductor device. The isolating gate structure(112) is formed concurrently with the gate of the GaN FET, and has a same structure as the gate.
摘要翻译：包含GaN FET（124）的半导体器件（100）在通道区域外部具有隔离栅极结构（112），该隔离栅极结构可操作以阻挡半导体器件的两个区域之间的二维电子气体中的电流。隔离栅结构（112）与GaN FET的栅极同时形成，并且具有与栅极相同的结构。

4. 发明申请

WO2014160798A2 PROCESSOR POWER MEASUREMENT 审中-公开
标题翻译：处理器功率测量
公开(公告)号：WO2014160798A2
公开(公告)日：2014-10-02
申请号：PCT/US2014/031904
申请日：2014-03-26
申请人： TEXAS INSTRUMENTS INCORPORATED , TEXAS INSTRUMENTS JAPAN LIMITED
发明人： ALIBERTI, James, H.
IPC分类号： G06F1/32
CPC分类号： G06F11/24 , G01R31/275 , G01R31/28 , G01R31/3004 , G06F1/28 , G06F11/26
摘要： A system (2) can include a processing core (6) to execute machine readable instructions. The system (2) can also include a memory (8) accessible by the processor core (6). The memory (8) can include preprogrammed test data (10) that characterizes one of an impedance of a processor (3) and a current output to the processor (4) during execution of a test routine. The processor (4) can include the processing core (6) and the one of the impedance of the processor (4) and the current output to the processor (4) is based on a power measurement taken during execution of a test routine. The power measurement can be taken with a current sensor that is at least one of lossy or at least about 98% accurate.
摘要翻译：系统（2）可以包括执行机器可读指令的处理核心（6）。系统（2）还可以包括可由处理器内核（6）访问的存储器（8）。存储器（8）可以包括在执行测试例程期间表征处理器（3）的阻抗和到处理器（4）的电流输出中的一个的预编程测试数据（10）。处理器（4）可以包括处理核心（6），并且处理器（4）的阻抗和输出到处理器（4）的电流中的一个是基于在执行测试例程期间获取的功率测量。功率测量可以使用电流传感器进行测量，该电流传感器至少有一个损耗或至少约98％的准确度。

5. 发明申请

WO2014138624A1 ELECTRONIC DEVICE AND METHOD FOR TRACKING ENERGY CONSUMPTION 审中-公开
标题翻译：用于跟踪能量消耗的电子设备和方法
公开(公告)号：WO2014138624A1
公开(公告)日：2014-09-12
申请号：PCT/US2014/021906
申请日：2014-03-07
申请人： TEXAS INSTRUMENTS INCORPORATED , TEXAS INSTRUMENTS DEUTSCHLAND GMBH , TEXAS INSTRUMENTS JAPAN LIMITED
发明人： DIEWALD, Horst , ZIPPERER, Johann , WEBER, Peter , BRAUCHLE, Anton
IPC分类号： H02M3/156 , G05F1/66
CPC分类号： G01R21/00 , G01R21/007 , G01R22/10 , G06F1/26 , G06F1/28
摘要： An energy tracking system comprises at least one switching element, at least one inductor and a control circuit to keep the output voltage at a pre-selected level. An example energy tracking system (200) has energy transfer blocks (202, 204), a control circuit (201) and reference impedance (205). Each energy transfer block (202, 204) has a diode Di, switched transistors SWia, SWib, and an inductor INDi coupled between a switched transistor and an output of the block. The control circuit (201) compares the output voltage of the system to a reference value and controls the switching of transistors (SWS1a, SWS1b, SWSia, SWSib) in order to transfer energy for the primary voltage into a secondary voltage at the system output. The control circuit receives a signal from an ON-time and OFF-time generator and generates switching signals for the switching elements in the form of ON-time pulses with a constant ON-time.
摘要翻译：能量跟踪系统包括至少一个开关元件，至少一个电感器和控制电路，以将输出电压保持在预选的电平。示例性能量跟踪系统（200）具有能量传递块（202,204），控制电路（201）和参考阻抗（205）。每个能量传递块（202,204）具有二极管Di，开关晶体管SWia，SWib以及耦合在开关晶体管和块的输出之间的电感器INDi。控制电路（201）将系统的输出电压与参考值进行比较，并控制晶体管（SWS1a，SWS1b，SWSia，SWSib）的切换，以便将用于初级电压的能量转换为系统输出端的次级电压。控制电路接收来自导通时间和断开时间发生器的信号，并且以导通时间为常数的导通时间脉冲的形式生成开关元件的开关信号。

6. 发明申请

WO2014124415A1 TOUCH PANEL APPARATUS AND METHODS 审中-公开
标题翻译：触控面板设备和方法
公开(公告)号：WO2014124415A1
公开(公告)日：2014-08-14
申请号：PCT/US2014/015690
申请日：2014-02-11
申请人： TEXAS INSTRUMENTS INCORPORATED , TEXAS INSTRUMENTS JAPAN LIMITED
发明人： SNEDEKER, Michael, Douglas
IPC分类号： G06F3/041
CPC分类号： G06F3/0418 , G06F3/03545 , G06F3/041 , G06F3/0414 , G06F3/0488
摘要： Apparatus and methods for improving touch panel accuracy are provided. A calibration sampling controller (830) commands an X-Y coordinate positioning apparatus to position a touch-emulating stylus at a known X-Y coordinate position relative to a touch panel (815) and to depress the stylus. A touch sampling module (835) receives, samples and stores calibration sample values corresponding to signal amplitudes associated with touch panel nodes. Each node corresponds to an X-Y coordinate position associated with a touch panel row/column cross point. The signal amplitude corresponds to a physical proximity of a node to the X-Y coordinate position of the depressed stylus. A touch panel characteristic modeler (210) receives the node calibration sample values and generates a characteristic model of the node calibration sample values as a function of a path of the touch-emulating stylus across the touch panel.
摘要翻译：提供了提高触摸屏精度的装置和方法。校准采样控制器（830）命令X-Y坐标定位设备将触摸仿真触针定位在相对于触摸面板（815）的已知X-Y坐标位置并压下触笔。触摸采样模块（835）接收，采样和存储与触摸面板节点相关联的信号幅度对应的校准采样值。每个节点对应于与触摸板行/列交叉点相关联的X-Y坐标位置。信号幅度对应于节点与被抑制的触控笔的X-Y坐标位置的物理接近度。触摸面板特征建模器（210）接收节点校准采样值，并且生成作为触摸仿真测针在触摸面板上的路径的函数的节点校准采样值的特征模型。

7. 发明申请

WO2014124376A1 METHOD OF FORMING METAL CONTACT OPENING 审中-公开
标题翻译：形成金属接触开口的方法
公开(公告)号：WO2014124376A1
公开(公告)日：2014-08-14
申请号：PCT/US2014/015595
申请日：2014-02-10
申请人： TEXAS INSTRUMENTS INCORPORATED , TEXAS INSTRUMENTS JAPAN LIMITED
发明人： FARBER, David, Gerald , LII, Tom , LYTLE, Steve
IPC分类号： H01L21/308 , H01L21/027
CPC分类号： H01L21/76804 , H01L21/0338 , H01L21/31144 , H01L21/76816 , H01L21/76897
摘要： The width of a metal contact opening (182) is formed to be smaller than the minimum feature size of a photolithographically-defined opening. The method forms the metal contact opening (182) by first etching the fourth layer of a multilayered hard mask structure to have a number of trenches that expose the third layer of the multilayered hard mask structure. Following this, the third, second (152), and first (150) layers of the multilayered hard mask structure are selectively etched to expose uncovered regions on the top surface of an isolation layer (138) that touches and lies over a source region (120H) and a drain region (122H). The uncovered regions on the top surface of the isolation layer (138) are then etched to form the metal contact openings (182).
摘要翻译：金属接触开口（182）的宽度形成为小于光刻限定开口的最小特征尺寸。该方法通过首先蚀刻多层硬掩模结构的第四层来形成金属接触开口（182），以具有暴露多层硬掩模结构的第三层的多个沟槽。接下来，选择性地蚀刻多层硬掩模结构的第三，第二（152）和第一（150）层以暴露接触并位于源极区域上的隔离层（138）的顶表面上的未覆盖区域（ 120H）和漏区（122H）。然后蚀刻隔离层（138）的顶表面上的未覆盖区域以形成金属接触开口（182）。

8. 发明申请

WO2014120911A8 PHASE LOCKED LOOP AND METHOD FOR OPERATING THE SAME 审中-公开
公开(公告)号：WO2014120911A8
公开(公告)日：2014-08-07
申请号：PCT/US2014/013830
申请日：2014-01-30
申请人： TEXAS INSTRUMENTS INCORPORATED , TEXAS INSTRUMENTS DEUTSCHLAND GMBH , TEXAS INSTRUMENTS JAPAN LIMITED
发明人： SAREEN, Puneet , DIETL, Markud , DEWAN, Ketan , GEORGE, Edmond, Fernandez
IPC分类号： H03L7/18 , H03L7/087
摘要： The invention generally relates to phase locked loops (PLL), and more specifically to ultralow bandwidth phase locked loops. The invention may be for example embodied in an integrated circuit implementing a phase locked loop or a method for operating a phase locked loop. The invention provides a PLL with a control stage that uses only two storage cells, a counter and a digital-to-analog (DAC) converter. In comparison to prior-art PLLs using storage cells the configuration of the invention's control stage reduces the chip area required for the PLL reduced. The invention further suggests PVT compensation mechanisms for a PLL and implementing a PLL that has lower peaking in its frequency response, which results in better settling response.

9. 发明申请

WO2014099980A1 ROBUST CABLE-TYPE DETECTION FOR USB POWER DELIVERY 审中-公开
标题翻译：用于USB电源传输的强大的电缆类型检测
公开(公告)号：WO2014099980A1
公开(公告)日：2014-06-26
申请号：PCT/US2013/075766
申请日：2013-12-17
申请人： TEXAS INSTRUMENTS INCORPORATED , TEXAS INSTRUMENTS JAPAN LIMITED
发明人： WATERS, Deric, W.
IPC分类号： G06F1/26 , G01R31/00
CPC分类号： G06F13/385 , G06F1/22 , G06F1/266 , G06F13/4282 , Y02D10/14 , Y02D10/151
摘要： A system and method for detecting a Universal Serial Bus (USB) cable-type. A USB power delivery (PD) device (22) configured at a near end of a USB cable (26) is configured to (i) receive and process a signal from a device (44) at a far end of the USB cable to determine a power rating of the USB cable (26) and (ii) adjustably establish power delivered by the first device (44) to the USB cable as a function of the determined USB cable power rating.
摘要翻译：用于检测通用串行总线（USB）电缆类型的系统和方法。配置在USB电缆（26）的近端的USB电力输送（PD）设备（22）被配置为（i）从USB电缆的远端处的来自设备（44）的信号接收和处理信号，以确定根据所确定的USB电缆额定功率，USB电缆（26）的功率额定值和（ii）可调整地建立由第一设备（44）传递到USB电缆的功率。

10. 发明申请

WO2014093882A1 WIRELESS POWERED IC CARD FOR SENSOR DATA ACQUISITION 审中-公开
标题翻译：无线电源IC卡用于传感器数据采集
公开(公告)号：WO2014093882A1
公开(公告)日：2014-06-19
申请号：PCT/US2013/075120
申请日：2013-12-13
申请人： TEXAS INSTRUMENTS INCORPORATED , TEXAS INSTRUMENTS FRANCE S.A. , TEXAS INSTRUMENTS JAPAN LIMITED
发明人： CHATEAU, Alain, Bruno , ZOICAS, Vasile
IPC分类号： A61B5/00 , G06Q50/22
CPC分类号： H04B5/0037 , H04B5/0031 , H04B5/0075 , H04B5/02
摘要： An integrated circuit card (102) includes a rechargeable energy source (104), a wireless transmitter (110), and a processor (108). The processor receives sensor data from one or more sensors (101) and sends the sensor data to the wireless transmitter for wireless transmission.
摘要翻译：集成电路卡（102）包括可再充电能源（104），无线发射器（110）和处理器（108）。处理器从一个或多个传感器（101）接收传感器数据，并将传感器数据发送到无线发射器进行无线传输。

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