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1. 发明授权

US4199778A Interconnection structure for semiconductor integrated circuits 失效
标题翻译：半导体集成电路的互连结构
公开(公告)号：US4199778A
公开(公告)日：1980-04-22
申请号：US843366
申请日：1977-10-19
申请人： Toshiaki Masuhara , Tokumasa Yasui , Yoshio Sakai , Joh Nakajima , Yasunobu Kosa , Satoshi Meguro , Masaharu Kubo
发明人： Toshiaki Masuhara , Tokumasa Yasui , Yoshio Sakai , Joh Nakajima , Yasunobu Kosa , Satoshi Meguro , Masaharu Kubo
IPC分类号： H01L21/763 , H01L21/31 , H01L21/3205 , H01L21/3215 , H01L21/768 , H01L23/52 , H01L23/532 , H01L29/04 , H01L23/48 , H01L29/44
CPC分类号： H01L21/32155 , H01L21/76889 , H01L23/53271 , H01L2924/0002
摘要： In a semiconductor integrated circuit having polycrystalline silicon interconnections and metal interconnections, a low resistance layer, containing impurities to a high concentration for the polycrystalline silicon interconnections, is formed in predetermined parts of an undoped polycrystalline silicon layer which is deposited on a first insulator film on a semiconductor substrate, a second insulator film is deposited on the polycrystalline silicon layer under the state under which the undoped parts are left at least around through-holes to be formed, and the metal interconnections at least parts of which run in a direction intersecting the polycrystalline silicon interconnections are provided on the second insulator film, the necessary contacts between the metal interconnections and the polycrystalline silicon interconnections being made through the through-holes provided in the second insulator film in correspondence with the intersecting parts of both the interconnections.
摘要翻译：在具有多晶硅互连和金属互连的半导体集成电路中，在未掺杂的多晶硅层的预定部分中形成在多晶硅互连中含有高浓度的杂质的低电阻层，其沉积在第一绝缘膜上半导体衬底，第二绝缘膜沉积在多晶硅层上，在未被掺杂的部分至少留在待形成的通孔周围的状态下，并且其至少部分的金属互连在与多晶硅互连设置在第二绝缘膜上，金属互连和多晶硅互连之间的必要接触通过设置在第二绝缘膜中的通孔形成，与两个互连的相交部分相对应。

2. 发明授权

US4261004A Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US4261004A
公开(公告)日：1981-04-07
申请号：US929959
申请日：1978-08-01
申请人： Toshiaki Masuhara , Osamu Minato , Yoshio Sakai , Toshio Sasaki , Masaharu Kubo , Kotaro Nishimura , Tokumasa Yasui
发明人： Toshiaki Masuhara , Osamu Minato , Yoshio Sakai , Toshio Sasaki , Masaharu Kubo , Kotaro Nishimura , Tokumasa Yasui
IPC分类号： H03F1/52 , H01L21/02 , H01L21/822 , H01L23/62 , H01L27/02 , H01L27/04 , H01L27/06 , H01L27/08 , H01L29/78 , H03F1/42
CPC分类号： H01L28/20 , H01L27/0251 , H01L27/0288
摘要： On the surface of an insulating film formed on the surface of a semiconductor substrate on which an MOS type semiconductor device to be protected is formed, there are formed a first polycrystal silicon member having input and output terminals and a resistivity lower than 1 K.OMEGA./.quadrature. and a second polycrystalline silicon member having a resistivity lower than 1 K.OMEGA./.quadrature. and being maintained at a fixed potential. This second polycrystalline silicon member faces at least a part of the first silicon member with polycrystalline silicon of a resistivity higher than 100 K.OMEGA./.quadrature. interposed therebetween. The input terminal of the first polycrystalline silicon member is connected to an input pad of the MOS type semiconductor device to be protected and the output terminal of the first polycrystalline silicon member is connected to an input gate of the semiconductor device to be protected. The input gate of the semiconductor device is protected by utilizing the punch-through effect in the interior of the polycrystalline silicon having a resistivity higher than 100 K.OMEGA./.quadrature..
摘要翻译：在形成有要形成有待保护的MOS型半导体器件的半导体衬底的表面上的绝缘膜的表面上形成有具有输入和输出端子的电阻率低于1KΩ的第一多晶硅元件，并且具有电阻率低于1KΩ/□并且保持在固定电位的第二多晶硅部件。该第二多晶硅部件面对第一硅部件的至少一部分，其中多晶硅的电阻率高于100KΩ，并插入其间。第一多晶硅部件的输入端子连接到要被保护的MOS型半导体器件的输入焊盘，并且第一多晶硅部件的输出端子连接到待保护的半导体器件的输入栅极。半导体器件的输入栅极通过利用电阻率高于100KΩ/□的多晶硅的内部的穿透效应来保护。

3. 发明授权

US4011581A MOSFET antiparasitic layer 失效
标题翻译： MOSFET反寄生层
公开(公告)号：US4011581A
公开(公告)日：1977-03-08
申请号：US68973
申请日：1970-09-02
申请人： Masaharu Kubo , Minoru Nagata , Yasunobu Kosa
发明人： Masaharu Kubo , Minoru Nagata , Yasunobu Kosa
IPC分类号： H01L29/78 , H01L21/76 , H01L23/29 , H01L27/02 , H01L27/092 , H01L29/00 , H01L29/06 , H01L27/04
CPC分类号： H01L29/0638 , H01L23/291 , H01L27/0251 , H01L27/0927 , H01L29/00 , H01L2924/0002 , H01L2924/13091
摘要： A semiconductor device which is provided, for the purpose of eliminating parasitic MOSFETs formed between at least two circuit elements (such as MOSFET, TRANSISTOR, RESISTOR, and the like) on a semiconductor substrate, with a high impurity concentration layer of the same conduction type as the substrate in a manner such that the layer is not only in the semiconductor substrate between said circuit elements but is also partially overlapped by the circuit element regions.
摘要翻译：为了消除形成在半导体衬底上的至少两个电路元件（例如MOSFET，晶体管，电阻等）之间的寄生MOSFET，提供了具有相同导电类型的高杂质浓度层的半导体器件作为基板，使得该层不仅在所述电路元件之间的半导体基板中，而且也部分地与电路元件区域重叠。

4. 发明授权

US4672586A Semiconductor memory having circuit effecting refresh on variable cycles 失效
标题翻译：具有电路的半导体存储器在可变周期上进行刷新
公开(公告)号：US4672586A
公开(公告)日：1987-06-09
申请号：US617919
申请日：1984-06-06
申请人： Katsuhiro Shimohigashi , Masaharu Kubo , Katsuki Miyauchi , Toshiaki Masuhara , Osamu Minato
发明人： Katsuhiro Shimohigashi , Masaharu Kubo , Katsuki Miyauchi , Toshiaki Masuhara , Osamu Minato
IPC分类号： G11C11/401 , G11C5/14 , G11C11/406 , G11C11/4072 , G11C11/4074 , H01L21/822 , H01L21/8247 , H01L27/04 , H01L29/788 , H01L29/792 , G11C11/40
CPC分类号： G11C11/406 , G11C11/4072 , G11C11/4074 , G11C5/141
摘要： A semiconductor memory using a dynamic memory device, wherein a battery supplies a power source voltage and a substrate bias voltage when the memory is cut off from an external device, and a refresh control circuit changes in refresh timing of the memory device in accordance with the leakage current of the memory device. The power consumption of the memory can thus be reduced and the data can be kept for an extended period without an external power source.

5. 发明授权

US4280065A Tri-state type driver circuit 失效
标题翻译：三态驱动电路
公开(公告)号：US4280065A
公开(公告)日：1981-07-21
申请号：US969269
申请日：1978-12-14
申请人： Osamu Minato , Toshiaki Masuhara , Toshio Sasaki , Masaharu Kubo
发明人： Osamu Minato , Toshiaki Masuhara , Toshio Sasaki , Masaharu Kubo
IPC分类号： H03K19/0175 , H03K5/02 , H03K19/082 , H03K19/094 , H03K19/0944 , H03K19/0948 , H03K3/01 , H03K19/08
CPC分类号： H03K19/09429 , H03K19/0823 , H03K19/09448 , H03K5/023
摘要： This invention relates to a tri-state type driver circuit in which any one of the three possible output signals of "float", "on", or "off" is produced at high speed even when an output terminal is accompanied with a great load. The tri-state type driver circuit comprises an output inverter circuit which employs a bipolar transistor as a load thereof and a MOS-FET as a driver thereof, a first logical circuit which is coupled to an input terminal of the bipolar transistor, which first logical circuit is made up of a C-MOS circuit receiving an external select signal and a C-MOS circuit having an input signal transmitted thereto and whose output can be specified by the external select signal, and a second logical circuit which is coupled to an input terminal of the MOS-FET, which second logical circuit is made up of a C-MOS circuit receiving the external select signal and a C-MOS circuit having the input signal transmitted thereto. The state of the external select signal will determine whether the driver circuit output will be "float" (regardless of the input to the driver circuit) or "on" or "off" (in correspondence with the input to the driver circuit).
摘要翻译：本发明涉及一种三态型驱动电路，其中即使输出端子伴随着大的负载，也可以高速度地产生“浮动”，“接通”或“断开”的三个可能的输出信号中的任何一个。三态型驱动器电路包括采用双极晶体管作为其负载的输出反相器电路和作为其驱动器的MOS-FET，耦合到双极晶体管的输入端的第一逻辑电路，第一逻辑电路由接收外部选择信号的C-MOS电路和具有传输的输入信号的C-MOS电路组成，其输出可由外部选择信号指定，第二逻辑电路耦合到输入端 MOS-FET的端子，该第二逻辑电路由接收外部选择信号的C-MOS电路和传输了该输入信号的C-MOS电路组成。外部选择信号的状态将决定驱动器电路输出是否为“浮动”（不管驱动电路的输入）还是“开”或“关”（与驱动电路的输入相对应）。

6. 发明授权

US4514766A Solid-state imaging device 失效
标题翻译：固态成像装置
公开(公告)号：US4514766A
公开(公告)日：1985-04-30
申请号：US482791
申请日：1983-04-07
申请人： Norio Koike , Iwao Takemoto , Shinya Ohba , Toshiaki Masuhara , Masaharu Kubo
发明人： Norio Koike , Iwao Takemoto , Shinya Ohba , Toshiaki Masuhara , Masaharu Kubo
IPC分类号： H04N5/345 , H04N5/372 , H04N5/3728 , H04N3/15
CPC分类号： H04N3/1575 , H01L27/14856 , H04N3/1537
摘要： A solid-state imaging device is provided which employs CCDs as vertical shift registers and a horizontal shift register for vertically and horizontally scanning and reading out a large number of photoelectric elements arrayed in a two-dimensional plane. The imaging device is characterized in that the photoelectric elements of each column arranged between the vertical shift registers are alternately connected to the right and left vertical shift registers. This results in the resolution of the device being enhanced sharply.
摘要翻译：提供了一种使用CCD作为垂直移位寄存器的固态成像装置和用于垂直和水平扫描并读出排列在二维平面中的大量光电元件的水平移位寄存器。成像装置的特征在于，布置在垂直移位寄存器之间的每列的光电元件交替地连接到左右垂直移位寄存器。这导致设备的分辨率急剧增加。

7. 发明授权

US4015281A MIS-FETs isolated on common substrate 失效
标题翻译：在公共基板上隔离的MIS-FET
公开(公告)号：US4015281A
公开(公告)日：1977-03-29
申请号：US121375
申请日：1971-03-05
申请人： Minoru Nagata , Toshiaki Masuhara , Masaharu Kubo , Norikazu Hashimoto
发明人： Minoru Nagata , Toshiaki Masuhara , Masaharu Kubo , Norikazu Hashimoto
IPC分类号： H01L21/765 , H01L27/088 , H01L29/51 , H01L27/02
CPC分类号： H01L29/511 , H01L21/765 , H01L27/0883
摘要： An enhancement-type and a depletion-type metal-insulator-semiconductor field effect transistor are formed on a common substrate of silicon and are electrically isolated from each other by a plurality of layers including, for example, a first layer of SiO.sub.2, a second layer of Al.sub.2 O.sub.3 capable of inducing holes in the surface portion of the substrate, and a third layer of SiO.sub.2, and the relation between the thicknesses of these layers is suitably selected for attaining the satisfactory isolation between these transistors.
摘要翻译：增强型和耗尽型金属 - 绝缘体 - 半导体场效应晶体管形成在公共的硅衬底上，并且通过多个层彼此电隔离，所述多个层包括例如第一SiO 2层，第二层能够在衬底的表面部分中引入空穴的Al 2 O 3层和SiO 3层，并且适当地选择这些层的厚度之间的关系以获得这些晶体管之间的令人满意的隔离。

8. 发明授权

US06838374B2 Semiconductor integrated circuit device and method of fabricating the same 失效
标题翻译：半导体集成电路器件及其制造方法
公开(公告)号：US06838374B2
公开(公告)日：2005-01-04
申请号：US10170359
申请日：2002-06-14
申请人： Toshiya Uenishi , Satoshi Meguro , Masaharu Kubo , Masataka Kato , Hideo Miura , Norio Suzuki
发明人： Toshiya Uenishi , Satoshi Meguro , Masaharu Kubo , Masataka Kato , Hideo Miura , Norio Suzuki
IPC分类号： H01L21/76 , H01L21/762 , H01L21/8238 , H01L27/08 , H01L27/092 , H01L21/4763
CPC分类号： H01L21/76237
摘要： To suppress oxidation of the inner walls of element isolation grooves otherwise occurring during thermal oxidation processes, a nitrogen introducing layer, that has a lower diffusion coefficient relative to an oxidizing agent, is formed at the surface portion of a silicon oxide film buried within an element isolation groove. This nitrogen introduced layer functions as a barrier layer for precluding the oxidizer (such as oxygen, water or the like) in vapor phase from diffusing into the silicon oxide film during thermal processing steps. The nitrogen introduced layer is formed by performing nitrogen ion implantation into the entire surface of a substrate and subsequently applying thermal processing to the substrate to thereby activate the nitrogen that has been doped.
摘要翻译：为了抑制在热氧化过程中发生的元件隔离槽的内壁的氧化，在埋置在元件内的氧化硅膜的表面部分形成有相对于氧化剂具有较低扩散系数的氮导入层隔离槽。该氮引入层用作阻止层，用于排除气相中的氧化剂（例如氧，水等）在热处理步骤期间扩散到氧化硅膜中。通过在衬底的整个表面中进行氮离子注入并随后对衬底进行热处理从而激活掺杂的氮而形成氮引入层。

9. 发明授权

US4360821A Solid-state imaging device 失效
标题翻译：固态成像装置
公开(公告)号：US4360821A
公开(公告)日：1982-11-23
申请号：US66230
申请日：1979-08-13
申请人： Toshihisa Tsukada , Eiichi Maruyama , Toru Baji , Saburo Ataka , Yoshinori Imamura , Akira Sasano , Masaharu Kubo , Norio Koike , Shusaku Nagahara
发明人： Toshihisa Tsukada , Eiichi Maruyama , Toru Baji , Saburo Ataka , Yoshinori Imamura , Akira Sasano , Masaharu Kubo , Norio Koike , Shusaku Nagahara
IPC分类号： H01L27/146 , H01L27/14
CPC分类号： H01L27/14665
摘要： In a solid-state imaging device having a plurality of photosensitive portions and a semiconductor substrate which includes at least scanning means for scanning the photosensitive portions, the photosensitive portions including a layer of a photosensitive material overlying the semiconductor substrate and a transparent electrically conductive film overlying the photosensitive material layer; a solid-state imaging device characterized in that the photosensitive material is an amorphous material whose indispensable constituent is silicon and which contains hydrogen. The hydrogen content of the photosensitive material is preferably 5 atomic-% to 30 atomic-%, especially 10 atomic-% to 25 atomic-%.
摘要翻译：在具有多个感光部分的固态成像装置和至少包括用于扫描感光部分的扫描装置的半导体衬底上，感光部分包括覆盖在半导体衬底上的感光材料层和覆盖着透明导电膜的透明导电膜感光材料层; 一种固态成像装置，其特征在于感光材料是不可缺少的成分是硅并且含有氢的无定形材料。感光材料的氢含量优选为5原子％至30原子％，特别是10原子％至25原子％。

10. 发明授权

US4335406A Solid-state imaging device 失效
标题翻译：固态成像装置
公开(公告)号：US4335406A
公开(公告)日：1982-06-15
申请号：US163298
申请日：1980-06-26
申请人： Shinya Ohba , Masaharu Kubo , Iwao Takemoto , Shoji Hanamura , Masakazu Aoki
发明人： Shinya Ohba , Masaharu Kubo , Iwao Takemoto , Shoji Hanamura , Masakazu Aoki
IPC分类号： H01L27/146 , H04N5/335 , H04N5/365 , H04N5/374 , H04N3/15
CPC分类号： H04N5/2173
摘要： This invention provides a signal processing circuit of a solid-state imaging device utilizing discontinuous scanning pulses having fixed interval times, and with a fixed pattern noise-eliminating circuit of high performance. In the signal processing circuit of this invention, switching elements are disposed in a feedback circuit of a signal amplifier (for example, pre-amplifier) and at an output of the signal amplifier, whereby the fixed pattern noise is suppressed so as to attain a high signal-to-noise ratio.
摘要翻译：本发明提供一种使用具有固定间隔时间的不连续扫描脉冲的固态成像装置的信号处理电路，以及具有高性能的固定图案噪声消除电路。在本发明的信号处理电路中，开关元件设置在信号放大器（例如前置放大器）的反馈电路中，并在信号放大器的输出端设置，从而抑制固定图案噪声，从而达到高信噪比。

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