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    • 6. 发明授权
    • Frequency encoded logic devices
    • 频率编码逻辑器件
    • US4706299A
    • 1987-11-10
    • US610592
    • 1984-05-15
    • Peter O. Jorgensen
    • Peter O. Jorgensen
    • G06E1/04G06F7/49G11C19/34H03K19/082H04B9/00
    • H03K19/0823G06E1/04G06F7/49G11C19/34
    • Logic devices for frequency encoded trinary logic signals are simulated by standard binary circuits. The binary circuits include frequency sensing and frequency selecting devices at the inputs and outputs thereof for decoding the frequency encoded trinary logic signals to binary level logic signals and for frequency encoding the resulting binary output to trinary logic signals. Optical encoding using the three primary light frequencies provides a convenient trinary signal format for the frequency encoded signals. A latch register, a shift register, a half adder and full series and parallel adder circuits are disclosed.
    • 用于频率编码的三态逻辑信号的逻辑器件由标准二进制电路进行仿真。 二进制电路包括其输入和输出处的频率感测和频率选择装置,用于将频率编码的三进制逻辑信号解码为二进制电平逻辑信号,并将所得到的二进制输出频率编码为三进制逻辑信号。 使用三个主要光频率的光学编码为频率编码信号提供了一种方便的三态信号格式。 公开了一种锁存寄存器,移位寄存器,半加法器和全串并联加法器电路。
    • 7. 发明授权
    • Tri-state type driver circuit
    • 三态驱动电路
    • US4280065A
    • 1981-07-21
    • US969269
    • 1978-12-14
    • Osamu MinatoToshiaki MasuharaToshio SasakiMasaharu Kubo
    • Osamu MinatoToshiaki MasuharaToshio SasakiMasaharu Kubo
    • H03K19/0175H03K5/02H03K19/082H03K19/094H03K19/0944H03K19/0948H03K3/01H03K19/08
    • H03K19/09429H03K19/0823H03K19/09448H03K5/023
    • This invention relates to a tri-state type driver circuit in which any one of the three possible output signals of "float", "on", or "off" is produced at high speed even when an output terminal is accompanied with a great load. The tri-state type driver circuit comprises an output inverter circuit which employs a bipolar transistor as a load thereof and a MOS-FET as a driver thereof, a first logical circuit which is coupled to an input terminal of the bipolar transistor, which first logical circuit is made up of a C-MOS circuit receiving an external select signal and a C-MOS circuit having an input signal transmitted thereto and whose output can be specified by the external select signal, and a second logical circuit which is coupled to an input terminal of the MOS-FET, which second logical circuit is made up of a C-MOS circuit receiving the external select signal and a C-MOS circuit having the input signal transmitted thereto. The state of the external select signal will determine whether the driver circuit output will be "float" (regardless of the input to the driver circuit) or "on" or "off" (in correspondence with the input to the driver circuit).
    • 本发明涉及一种三态型驱动电路,其中即使输出端子伴随着大的负载,也可以高速度地产生“浮动”,“接通”或“断开”的三个可能的输出信号中的任何一个 。 三态型驱动器电路包括采用双极晶体管作为其负载的输出反相器电路和作为其驱动器的MOS-FET,耦合到双极晶体管的输入端的第一逻辑电路,第一逻辑 电路由接收外部选择信号的C-MOS电路和具有传输的输入信号的C-MOS电路组成,其输出可由外部选择信号指定,第二逻辑电路耦合到输入端 MOS-FET的端子,该第二逻辑电路由接收外部选择信号的C-MOS电路和传输了该输入信号的C-MOS电路组成。 外部选择信号的状态将决定驱动器电路输出是否为“浮动”(不管驱动电路的输入)还是“开”或“关”(与驱动电路的输入相对应)。