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1. 发明授权

US06415650B1 Method for operating helium leak indicator and the application of this method to helium leak indicators 失效
标题翻译：氦泄漏指示器的操作方法以及该方法应用于氦气泄漏指示器
公开(公告)号：US06415650B1
公开(公告)日：2002-07-09
申请号：US09463245
申请日：2000-01-21
申请人： Thomas Böhm , Rudi Widt
发明人： Thomas Böhm , Rudi Widt
IPC分类号： G01M0320
CPC分类号： G01M3/202
摘要： Method for operating, a helium leak indicator (1) consisting of a helium detector (4) with evacuation devices comprising at least a high-vacuum pump (6), a backing pump (9) and a valve (16) whose level of flow conductance can be adjusted and serves to modulate the through-flow of test gas to be analyzed; in order to influence the sensitivity in a simple manner, the method provides that the modulation properties be changeable in such a manner that the effective pumping capacity at the inlet of the leak indicator is changed by the adjustment of the modulation properties.
摘要翻译：一种用于操作的氦泄漏指示器（1），氦泄漏指示器（1）由氦检测器（4）组成，所述氦检测器（4）具有至少包括高真空泵（6），背泵（9）和阀（16）可以调节电导，并用于调制要分析的试验气体的通流; 为了以简单的方式影响灵敏度，该方法提供了调制特性可以通过调整调制特性来改变泄漏指示器入口处的有效泵送能力而改变的方式。

2. 发明授权

US06545900B2 MRAM module configuration 有权
公开(公告)号：US06545900B2
公开(公告)日：2003-04-08
申请号：US09951242
申请日：2001-09-12
申请人： Thomas Böhm , Dietmar Gogl , Martin Freitag , Stefan Lammers
发明人： Thomas Böhm , Dietmar Gogl , Martin Freitag , Stefan Lammers
IPC分类号： G11C1702
CPC分类号： G11C11/16 , G11C5/025 , H01L27/222
摘要： An MRAM module configuration in which, in order to increase the packing density, memory cell zones containing memory arrays and peripheral circuits are nested in one another. In this manner, an increased packing density of the memory cell is achieved which results in lowered production costs and a smaller chip space for a more compact configuration.

3. 发明授权

US06487128B2 Integrated memory having memory cells and reference cells, and operating method for such a memory 有权
标题翻译：具有存储单元和参考单元的集成存储器以及用于这种存储器的操作方法
公开(公告)号：US06487128B2
公开(公告)日：2002-11-26
申请号：US09962411
申请日：2001-09-24
申请人： Thomas Böhm , Heinz Hönigschmid , Thomas Röhr , Georg Braun , Zoltan Manyoki
发明人： Thomas Böhm , Heinz Hönigschmid , Thomas Röhr , Georg Braun , Zoltan Manyoki
IPC分类号： G11C700
CPC分类号： G11C11/22 , G11C7/14
摘要： The memory has identically constructed memory cells and reference cells. An item of reference information is written into the reference cells by uncoupling the reference cells from the read amplifiers via first switching elements, and by electrically connecting the part of the bit lines that is connected to the reference cells via second switching elements to a potential line carrying the reference information.
摘要翻译：存储器具有相同构造的存储器单元和参考单元。通过经由第一开关元件将读取放大器的参考单元解耦，并且经由第二开关元件将连接到参考单元的位线的一部分电连接到电位线，将参考信息项写入参考单元携带参考信息。

4. 发明授权

US06452852B2 Semiconductor memory configuration with a refresh logic circuit, and method of refreshing a memory content of the semiconductor memory configuration 有权
标题翻译：具有刷新逻辑电路的半导体存储器配置和刷新半导体存储器配置的存储器内容的方法
公开(公告)号：US06452852B2
公开(公告)日：2002-09-17
申请号：US09767380
申请日：2001-01-22
申请人： Thomas Böhm , Georg Braun , Heinz Hönigschmid , Thomas Röhr
发明人： Thomas Böhm , Georg Braun , Heinz Hönigschmid , Thomas Röhr
IPC分类号： G11C700
CPC分类号： G11C11/22 , G11C11/406
摘要： In a semiconductor memory configuration, a refresh operation is always started by a refresh logic circuit when a comparison circuit determines that there is a specific minimum difference when comparing a characteristic variable of at least one reference memory cell with a reference value (VREF).
摘要翻译：在半导体存储器配置中，当比较电路确定在将至少一个参考存储单元的特征变量与参考值（VREF）进行比较时确定存在特定最小差异时，刷新逻辑电路总是开始刷新操作。

5. 发明授权

US06351422B2 Integrated memory having a differential sense amplifier 有权
标题翻译：具有差分读出放大器的集成存储器
公开(公告)号：US06351422B2
公开(公告)日：2002-02-26
申请号：US09820235
申请日：2001-03-28
申请人： Thomas Röhr , Thomas Böhm , Heinz Hönigschmid , Georg Braun
发明人： Thomas Röhr , Thomas Böhm , Heinz Hönigschmid , Georg Braun
IPC分类号： G11C700
CPC分类号： G11C11/22 , G11C7/12 , G11C7/22
摘要： The memory has writable memory cells. In addition, it has a bit line pair which connects the memory cells MC to a differential sense amplifier. A control unit is used for precharging the bit lines in a plurality of steps before one of the memory cells is conductively connected to one of the bit lines for a read access operation. For a write access operation, the control unit carries out no more than some of the bit line precharging steps provided for a read access operation before the sense amplifier transfers data to the bit line pair.
摘要翻译：内存有可写存储单元。此外，它具有将存储单元MC连接到差分读出放大器的位线对。控制单元用于在存储器单元之一导通地连接到用于读访问操作的位线之一之前的多个步骤中对位线进行预充电。对于写访问操作，在读出放大器将数据传送到位线对之前，控制单元执行不超过为读访问操作提供的一些位线预充电步骤。

6. 发明授权

US06258658B1 Memory cell configuration and corresponding fabrication method 有权
标题翻译：存储单元配置及相应的制造方法
公开(公告)号：US06258658B1
公开(公告)日：2001-07-10
申请号：US09250362
申请日：1999-02-12
申请人： Thomas Böhm , Volker Weinrich , Manfred Hain , Armin Kohlhase , Yoichi Otani , Andreas Rusch , Till Schlösser
发明人： Thomas Böhm , Volker Weinrich , Manfred Hain , Armin Kohlhase , Yoichi Otani , Andreas Rusch , Till Schlösser
IPC分类号： H01L218242
CPC分类号： H01L27/10823 , H01L27/10808
摘要： The memory cell configuration has a multiplicity of preferably ferroelectric memory cells in a semiconductor substrate. Mutually parallel bit line trenches run in the longitudinal direction in the main surface of the semiconductor substrate. Bit lines are disposed in the bottoms of the trenches. Source/drain regions are formed in the crowns of the trenches. Channel regions are provided in the walls of the trenches. The channel region on a wall in each case is configured such that a drivable selection transistor of the relevant memory cell is formed there, while the channel region on the other wall is configured such that the transistor located there is closed. Insulated word lines for driving the selection transistors run in the transverse direction along the main surface of the semiconductor substrate through the bit line trenches. Insulation trenches for insulating the source/drain regions in the longitudinal direction of neighboring memory cells run in the transverse direction in the main surface of the semiconductor substrate. A respective, preferably ferroelectric, capacitor is connected to the source/drain region of the respective memory cell and is arranged above the word lines.
摘要翻译：存储单元配置在半导体衬底中具有多个优选铁电存储单元。相互并行的位线沟槽在半导体衬底的主表面中沿纵向延伸。位线设置在沟槽的底部。源极/漏极区域形成在沟槽的冠部中。通道区域设置在沟槽的壁中。在每种情况下，壁上的沟道区域被构造成使得相关存储单元的可驱动选择晶体管形成在其中，而另一壁上的沟道区域被配置为使得位于那里的晶体管闭合。用于驱动选择晶体管的绝缘字线通过位线沟槽沿着半导体衬底的主表面在横向方向上延伸。用于绝缘沟槽，用于使相邻存储单元的纵向上的源极/漏极区域绝缘，在半导体衬底的主表面中沿横向延伸。相应的优选铁电电容器连接到相应存储单元的源极/漏极区域并且被布置在字线之上。

7. 发明申请

US20090272240A1 DEVICE FOR THE MANUFACTURE OF ABSORBENT PRODUCTS 失效
标题翻译：吸收产品的制造设备
公开(公告)号：US20090272240A1
公开(公告)日：2009-11-05
申请号：US12306101
申请日：2006-06-30
申请人： Thomas Böhm , Daniel Carlsson
发明人： Thomas Böhm , Daniel Carlsson
IPC分类号： B26F1/20 , B26D3/12
CPC分类号： B26F1/20 , B26D1/0006 , B26D3/10 , B26D3/12 , B26D2001/0053 , B26D2001/006 , B26F1/22 , B26F1/44 , B26F2001/4409 , B26F2001/4481 , Y10T83/4836 , Y10T83/4838 , Y10T83/9314 , Y10T156/12
摘要： A device for the manufacture of an absorbent product including a rotatable slitting tool having an extent in a radial direction and an extent in an axial direction perpendicular to the radial direction, the slitting tool being divided in the axial direction into two lateral parts and lying between them a central part. The central part has a circular cross section in the radial direction, and the lateral parts include, in the axial direction, intermittent protuberances projecting from the central part. The protuberances are the same distance from the center of the slitting tool as the circular cross section. The central part between the protuberances, in the direction of curvature of the envelope surface, forms a plurality of cutting edges, each of which has a width which, at a given pressure, permits slitting of a layer of material intended for the absorbent product, and the protuberances form supporting surfaces between the cutting edges.
摘要翻译：一种用于制造吸收产品的装置，包括具有与径向方向垂直的径向方向和程度的可旋转切割工具，该切割工具沿轴向方向分成两个侧面部分，位于他们是中心部分。中心部分在径向上具有圆形横截面，并且侧向部分在轴向方向上包括从中心部分突出的间歇突起。突起与切割工具的中心距圆形截面相同。突起之间的中心部分在包络表面的曲率方向上形成多个切割边缘，每个切割边缘具有宽度，该宽度在给定压力下允许切割用于吸收产品的一层材料，并且突起在切割刃之间形成支撑表面。

8. 发明授权

US07444854B2 Leak indicator with test leak and test leak for integration into a leak detector 有权
标题翻译：泄漏指示器，带有测试泄漏和测试泄漏，用于集成到检漏仪中
公开(公告)号：US07444854B2
公开(公告)日：2008-11-04
申请号：US11504831
申请日：2006-08-16
申请人： Thomas Böhm , Werner Grosse Bley , Randolf Rolff , Sandra Seitz , Norbert Rolff
发明人： Thomas Böhm , Werner Grosse Bley , Randolf Rolff , Sandra Seitz , Norbert Rolff
IPC分类号： G01M3/20
CPC分类号： G01M3/207
摘要： A leak test apparatus includes a housing having an interior sized for retaining a plurality of instrument components including a control unit. A sniffer gun is linked to the instrument components, the sniffer gun having an intake point, and a test leak includes a gas reservoir, a constriction, an opening suited for introducing the intake point of said sniffer gun, and a temperature sensor. The temperature sensor is linked, either by means of a wired connection or wirelessly to the control unit for signal transfer.
摘要翻译：泄漏测试装置包括壳体，其具有尺寸适于保持包括控制单元的多个仪器部件的内部。嗅探枪连接到仪器部件，嗅探枪具有进气点，并且测试泄漏包括气体储存器，收缩部，适于引入嗅探枪的进气口的开口和温度传感器。温度传感器通过有线连接或无线连接到控制单元进行信号传输。

9. 发明授权

US06538950B2 Integrated memory and corresponding operating method 有权
公开(公告)号：US06538950B2
公开(公告)日：2003-03-25
申请号：US09917553
申请日：2001-07-27
申请人： Thomas Böhm , Heinz Hönigschmid , Georg Braun , Zoltan Manyoki , Stefan Lammers , Thomas Rohr
发明人： Thomas Böhm , Heinz Hönigschmid , Georg Braun , Zoltan Manyoki , Stefan Lammers , Thomas Rohr
IPC分类号： G11C800
CPC分类号： G11C7/06 , G11C7/065 , G11C7/1006
摘要： An integrated memory has a multiplexer and a differential sense amplifier with a differential input. The differential sense amplifier is connected to three bit lines by the multiplexer. The multiplexer electrically connects the differential input of the sense amplifier to any two of the three bit lines connected to it respectively, in accordance with its activation.

10. 发明授权

US06480055B2 Decoder element for generating an output signal having three different potentials and an operating method for the decoder element 有权
标题翻译：用于产生具有三个不同电位的输出信号的解码器元件和用于解码器元件的操作方法
公开(公告)号：US06480055B2
公开(公告)日：2002-11-12
申请号：US09822028
申请日：2001-03-29
申请人： Thomas Böhm , Georg Braun , Heinz Hönigschmid , Zoltan Manyoki , Ernst Neuhold , Thomas Röhr
发明人： Thomas Böhm , Georg Braun , Heinz Hönigschmid , Zoltan Manyoki , Ernst Neuhold , Thomas Röhr
IPC分类号： H03K1776
CPC分类号： G11C5/143 , G11C8/08 , G11C16/12 , H03K19/09425 , H03M5/16
摘要： A decoder element is provided with an output, whereby an output signal with one of three different possible potentials is produced. The output signal may have a value of either a first potential, a second potential, and a third potential, where the second potential lies between the first potential and the third potential. The output signal is produced according to voltage values of input signals at terminal connections of the decoder element.
摘要翻译：解码器元件设置有输出，由此产生具有三种不同可能电位之一的输出信号。输出信号可以具有第一电位，第二电位和第三电位的值，其中第二电位位于第一电位和第三电位之间。输出信号根据解码器元件的端子连接处的输入信号的电压值而产生。

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